SSM9928(G)EO DUAL N-CHANNEL ENHANCEMENT-MODE POWER MOSFETS Low on-resistance Capable of 2.5V gate drive G2 S2 Ideal for DC/DC battery applications D2 BV DSS 20V RDS(ON) 23mΩ 5A ID S2 TSSOP-8 S1 G1 S1 D1 Description D1 Power MOSFETs from Silicon Standard provide the designer with the best combination of fast switching, ruggedized device design, ultra low on-resistance and cost-effectiveness. G1 D2 G2 S1 S2 This device is available with Pb-free lead finish (second-level interconnect) as SSM9928GEO. Absolute Maximum Ratings Parameter Symbol Rating Units VDS Drain-Source Voltage 20 V VGS Gate-Source Voltage ±12 V 3 ID @ TA=25°C Drain Current , VGS @ 4.5V 5 A ID @ TA=70°C 3 3.5 A Drain Current , VGS @ 4.5V 1 IDM Pulsed Drain Current 25 A PD @ TA=25°C Total Power Dissipation 1 W Linear Derating Factor 0.008 W/°C TSTG Storage Temperature Range -55 to 150 °C TJ Operating Junction Temperature Range -55 to 150 °C Thermal Data Symbol Rthj-a Rev.2.01 12/06/2004 Parameter Thermal Resistance Junction-ambient 3 www.SiliconStandard.com Max. Value Unit 125 °C/W 1 of 6 SSM9928(G)EO Electrical Characteristics @ Tj=25oC (unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. 20 - - V - 0.02 - V/°C VGS=4.5V, ID=5A - - 23 mΩ VGS=2.5V, ID=2A - - 29 mΩ 0.5 - - V VDS=10V, ID=5A - 21 - S Drain-Source Leakage Current (Tj=25 C) VDS=20V, VGS=0V - - 1 uA Drain-Source Leakage Current (Tj=70oC) VDS=20V ,VGS=0V - - 25 uA Gate-Source Leakage VGS=±12V - - ±10 uA ID=5A - 15.9 - nC BVDSS Drain-Source Breakdown Voltage ∆ BV DSS/ ∆ Tj Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA RDS(ON) Static Drain-Source On-Resistance VGS(th) Gate Threshold Voltage gfs Forward Transconductance IGSS 2 VDS=VGS, ID=250uA o IDSS VGS=0V, ID=250uA 2 Max. Units Qg Total Gate Charge Qgs Gate-Source Charge VDS=10V - 1.5 - nC Qgd Gate-Drain ("Miller") Charge VGS=4.5V - 7.4 - nC VDS=10V - 6.2 - ns 2 td(on) Turn-on Delay Time tr Rise Time ID=1A - 9 - ns td(off) Turn-off Delay Time RG=3.3Ω ,VGS=4.5V - 30 - ns tf Fall Time RD=10Ω - 11 - ns Ciss Input Capacitance VGS=0V - 530 - pF Coss Output Capacitance VDS=20V - 245 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 125 - pF Min. Typ. VD=VG=0V,VS=1.2V - - 0.83 A Tj=25°C,IS=5A,VGS=0V - - 1.2 V Source-Drain Diode Symbol IS VSD Parameter Continuous Source Current ( Body Diode ) 2 Forward On Voltage Test Conditions Max. Units Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on 1 in2 copper pad of FR4 board ; 208°C/W when mounted on Min. copper pad. Rev.2.01 12/06/2004 www.SiliconStandard.com 2 of 6 SSM9928(G)EO 30 30 4.5V 3.5V 3.0V 2.5V ID , Drain Current (A) ID , Drain Current (A) 4.5V 3.5V 3.0V 2.5V 20 V GS =2.0V 10 20 V GS =2.0V 10 T C =150 o C T C =25 o C 0 0 0 1 2 3 0 4 1 2 3 4 V DS , Drain-to-Source Voltage (V) V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 95 1.9 I D = 5A I D = 5A V GS = 4.5V T C =25 o C 1.5 RDS(ON) (mΩ ) Normalized R DS(ON) 65 35 1.1 0.7 0.3 5 1 2 3 4 5 6 -50 0 100 150 T j , Junction Temperature ( C) Fig 3. On-Resistance vs. Gate Voltage Rev.2.01 12/06/2004 50 o V GS (V) Fig 4. Normalized On-Resistance vs. Junction Temperature www.SiliconStandard.com 3 of 6 SSM9928(G)EO 1.2 6 5 4 PD (W) ID , Drain Current (A) 0.9 3 0.6 2 0.3 1 0 0 25 50 75 100 125 150 0 50 100 150 T c , Case Temperature ( o C) T c , Case Temperature ( o C) Fig 5. Maximum Drain Current vs. Case Temperature Fig 6. Typical Power Dissipation 100 1 Normalized Thermal Response (R thja) Duty Factor = 0.5 100us 10 ID (A) 1ms 10ms 1 100ms 0.1 1s T C =25 o C Single Pulse 0.2 0.1 0.1 0.05 0.02 0.01 PDM t 0.01 T Single Pulse Duty Factor = t/T Peak Tj = P DM x Rthja + Ta Rthja=208 oC/W DC 0.001 0.01 0.1 1 10 100 0.0001 0.001 V DS (V) 0.1 1 10 100 1000 t , Pulse Width (s) Fig 7. Maximum Safe Operating Area Rev.2.01 12/06/2004 0.01 Fig 8. Effective Transient Thermal Impedance www.SiliconStandard.com 4 of 6 SSM9928(G)EO f=1.0MHz 10000 8 I D =5A VGS , Gate to Source Voltage (V) 7 6 V DS =10V V DS =15V V DS =20V 1000 Ciss C (pF) 5 4 Coss Crss 3 100 2 1 10 0 0 5 10 15 20 1 25 7 Q G , Total Gate Charge (nC) Fig 9. Gate Charge Characteristics 1.6 10 1.2 T j =25 o C VGS(th) (V) IS (A) 19 25 Fig 10. Typical Capacitance Characteristics 100 T j =150 o C 13 V DS (V) 1 0.8 0.4 0.1 0 0.01 0.2 0.5 0.8 1.1 -50 0 50 100 150 Junction Temperature ( o C ) V SD (V) Fig 11. Forward Characteristic of Fig 12. Gate Threshold Voltage vs. Reverse Diode Rev.2.01 12/06/2004 www.SiliconStandard.com Junction Temperature 5 of 6 SSM9928(G)EO VDS RD 90% VDS D RG G TO THE OSCILLOSCOPE 0.5 x RATED VDS 10% VGS S + VGS 4.5V - td(on) Fig 13. Switching Time Circuit td(off) tf tr Fig 14. Switching Time Waveform VG VDS QG TO THE OSCILLOSCOPE D 4.5V G 0.5 x RATED VDS S QGS QGD VGS + 1~ 3 mA IG ID Charge Fig 15. Gate Charge Circuit Q Fig 16. Gate Charge Waveform Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. Rev.2.01 12/06/2004 www.SiliconStandard.com 6 of 6