AKM AKD4120_06

ASAHI KASEI
[AKD4120]
AKD4120
AK4120 Evaluation Board Rev.A
GENERAL DESCRIPTION
The AKD4120 is an evaluation board for the AK4120, digital sample rate converter with mixer and
volume. The AKD4120 has the interface with AKM’s D/A and A/D converter to evaluation boards.
Therefore, it is easy to evaluate the AK4120 via analog output. This has also optical connector to
interface with other digital audio equipment.
„ Ordering guide
AKD4120 --- AK4120 Evaluation Board
(Cable for connecting with printer port of IBM-AT compatible PC and control software
are packed with this.)
FUNCTION
• Compatible with 2 types of interface
- Optical interface by AK4112B (DIR) and AK4114 (DIT & DIR)
- Direct interface with AKM’s DAC & ADC evaluation boards by 10pin headers.
• BNC connectors for an external clock input
• 10pin headers for the serial control data interface
GND
3.3V
5V
AK4114
AK4112B
Optical
Input
(DIR)
Input#1
Output
(DIT,DIR)
10pin Header
Audio Data
Input#2
Optical
Input
(PORT5)
Optical
Output
10pin Header
Audio Data
Input
10pin Header
AK4120
10pin Header
Audio Data
Output
Register
Control
Figure 1. AKD4120 Block Diagram
* Circuit diagram and PCB layout are attached at the end of this manual.
<KM066802>
2006/12
-1-
ASAHI KASEI
[AKD4120]
EVALUATION BOARD MANUAL
„ Operation sequence
1.Set up the jumper for power supply
[JP11 (D3V) ]
Select power supply for VDD pin of the AK4120
Short : 3.3V is supplied from 3V-1 jack (Default)
Notihg should be connected to VCC-3V.
Open : 3.3V is supplied from VCC-3V.
2.Set up power supply lines
VCC= 5V
VCC-3V= 3.3V
3V-1= 3.3V
GND= 0V
: Power supply for TVDD of the AK4112B and AK4114, and for logic circuit.
: This jack is used when VDD of the AK4120 is supply from this.
In this case, JP11 should be open.
: Power supply for logic, the AK4112B and the AK4114.
In this case, JP11 should be short and notihg should be connected to VCC-3V.
: This is ground for all regions in this board.
3. Set up the evaluation modes by jumper pins and DIP switches. (See the next section.)
4. Power on.
The AK4120 should be reset once by bringing SW2 “L” upon power-up.
The AK4120 is reset at SW2= “L” and exits resetting at SW2= “H”.
When SW2 = “L”, the internal registers cannot be written.
<KM066802>
2006/12
-2-
ASAHI KASEI
[AKD4120]
„ Evaluation mode
The AK4120 has four path modes that interface between two input ports and one output port. Four audio data formats can
be selected independently for each port. Input#1 port supports only slave mode. Input#2 port and output port support slave
mode and master mode. This evaluation board, AKD4120 has a standard optical interface via DIR/DIT and AKM original
10pin interface for AKM’s AD/DA evaluation board. The AKD4120 can select either optical interface or 10pin interface
for each port.
Set the evaluation mode by the following operation sequence.
1)
2)
3)
1.
Control I/F mode
Path mode and Clock mode
Audio data format
Control I/F mode
Control I/F mode is set by JP14 and S1. Attached control software is written for using 3-wire serial and Chip Address
CAD1, CAD0 (CAD1, CAD0 = ”10”). See the section of “DIP switch setup” and “Jumper list”. Set-up of JP14 and
S1 is shown below.
Jumper No.
DIP switch No.
JP14
S1: No.4
S1: No.5
ON
Set-up
CSN
OFF
OFF
1 2 3 4 5 6 7
S1
I2MODE
OMODE
I2S
I2C
CAD0
CAD1
OFF
S1 (AK4120) set-up: Audio data format: 24bit, MSB justified (Default)
* In case of 3-wire serial (I2C = “OFF”), lower bit is set up by CAD0 pin, but upper bit is fixed to “1”. Therefore, it is not
needed to set up CAD1 pin.
<KM066802>
2006/12
-3-
ASAHI KASEI
[AKD4120]
2. Path mode and Clock mode
2-1. Path Mode 0 (Default)
I2C
DIR
AK4112B
PORT3
SDTI1
I2S
PDN
VDD
Sample
Rate
Converter
Input#1
ILRCK1
VSS
Volume#1
TEST
IBICK1
PORT2
IMCLK1
OMCLK
IMCLK2
SDTI2
Input#2
SDTO
Output
ILRCK2
OLRCK
Volume#2
IBICK2
OBICK
µ P I/F
I2MODE
CAD0
CSN/CAD1 CCLK/SDL CDTI/SDA
PORT4
<KM066802>
OMODE
DIR
AK4114
PORT5
DIT
AK4114
PORT7
PORT6
2006/12
-4-
ASAHI KASEI
2-1-1
[AKD4120]
Input#1 signal set-up
When Input#1 is connected to external equipment through DIR, PORT3 is used. When the audio data comes from AKM’s ADC
board, PORT2 is used.
[Input#1]
PORT3 (DIR): DIR (Optical link)
PORT2 (ADC): Connect to ADC board by 10pin Port
(1) PORT select
Input#1 Slave Mode
Jumper NO.
JP21
JP22
JP23
JP2
JP4
JP6
JP8
JP15
BCK12
PORT
SDTO12
PORT
LRCK12
PORT
MCK12
MCK14
SDTO12
SDTO14
BCK12
BCK14
LRCK12
LRCK14
IN
OUT
JP16
JP19
PORT3 (DIR)
(Default)
short
open
short
open
short
open
short
open
short
open
short
open
short
open
open
open
open
open
PORT2 (ADC)
short
short
open
short
short
short
short
open
short
open
short
open
short
open
open
short
open
short
(2) Input#1, Master Clock select
Jumper NO.
JP20
X1 frequency
JP/X/SW
JP18
JP17
X1 (X’tal)
SW1: NO.5
256fs
(Default)
MCKO2
512fs
PORT3 (DIR)
(Default)
short
open
don’t care
OFF
512fs
MCKO1
512fs
PORT2 (ADC)
X’tal (X1)
Ex. Clock (J1)
short
open
open
short
use
remove
ON
ON
When using PORT2, the setting of X’tal or Ex. Clock is used. 512fs (Default: 24.576MHz on board) should be used as X’tal
frequency.
<KM066802>
2006/12
-5-
ASAHI KASEI
[AKD4120]
(3) The AK4120 and DIR (AK4112B) set-up
ON
1 2 3 4 5 6 7
S1
I2MODE
OMODE
I2S
I2C
CAD0
CAD1
OFF
S1 (AK4120) set-up, Audio data format: 24bit, MSB justified (Default), Input#1: Slave Mode
ON
1 2 3 4 5
SW1
DIF2
DIF1
DIF0
CM0
OFF
SW1 (AK4112B) set-up, Audio data format: 24bit, MSB justified (Default), Master Mode
(*) AK4112B should always be used in Master Mode.
2-1-2.
Input#2 and Output signal set-up
When Input#2 is connected to external equipment through DIR, PORT5 is used. When the audio data comes from AKM’s ADC
board, PORT4 is used.
[Input#2]
PORT5 (DIR) : DIR(Optical link)
PORT4 (ADC): Connect to ADC board by 10pin Port
When Output is connected to external equipment through DIT, PORT7 is used. When the audio data goes to AKM’s DAC board,
PORT6 is used.
[Output]
PORT7 (DIT): DIT (Optical link)
PORT6 (DAC): Connect to DAC board by 10pin Port
<KM066802>
2006/12
-6-
ASAHI KASEI
[AKD4120]
(1) PORT select
(a) Input#2: Slave Mode, Output: Slave Mode
JP/SW
JP32
SDTO14
PORT
JP1
JP3 (*)
SDTO14
SDTO12
JP5
JP7
JP24
IN
OUT
JP25
JP26
S1: NO.1
Input#2
PORT5 (DIR)
(Default)
short
open
open
short
open
open
open
open
open
open
short
OFF
PORT4 (ADC)
open
short
open
short
open
open
open
open
short
open
short
OFF
(*) Input#1 and Input#2 are mixed. When Input#2 is not mixed to Input#1, JP3 should be open.
JP/SW
JP30
SDTI14
PORT
BICK14
PORT
LRCK14
PORT
JP31
JP33
JP10
JP12
JP13
JP26
S1: NO.2
Output
PORT7 (DIT)
(Default)
short
open
short
short
short
open
short
short
short
short
OFF
PORT6 (DAC)
open
short
short
short
short
short
short
short
short
short
OFF
ON 1 2 3 4 5 6 7
S1
I2MODE
OMODE
I2S
I2C
CAD0
CAD1
OFF
S1 (AK4120) set-up, Audio data format: 24bit, MSB justified (Default), Input#2: Slave Mode, Output: Slave Mode
ON 1 2 3 4 5 6 7 8
SW3
DIF0
DIF1
DIF2
MCKO0
MCKO1
CM1
OFF
SW3 (AK4114) set-up, Audio data format: 24bit, MSB justified (Default), Master Mode
(*) The AK4114 should be used in Master Mode.
<KM066802>
2006/12
-7-
ASAHI KASEI
[AKD4120]
(b) Input#2: Slave Mode, Output: Master Mode
JP/SW
JP32
SDTO14
PORT
JP1
JP3
SDTO14
SDTO12
JP5
JP7
JP24
IN
OUT
JP25
JP26
S1: NO.1
Input#2
PORT5 (DIR)
short
open
open
short
open
open
open
open
open
open
short
OFF
PORT4 (ADC)
open
short
open
short
open
open
open
open
short
open
short
OFF
JP/SW
JP30
SDTI14
PORT
JP31
BCK14
PORT
JP33
LRCK14
PORT
JP10
JP12
JP13
JP26
S1: NO.2
Output
PORT7 (DIT)
short
open
short
open
short
open
short
short
short
short
ON
PORT6 (DAC)
open
short
open
short
open
short
short
short
short
short
ON
ON 1 2 3 4 5 6 7
S1
I2MODE
OMODE
I2S
I2C
CAD0
CAD1
OFF
S1 (AK4120) set-up, Audio data format: 24bit, MSB justified (Default), Input#2: Slave Mode, Output: Master Mode
DIF0
DIF1
DIF2
MCKO0
MCKO1
CM1
ON 1 2 3 4 5 6 7 8
SW3
OFF
SW3 (AK4114) set-up, Audio data format: 24bit, MSB justified (Default), Slave Mode
(*) AK4114 should be used in Slave Mode.
<KM066802>
2006/12
-8-
ASAHI KASEI
[AKD4120]
(c) Input#2: Master Mode, Output: Slave Mode
JP/SW
JP32
SDTO14
PORT
JP1
JP3
SDTO14
SDTO12
JP5
JP7
JP24
IN
OUT
JP25
JP26
S1 : NO.1
Input#2
PORT5 (DIR)
short
open
open
short
open
open
open
open
open
open
short
ON
PORT4 (ADC)
open
short
open
short
open
open
open
open
short
open
short
ON
JP/SW
JP30
SDTI14
PORT
JP31
BCK14
PORT
JP33
LRCK14
PORT
JP10
JP12
JP13
JP26
S1: NO.2
Output
PORT7 (DIT)
short
open
short
open
short
open
short
short
short
short
OFF
PORT6 (DAC)
open
short
open
short
open
short
short
short
short
short
OFF
ON 1 2 3 4 5 6 7
S1
I2MODE
OMODE
I2S
I2C
CAD0
CAD1
OFF
S1 (AK4120) set-up, Audio data format: 24bit, MSB justified (Default), Input#2: Master Mode, Output: Slave Mode
ON 1 2 3 4 5 6 7 8
DIF0
DIF1
DIF2
MCKO0
MCKO1
CM1
SW3
OFF
SW3 (AK4114) set-up, Audio data format: 24bit, MSB justified (Default), Slave Mode
(*) AK4114 should be used in Slave Mode.
<KM066802>
2006/12
-9-
ASAHI KASEI
[AKD4120]
(d) Input#2: Master Mode, Output: Master Mode
JP/SW
JP32
SDTO14
PORT
JP1
JP3
SDTO14
SDTO12
JP5
BCK14
BCK12
JP7
LRCK14
LRCK12
JP24 IN
OUT
JP25
JP26
S1: NO.1
Input#2
PORT5 (DIR)
short
open
open
short
open
open
open
open
open
open
open
open
short
ON
PORT4 (ADC)
open
short
open
short
open
open
open
open
open
open
short
open
short
ON
JP/SW
JP30
SDTI14
PORT
JP31 BCK14
PORT
JP33 LRCK14
PORT
JP10
JP12
JP13
JP26
S1: NO.2
Output
PORT7 (DIT)
short
open
short
short
short
short
short
short
short
short
ON
PORT6 (DAC)
open
Short
short
short
short
short
short
short
short
short
ON
ON 1 2 3 4 5 6 7
S1
I2MODE
OMODE
I2S
I2C
CAD0
CAD1
OFF
S1 (AK4120) set-up, Audio data format: 24bit, MSB justified (Default), Input#2: Master Mode, Output: Master Mode
ON 1 2 3 4 5 6 7 8
DIF0
DIF1
DIF2
MCKO0
MCKO1
CM1
SW3
OFF
SW3 (AK4114) set-up, Audio data format: 24bit, MSB justified (Default), Slave Mode
(*) AK4114 should be used in Slave Mode.
<KM066802>
2006/12
- 10 -
ASAHI KASEI
[AKD4120]
(2) Output Master Clock select
Jumper NO.
JP27
X2 frequency
SW3: NO.4
SW3: NO.5
JP/X/SW
JP28
JP29
X2
SW3: NO.6
256fs(2)
(Default)
MCKO2
512fs
OFF
ON
512fs
MCKO1
512fs
OFF
ON
DIR (PORT5)
short
open
don’t care
OFF
PORT4
X’tal (X2)
(Default)
short
open
use
ON
Ex. Clock (J2)
open
short
removed
ON
When using PORT4, the setting of X’tal or Ex. Clock is used. 512fs (Default: 24.576MHz on board) should be used as X’tal
frequency.
ON 1 2 3 4 5 6 7
S1
I2MODE
OMODE
I2S
I2C
CAD0
CAD1
OFF
S1 (AK4120) set-up, Audio data format: 24bit, MSB justified (Default), Input#2: Slave Mode, Output: Slave Mode
ON 1 2 3 4 5 6 7 8
DIF0
DIF1
DIF2
MCKO0
MCKO1
CM1
SW3
OFF
SW3 (AK4114) set-up, Audio data format: 24bit, MSB justified (Default), Master Mode, DIR
ON 1 2 3 4 5 6 7 8
DIF0
DIF1
DIF2
MCKO0
MCKO1
CM1
SW3
OFF
SW3 (AK4114) set-up, Audio data format: 24bit, MSB justified (Default), Master Mode, X’tal / Ex. Clock
<KM066802>
2006/12
- 11 -
ASAHI KASEI
[AKD4120]
2-2. Path Mode 1
I2C
I2S
PDN
VDD
SDTI1
Sample
Rate
Converter
ILRCK1
VSS
Volume#1
TEST
IBICK1
DIR
AK4112B
PORT3
IMCLK1
SDTI2
PORT2
OMCLK
IMCLK2
Input#2
SDTO
Output
ILRCK2
OLRCK
IBICK2
OBICK
µ P I/F
I2MODE
CAD0
CSN/CAD1 CCLK/SDL CDTI/SDA
OMODE
AK4114
PORT7
DIT
<KM066802>
PORT6
2006/12
- 12 -
ASAHI KASEI
[AKD4120]
2-2-1. Input#2 signal set-up
When Input#2 is connected to external equipment through DIR, PORT3 is used. When the audio data comes from AKM’s ADC
board, PORT2 is used.
[Input#2]
PORT3 (DIR): DIR (Optical link)
PORT2 (ADC): Connect to ADC board with 10pin Port
(1) PORT select
Input#2: Slave Mode
Jumper NO.
JP21
BCK12
PORT
JP22
SDTO12
PORT
JP23
LRCK12
PORT
JP2
JP4
JP6
JP8
JP1
MCK12
MCK14
JP3
SDTO12
SDTO14
JP5
BCK12
BCK14
JP7
LRCK12
LRCK14
JP15
IN
OUT
JP16
JP19
PORT3 (DIR)
short
open
short
open
short
open
open
open
open
open
short
open
short
open
short
open
short
open
open
open
open
open
PORT2 (ADC)
short
short
open
short
short
short
open
open
open
open
short
open
short
open
short
open
short
open
open
short
open
short
(2) Master Clock select
Jumper NO.
JP20
X1 frequency
JP/X/SW
JP18
JP17
X1 (X’tal)
SW1: NO.5
256fs
(Default)
MCKO2
512fs
PORT3 (DIR)
short
open
don’t care
OFF
512fs
MCKO1
512fs
PORT2 (ADC)
X’tal (X1)
Ex. Clock (J1)
(Default)
short
open
open
short
use
remove
ON
ON
When using PORT2, the setting of X’tal or Ex. Clock is used. 512fs (Default: 24.576MHz on board) should be used as X’tal
frequency.
<KM066802>
2006/12
- 13 -
ASAHI KASEI
[AKD4120]
(3) The AK4120 and DIR (AK4112B) set-up
ON
1 2 3 4 5 6 7
S1
I2MODE
OMODE
I2S
I2C
CAD0
CAD1
OFF
S1 (AK4120) set-up, Audio data format: 24bit, MSB justified (Default), Input#2: Slave Mode
ON
1 2 3 4 5
SW1
DIF2
DIF1
DIF0
CM0
OFF
SW1 (AK4112B) set-up, Audio data format: 24bit, MSB justified (Default), Master Mode
(*) AK4112B should always be used in Master Mode.
2-2-2. Output signal set-up
When Output is connected to external equipment through DIT, PORT7 is used. When the audio data goes to AKM’s DAC board,
PORT6 is used.
[Output]
PORT7 (DIT): DIT (Optical link)
PORT6 (DAC): Connect to DAC board with 10pin Port
(1) PORT select
(a) Output: Slave Mode (OMODE=”L”)
JP30
JP31
JP33
JP10
JP12
JP13
JP26
S1: NO.2
JP/SW
SDTI14
PORT
BICK14
PORT
LRCK14
PORT
Output
PORT7 (DIT)
short
open
short
short
short
open
short
short
short
short
OFF
<KM066802>
PORT6 (DAC)
open
short
short
short
short
short
short
short
short
short
OFF
2006/12
- 14 -
ASAHI KASEI
[AKD4120]
ON 1 2 3 4 5 6 7
S1
I2MODE
OMODE
I2S
I2C
CAD0
CAD1
OFF
S1 (AK4120) set-up, Audio data format: 24bit, MSB justified (Default), Input#2: Slave Mode, Output: Slave Mode
ON 1 2 3 4 5 6 7 8
DIF0
DIF1
DIF2
MCKO0
MCKO1
CM1
SW3
OFF
SW3 (AK4114) set-up, Audio data format: 24bit, MSB justified (Default), Master Mode
(*) AK4114 should be used in Master Mode.
(b) Output: Master Mode (OMODE=”H”)
JP/SW
SDTI14
PORT
JP31
BCK14
PORT
JP33
LRCK14
PORT
JP10
JP12
JP13
JP26
S1: NO.2
JP30
Output
PORT7 (DIT)
short
open
short
open
short
open
short
short
short
short
ON
PORT6 (DAC)
open
short
open
short
open
short
short
short
short
short
ON
ON 1 2 3 4 5 6 7
S1
I2MODE
OMODE
I2S
I2C
CAD0
CAD1
OFF
S1 (AK4120) set-up, Audio data format: 24bit, MSB justified (Default), Input#2: Slave Mode, output: Master Mode
<KM066802>
2006/12
- 15 -
ASAHI KASEI
[AKD4120]
ON 1 2 3 4 5 6 7 8
DIF0
DIF1
DIF2
MCKO0
MCKO1
CM1
SW3
OFF
SW3 (AK4114) set-up, Audio data format: 24bit, MSB justified (Default), Slave Mode
(*) AK4114 should be used in Slave Mode.
(2) Master Clock select
Jumper NO.
JP27
X2 frequency
SW3: NO.4
SW3: NO.5
JP/X/SW
JP28
JP29
X2
SW3: NO.6
256fs(2)
(Default)
MCKO2
512fs
OFF
ON
512fs
MCKO1
512fs
OFF
ON
DIR (PORT5)
short
open
don’t care
OFF
PORT4
X’tal (X2)
(Default)
short
open
use
ON
Ex. Clock (J2)
open
short
removed
ON
When using PORT4, the setting of X’tal or Ex clock is used. 512fs (Default: 24.576MHz on board) should be used as X’tal
frequency.
ON 1 2 3 4 5 6 7
S1
I2MODE
OMODE
I2S
I2C
CAD0
CAD1
OFF
S1 (AK4120) set-up, Audio data format: 24bit, MSB justified (Default), Input#2: Slave Mode, Output: Slave Mode
DIF0
DIF1
DIF2
MCKO0
MCKO1
CM1
ON 1 2 3 4 5 6 7 8
SW3
OFF
SW3 (AK4114) set-up, Audio data format: 24bit, MSB justified (Default), Master Mode, DIR
<KM066802>
2006/12
- 16 -
ASAHI KASEI
[AKD4120]
ON 1 2 3 4 5 6 7 8
DIF0
DIF1
DIF2
MCKO0
MCKO1
CM1
SW3
OFF
SW3 (AK4114) set-up, Audio data format: 24bit, MSB justified (Default), Master Mode, X’tal / Ex. Clock
<KM066802>
2006/12
- 17 -
ASAHI KASEI
[AKD4120]
2-3. Path Mode 2
I2C
SDTI1
I2S
PDN
VDD
Input#1
VSS
ILRCK1
TEST
IBICK1
IMCLK1
OMCLK
IMCLK2
SDTI2
SDTO
Output
ILRCK2
OLRCK
Volume#2
IBICK2
OBICK
µ P I/F
I2MODE
CAD0
CSN/CAD1 CCLK/SDL CDTI/SDA
PORT4
<KM066802>
OMODE
AK4114
PORT5
DIR
Ak4114
PORT7
DIT
PORT6
2006/12
- 18 -
ASAHI KASEI
[AKD4120]
2-3-1. Input#1 signal set-up
When Input#1 interfaces external equipment through DIR, PORT5 is used. When the audio data comes from AKM’s ADC board,
PORT4 is used.
[Input#1]
PORT5 (DIR): DIR (Optical link)
PORT4 (ADC): Connect to ADC board with 10pin Port
(1) PORT select
Input#1: Slave Mode
Jumper NO.
JP21
BCK12
PORT
JP22
SDTO12
PORT
JP23
LRCK12
PORT
JP2
MCK14
MCK12
JP4
SDTO14
SDTO12
JP6
BCK14
BCK12
JP8
LRCK14
LRCK12
JP32
SDTO14
PORT
JP1
MCK12
MCK14
JP3
SDTO12
SDTO14
JP5
BCK12
BCK14
JP7
LRCK12
LRCK14
JP15
IN
OUT
JP16
JP19
JP24
IN
OUT
JP25
JP26
Input#1
PORT3 (DIR)
open
open
open
open
open
open
short
open
short
open
short
open
short
open
short
open
open
open
open
open
open
open
open
open
open
open
open
open
open
open
open
short
PORT2 (ADC)
open
open
open
open
open
open
short
open
short
open
short
open
short
open
open
short
open
open
open
open
open
open
open
open
open
open
open
open
open
short
open
short
<KM066802>
2006/12
- 19 -
ASAHI KASEI
[AKD4120]
(2) Input#1 Master Clock select
Jumper NO.
JP27
X2 frequency
SW3: NO.4
SW3: NO.5
JP/X/SW
JP28
JP29
X2
SW3: NO.6
256fs(2)
(Default)
MCKO2
512fs
OFF
ON
512fs
MCKO1
512fs
OFF
ON
DIR(PORT5)
short
open
use
OFF
PORT4
X’tal (X2)
(Default)
short
open
use
ON
Ex. Clock (J2)
open
short
removed
ON
When using PORT4, the setting of X’tal or Ex. Clock is used. 512fs (Default: 24.576MHz on board) should be used as X’tal
frequency.
ON 1 2 3 4 5 6 7
S1
I2MODE
OMODE
I2S
I2C
CAD0
CAD1
OFF
S1 (AK4120) set-up, Audio data format: 24bit, MSB justified (Default), Input#1: Slave Mode
ON 1 2 3 4 5 6 7 8
DIF0
DIF1
DIF2
MCKO0
MCKO1
CM1
SW3
OFF
SW3 (AK4114) set-up, Audio data format: 24bit, MSB justified (Default), Master Mode, DIR
ON 1 2 3 4 5 6 7 8
DIF0
DIF1
DIF2
MCKO0
MCKO1
CM1
SW3
OFF
SW3 (AK4114) set-up, Audio data format: 24bit, MSB justified (Default), Master Mode, X’tal / Ex. Clock
<KM066802>
2006/12
- 20 -
ASAHI KASEI
[AKD4120]
2-3-2. Output signal set-up
When Output is connected to external equipment through DIT, PORT7 is used. When the audio data goes to AKM’s DAC board,
PORT6 is used.
[Output]
PORT7 (DIT): DIT (Optical link)
PORT6 (DAC): Connect to DAC board with 10pin Port
(1) PORT select
Output: Slave Mode
JP/SW
JP30
SDTO14
PORT
JP31
BCK14
PORT
JP33
LRCK14
PORT
JP10
JP12
JP13
JP26
S1: NO.2
Output
PORT7 (DIT)
short
open
short
open
short
open
open
open
open
short
ON
PORT6 (DAC)
open
short
short
short
short
short
open
open
open
short
ON
ON 1 2 3 4 5 6 7
S1
I2MODE
OMODE
I2S
I2C
CAD0
CAD1
OFF
S1 (AK4120) set-up, Audio data format: 24bit, MSB justified (Default), Output: Slave Mode
ON 1 2 3 4 5 6 7 8
DIF0
DIF1
DIF2
MCKO0
MCKO1
CM1
SW3
OFF
SW3 (AK4114) set-up, Audio data format: 24bit, MSB justified (Default), Master Mode
(*) The AK4114 should be used in Master Mode.
<KM066802>
2006/12
- 21 -
ASAHI KASEI
[AKD4120]
2-4.Path Mode 3
I2C
I2S
PDN
VDD
SDTI1
VSS
ILRCK1
TEST
IBICK1
IMCLK1
OMCLK
IMCLK2
SDTI2
Input#2
SDTO
Output
Volume#2
ILRCK2
OLRCK
IBICK2
OBICK
µ P I/F
I2MODE
CAD0
CSN/CAD1 CCLK/SDL CDTI/SDA
PORT4
<KM066802>
OMODE
AK4114
PORT5
DIT
Ak4114
PORT7
DIT
PORT6
2006/12
- 22 -
ASAHI KASEI
[AKD4120]
2-4-1. Input#2 signal set-up
When Input#2 interfaces external equipment through DIR, PORT5 is used. When the audio data comes from AKM’s ADC board,
PORT4 is used.
[Input#2]
PORT5 (DIR): DIR (Optical link)
PORT4 (ADC): Connect to ADC board with 10pin Port
(1) PORT select
Jumper NO.
JP21
BCK12
PORT
JP22
SDTO12
PORT
JP23
LRCK12
PORT
JP2
MCK14
MCK12
JP4
SDTO14
SDTO12
JP6
BCK14
BCK12
JP8
LRCK14
LRCK12
JP32
SDTO14
PORT
JP1
MCK12
MCK14
JP3
SDTO12
SDTO14
JP15
IN
OUT
JP12
JP13
JP16
JP19
JP24
IN
OUT
JP25
JP26
Input#2
PORT3 (DIR)
open
open
open
open
open
open
open
open
open
open
open
open
open
open
short
open
open
open
open
short
open
open
open
open
open
open
open
open
open
short
PORT2 (ADC)
open
open
open
open
open
open
open
open
open
open
open
open
open
open
open
short
open
open
open
short
open
open
open
open
open
open
open
short
open
short
<KM066802>
2006/12
- 23 -
ASAHI KASEI
[AKD4120]
(a) Input#2: Slave Mode, Output: Slave Mode
Jumper NO.
JP5
JP7
S1: NO1
PORT5 (DIR)
open
open
OFF
PORT4 (ADC)
open
open
OFF
ON 1 2 3 4 5 6 7
S1
I2MODE
OMODE
I2S
I2C
CAD0
CAD1
OFF
S1 (AK4120) set-up, Audio data format: 24bit, MSB justified (Default), Input#2: Slave Mode, Output: Slave Mode
ON 1 2 3 4 5 6 7 8
DIF0
DIF1
DIF2
MCKO0
MCKO1
CM1
SW3
OFF
SW3 (AK4114) set-up, Audio data format: 24bit, MSB justified (Default), Master Mode
(*) AK4114 should be used in Master Mode.
(b) Input#2: Master Mode, Output: Master Mode
NO.
BCK14
BCK12
JP7
LRCK14
LRCK12
S1: NO.1
JP5
PORT5 (DIR)
short
open
short
open
ON
PORT4 (ADC)
short
open
short
open
ON
ON 1 2 3 4 5 6 7
S1
I2MODE
OMODE
I2S
I2C
CAD0
CAD1
OFF
S1 (AK4120) set-up, Audio data format: 24bit, MSB justified (Default), Input#2: Master Mode, Output: Master Mode
<KM066802>
2006/12
- 24 -
ASAHI KASEI
[AKD4120]
ON 1 2 3 4 5 6 7 8
DIF0
DIF1
DIF2
MCKO0
MCKO1
CM1
SW3
OFF
SW3 (AK4114) set-up, Audio data format: 24bit, MSB justified (Default), Slave Mode
(*) AK4114 should be used in Slave Mode.
2-4-2. Output signal set-up
When Output is connected to external equipment through DIT, PORT7 is used. When the audio data goes to AKM’s DAC board,
PORT6 is used.
[Output]
PORT7 (DIT): DIT (Optical link)
PORT6 (DAC): Connect to DAC board with 10pin Port
(1) PORT select
(a) Output: Slave Mode (OMODE=”L”)
JP/SW
SDTI14
PORT
BICK14
PORT
LRCK14
PORT
JP30
JP31
JP33
JP10
JP12
JP13
JP26
S1: NO.2
Output
PORT7 (DIT)
short
open
short
open
short
open
short
short
short
short
OFF
PORT6 (DAC)
open
short
short
short
short
short
short
short
short
short
OFF
ON 1 2 3 4 5 6 7
S1
I2MODE
OMODE
I2S
I2C
CAD0
CAD1
OFF
S1 (AK4120) set-up, Audio data format: 24bit, MSB justified (Default), Input#2: Slave Mode, Output: Slave Mode
<KM066802>
2006/12
- 25 -
ASAHI KASEI
[AKD4120]
ON 1 2 3 4 5 6 7 8
DIF0
DIF1
DIF2
MCKO0
MCKO1
CM1
SW3
OFF
SW3 (AK4114) set-up, Audio data format: 24bit, MSB justified (Default), Master Mode
(*) AK4114 should be used in Master Mode.
(b) Output: Master Mode (OMODE=”H”)
JP/SW
JP30
Output
PORT7 (DIT)
PORT6 (DAC)
short
open
short
open
short
open
short
short
short
short
ON
open
short
open
short
open
short
short
short
short
short
ON
SDTI14
PORT
BICK14
PORT
LRCK14
PORT
JP31
JP33
JP10
JP12
JP13
JP26
S1: NO.2
ON 1 2 3 4 5 6 7
S1
I2MODE
OMODE
I2S
I2C
CAD0
CAD1
OFF
S1 (AK4120) set-up, Audio data format: 24bit, MSB justified (Default), Input#2: Master Mode, Output: Master Mode
ON 1 2 3 4 5 6 7 8
DIF0
DIF1
DIF2
MCKO0
MCKO1
CM1
SW3
OFF
SW3 (AK4114) set-up, Audio data format: 24bit, MSB justified (Default), Slave Mode
(*) AK4114 should be used in Slave Mode.
<KM066802>
2006/12
- 26 -
ASAHI KASEI
[AKD4120]
(2) Output Master Clock select
Jumper NO.
JP27
X2 frequency
SW3: NO.4
SW3: NO.5
JP/X/SW
JP28
JP29
X2
SW3: NO.6
256fs(2)
(Default)
MCKO2
512fs
OFF
ON
512fs
MCKO1
512fs
OFF
ON
DIR (PORT5)
short
open
don’t care
OFF
PORT4
X’tal (X2)
(Default)
short
open
use
ON
Ex. Clock (J2)
open
short
removed
ON
When using PORT4, the setting of X’tal or Ex. Clock is used. 512fs (Default: 24.576MHz on board) should be used as X’tal
frequency.
ON 1 2 3 4 5 6 7
S1
I2MODE
OMODE
I2S
I2C
CAD0
CAD1
OFF
S1 (AK4120) set-up, Audio data format: 24bit, MSB justified (Default), Input#2: Slave Mode, Output: Slave Mode
ON 1 2 3 4 5 6 7 8
DIF0
DIF1
DIF2
MCKO0
MCKO1
CM1
SW3
OFF
SW3 (AK4114) set-up (Default), Audio data format: 24bit, MSB justified (Default), Master Mode, DIR
ON 1 2 3 4 5 6 7 8
DIF0
DIF1
DIF2
MCKO0
MCKO1
CM1
SW3
OFF
SW3 (AK4114) set-up (Default), Audio data format: 24bit, MSB justified (Default), Master Mode, X’tal / Ex. Clock
<KM066802>
2006/12
- 27 -
ASAHI KASEI
[AKD4120]
3. Audio data format of AK4120
Audio data format and master clock frequency between the AK4120 and AK4112B/AK4114 should be the same condition.
S1: NO.3
L
L
L
L
H
00H: D1
0
0
1
1
X
00H: D0
0
1
0
1
X
SDTI1
20bit, MSB justified
20bit, I2S
20bit, LSB justified
16bit, LSB justified
2
20bit, I S
LRCK
H/L
L/H
H/L
H/L
L/H
Default
Table 4. Audio data formats of SDTI1 in serial control mode
S1: NO.3
L
L
L
L
H
00H: D3
0
0
1
1
X
00H: D2
0
1
0
1
X
SDTI2
20bit, MSB justified
20bit, I2S
20bit, LSB justified
16bit, LSB justified
2
20bit, I S
LRCK
H/L
L/H
H/L
H/L
L/H
Default
Table 5. Audio data formats of SDTI2 in serial control mode
S1: NO3
L
L
L
L
H
00H: D5
0
0
1
1
X
00H: D4
0
1
0
1
X
SDTO
20bit, MSB justified
20bit, I2S
20bit, LSB justified
16bit, LSB justified
2
20bit, I S
LRCK
H/L
L/H
H/L
H/L
L/H
Default
Table 6. Audio data formats of SDTO in serial control mode
Note) When the Audio data format is changed, the AK4120 should be powered down using “PW” bit.
<KM066802>
2006/12
- 28 -
ASAHI KASEI
[AKD4120]
„ Jumper pins and DIP switches setup
1. AK4120 set-up
(1) Jumper
JP9
open (Default)
(2) S1
No
1
2
3
4
5
6
2.
Pin
I2MIODE
OMODE
I2S
I2C
CAD0
CAD1
OFF (Default)
Slave
Slave
Set-up by Register
3 wire serial
0
0
ON
Master
Master
I2S
I2C
1
1
AK4112B set-up
(1) Audio I/F select (SW1)
Audio I/F
24bit, MSB justified
24bit, I2S
24bit, LSB justified
16bit, LSB justified
24bit, MSB justified
24bit, I2S
No.2
DIF2
1
1
0
0
1
1
I/O
O
O
O
O
I
I
No.3
DIF1
0
0
1
0
1
1
No.4
DIF0
0
1
0
0
0
1
Default
(2) Master Clock (SW1)
Clock
PLL (DIR)
X’tal (External)
3.
No.5
0
1
Default
AK4114 set-up
(1) Audio I/F select (SW3)
SDTI
24bit, MSB justified
24bit, MSB justified
24bit, MSB justified
24bit, I2S
24bit, MSB justified
24bit, I2S
SDTO
16bit, LSB justified
20bit, LSB justified
24bit, MSB justified
24bit, I2S
24bit, MSB justified
24bit, I2S
I/O
O
O
O
O
I
I
No.3
DIF2
0
0
1
1
1
1
No.2
DIF1
0
1
0
0
1
1
No.1
DIF0
0
0
0
1
0
1
Default
(2) Master Clock Speed (SW3)
MCKO1
MCKO2
256fs
512fs
256fs
256fs
No.5
OCKS1
0
1
No.4
OCKS0
0
0
<KM066802>
Default
2006/12
- 29 -
ASAHI KASEI
[AKD4120]
(3) Master Mode (SW3)
Clock source
PLL
X’tal
NO.6
CM0
0
1
Default
„ Jumper list
JP No.
Jumper Name
1,2
3,4
5,6
7,8
9
TEST
10
OMCLK
11
D3V
12
OBICK
13
OLRCK
14
15
16
LRCKP1N
17
EX-CLK1
Function
IMCLK1 and IMCLK2 input device set-up.
MCK12: AK4112B (Default)
MCK14: AK4114
SDTI1 and SDTI2 input device set-up
SDTO12: AK4112B (Default)
SDTO14: AK4114
IBICK1 and IBICK2 input device set-up
BCK12: AK4112B (Default)
BCK14: AK4114
ILRCK1 and ILRCK2 input device set-up
LRCK12: AK4112B (Default)
LRCK14: AK4114
This jumper is connected GND.
Connection of OMCLK (AK4120) and MCKO1 or MCKO2 (AK4114)
Short: Connect (Default)
Open: Separate
Power supply source set-up for VDD of AK4120.
Short: Supply from 3V-1V Jack (Default)
Open: Supply from VCC-3V Jack
Connection of OBICK (AK4120) and BICK (AK4114)
Short: Connect (Default)
Open: Separate
Connection of OLRCK (AK4120) and LRCK (AK4114)
Short: Connect (Default)
Open: Separate
Serial control I/F set-up for AK4120
CAD1: 3 wire Serial (Default)
CSN: I2C
Connection of PORT2 and 74LVC541 input pin/ output pin
IN: Connect input pin
OUT: Connect output pin
Open: NC (Default)
Connection of 74LVC541 and JP23
Open: Separate (Default)
Short: Connect
Connection of J1 (BNC) and XTI (AK4112B 5pin)
Open: Separate (Default)
Short: Connect
<KM066802>
2006/12
- 30 -
ASAHI KASEI
JP No.
Jumper Name
18
EXT
19
MCKPORT1
20
MCK12
21
22
23
24
25
LRCKP2IN
26
MCKPORT2
27
28
29
EX_CLK2
30
31
32
33
[AKD4120]
Function
Connection of BNC line (J1) and GND
Short: Connect (Default)
Open: Separate
Connection of PORT2 and MCK12 (JP20)
Short: Connect (Default)
Open: Separate
Selection of MCKO1 (AK4112B) or MCKO2 (AK4112B)
MCKO1: MCKO1 (AK4112B)
MCKO2: MCKO2 (AK4112B) (Default)
Connection of BICK (AK4112B) or PORT2
PORT: PORT2
BCK12: BICK (AK4112B) (Default)
Connection of SDTO (AK4112B) or PORT2
PORT: PORT2
SDTO12: SDTO (AK4112B) (Default)
Connection of LRCK (AK4112B) or PORT2
PORT: PORT2
LRCK12: LRCK (AK4112B) (Default)
Connection of PORT4 and 74LVC541 input pin/output pin
IN: Connect input pin
OUT: Connect output pin
Open: NC (Default)
Connection of 74LVC541 and JP33
Open: Separate (Default)
Short: Connect
Connection of PORT4 and JP27
Short: Connect (Default)
Open: Separate
Selection of MCKO1 (AK4114) or MCKO2 (AK4114)
MCKO1: MCKO1 (AK4114)
MCKO2: MCKO2 (AK4114) (Default)
Connection of BNC line (J2) and GND
Short: Connect (Default)
Open: Separate
Connection of J2 (BNC) and XTI (AK4114 30pin)
Open: Separate (Default)
Short: Connect
Connection of DAUX (AK4114) or PORT4
PORT: PORT4
SDTI14: DAUX (AK4114) (Default)
Connection of BICK (AK4114) or PORT4
PORT: PORT4
BCK14: BICK (AK4114) (Default)
Connection of SDTO (AK4114) or PORT4
PORT: PORT4
SDTO14: SDTO (AK4114) (Default)
Connection of LRCK (AK4114) or PORT4
PORT: PORT4
LRCK14: LRCK (AK4114) (Default)
<KM066802>
2006/12
- 31 -
ASAHI KASEI
[AKD4120]
„ Toggle switch set-up
Reset switch for AK4120, AK41112B and AK4114. Set to “H” during operation. Bring to
“L” once after the power is supplied.
SW2
„ LED indication
1
Bright when ERF pin goes to “H”.
„ Serial Control
The AK4120 can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT1
(CTRL) with PC by 10-wire flat cable packed with the AKD4120.
Be careful connector direction. Flat cable should be connected 10-pin header, red line put on 10pin header 5 and 6
pin.
1
10
CSN
CCLK/SCL
Connect
CDTI/SDA AKD4120
PC
CDTO/ACK
RED
10 wire flat cable
5
6
10 pin Connector
10 pin Header
Figure 6. Connection of 10-pin flat cable
<KM066802>
2006/12
- 32 -
ASAHI KASEI
[AKD4120]
CONTROL SOFTWARE MANUAL
„ Set-up of evaluation board and control software
1. Set up the AKD4120 according to previous term.
2. Connect IBM-AT compatible PC with AKD4120 by 10-line type flat cable (packed with AKD4120). Take care of the
direction of 10pin header. (Please install the driver in the CD-ROM when this control software is used on Windows
2000/XP. Please refer “Installation Manual of Control Software Driver by AKM device control software”. In case of
Windows95/98/ME, this installation is not needed. This control software does not operate on Windows NT.)
3. Insert the CD-ROM labeled “AKD4120 Evaluation Kit” into the CD-ROM drive.
4. Access the CD-ROM drive and double-click the icon of “akd4120.exe” to set up the control program.
5. Then please evaluate according to the follows.
„ Operation flow
Keep the following flow.
1. Set up the control program according to explanation above.
2. Click “Port Reset” button.
3. Click “Write default” button
„ Explanation of each buttons
1. [Port Reset]:
2. [Write default]:
3. [All Write]:
4. [Function1]:
5. [Function2]:
6. [Function3]:
7. [Function4]:
8. [Function5]:
9. [SAVE]:
10. [OPEN]:
11. [Write]:
Set up the USB interface board (AKDUSBIF-A) when using the board.
Initialize the register of the AK4120.
Write all registers that are currently displayed.
Dialog to write data by keyboard operation.
Dialog to write data by keyboard operation.
The sequence of register setting can be set and executed.
The sequence that is created on [Function3] can be assigned to buttons and executed.
The register setting that is created by [SAVE] function on main window can be assigned to
buttons and executed.
Save the current register setting.
Write the saved values to all register.
Dialog to write data by mouse operation.
„ Indication of data
Input data is indicated on the register map. Red letter indicates “H” or “1” and blue one indicates “L” or “0”. Blank is the
part that is not defined in the datasheet.
<KM066802>
2006/12
- 33 -
ASAHI KASEI
[AKD4120]
„ Explanation of each dialog
1. [Write Dialog]: Dialog to write data by mouse operation
There are dialogs corresponding to each register.
Click the [Write] button corresponding to each register to set up the dialog. If you check the check box, data becomes
“H” or “1”. If not, “L” or “0”.
If you want to write the input data to the AK4120, click [OK] button. If not, click [Cancel] button.
2. [Function1 Dialog]: Dialog to write data by keyboard operation
Address Box:
Data Box:
Input registers address in 2 figures of hexadecimal.
Input registers data in 2 figures of hexadecimal.
If you want to write the input data to the AK4120, click [OK] button. If not, click [Cancel] button.
3. [Function2 Dialog]: Dialog to evaluate DATT
There are dialogs corresponding to register of 03H, 04H, 05H and 06H
Address Box:
Input registers address in 2 figures of hexadecimal.
Start Data Box:
Input starts data in 2 figures of hexadecimal.
End Data Box:
Input end data in 2 figures of hexadecimal.
Interval Box:
Data is written to the AK4120 by this interval.
Step Box:
Data changes by this step.
Mode Select Box:
If you check this check box, data reaches end data, and returns to start data.
[Example]
Start Data = 00, End Data = 09
Data flow: 00 01 02 03 04 05 06 07 08 09 09 08 07 06 05 04 03 02 01 00
If you do not check this check box, data reaches end data, but does not return to start data.
[Example]
Start Data = 00, End Data = 09
Data flow: 00 01 02 03 04 05 06 07 08 09
If you want to write the input data to the AK4120, click [OK] button. If not, click [Cancel] button.
<KM066802>
2006/12
- 34 -
ASAHI KASEI
[AKD4120]
4. [SAVE] and [OPEN]
4-1. [SAVE]
All of current register setting values displayed on the main window are saved to the file. The extension of file name is
“akr”.
<Operation flow>
(1) Click [SAVE] Button.
(2) Set the file name and click [SAVE] Button. The extension of file name is “akr”.
4-2. [OPEN]
The register setting values saved by [SAVE] are written to the AK4120. The file type is the same as [SAVE].
<Operation flow>
(1) Click [OPEN] Button.
(2) Select the file (*.akr) and Click [OPEN] Button.
<KM066802>
2006/12
- 35 -
ASAHI KASEI
[AKD4120]
5. [Function3 Dialog]
The sequence of register setting can be set and executed.
(1) Click [F3] Button.
(2) Set the control sequence.
Set the address, Data and Interval time. Set “-1” to the address of the step where the sequence should be paused.
(3) Click [START] button. Then this sequence is executed.
The sequence is paused at the step of Interval= “-1”. Click [START] button, the sequence restarts from the paused step.
This sequence can be saved and opened by [SAVE] and [OPEN] button on the Function3 window. The extension of file
name is “aks”.
Figure 1. Window of [F3]
<KM066802>
2006/12
- 36 -
ASAHI KASEI
[AKD4120]
6. [Function4 Dialog]
The sequence file (*.aks) saved by [Function3] can be listed up to 10 files, assigned to buttons and then executed.
When [F4] button is clicked, the window as shown in Figure 2 opens.
Figure 2. [F4] window
<KM066802>
2006/12
- 37 -
ASAHI KASEI
[AKD4120]
6-1. [OPEN] buttons on left side and [START] buttons
(1) Click [OPEN] button and select the sequence file (*.aks) saved by [Function3].
The sequence file name is displayed as shown in Figure 3. (In case that the selected sequence file name is
“DAC_Stereo_ON.aks”)
Figure 3. [F4] window(2)
(2) Click [START] button, then the sequence is executed.
6-2. [SAVE] and [OPEN] buttons on right side
[SAVE]: The name assign of sequence file displayed on [Function4] window can be saved to the file. The file name is
“*.ak4”.
[OPEN]: The name assign of sequence file (*.ak4) saved by [SAVE] is loaded.
6-3. Note
(1) This function doesn't support the pause function of sequence function.
(2) All files used by [SAVE] and [OPEN] function on right side need to be in the same folder.
(3) When the sequence is changed in [Function3], the sequence file (*.aks) should be loaded again in order to reflect the
change.
<KM066802>
2006/12
- 38 -
ASAHI KASEI
[AKD4120]
7. [Function5 Dialog]
The register setting file(*.akr) saved by [SAVE] function on main window can be listed up to 10 files, assigned to
buttons and then executed. When [F5] button is clicked, the window as shown in Figure 4 opens.
Figure 4. [F5] window
7-1. [OPEN] buttons on left side and [WRITE] button
(1) Click [OPEN] button and select the register setting file (*.akr).
(2) Click [WRITE] button, then the register setting is executed.
7-2. [SAVE] and [OPEN] buttons on right side
[SAVE]: The name assign of register setting file displayed on [Function5] window can be saved to the file. The file
name is “*.ak5”.
[OPEN]: The name assign of register setting file (*.ak5) saved by [SAVE] is loaded.
7-3. Note
(1) All files used by [SAVE] and [OPEN] function on right side need to be in the same folder.
(2) When the register setting is changed by [SAVE] Button on the main window, the register setting file (*.akr) should be
loaded again in order to reflect the change.
<KM066802>
2006/12
- 39 -
ASAHI KASEI
[AKD4120]
MEASUREMENT RESULTS
[Measurement condition]
• Measurement unit : Audio Precision System two Cascade
• MCLK
: 256fs
• BICK
: 64fs
: fsin=44.1kHz, fsout=48kHz
• fs
: 20Hz∼20kHz
• BW
: 20bit
• Resolution
• Power Supply
: VDD=3.3V
• Interface
: DIR, DIT
• Temperature
: Room
fsin=44.1kHz, fsout=48kHz
Parameter
Input signal
S/(N+D)
1kHz, 0dB
DR
1kHz, -60dB
Measurement filter
20kLPF
20kLPF, A-weighted
Lch
113dB
115dB
Rch
113dB
115dB
„ Plots
[Measurement condition]
• Measurement unit: Audio Precision System two Cascade
: 256fs
• MCLK
: 64fs
• BICK
: 44.1kHz, 48kHz
• fs
• BW
: 20Hz∼20kHz (fsin=44.1kHz, fsout=48kHz)
• Resolution
: 20bit
: VDD=3.3V
• Power Supply
: DIR, DIT
• Interface
: Room
• Temperature
Figure 7. FFT (1kHz, 0dBFS input)
AK4 120 sample rate co nverrt FF T (fsin=44 .1kHz, fsout=4 8kHz; fin=1kHz, 0dBF S inp ut)
FF T po ints=16 384 , Avg =8, window=Equirip ple
+0
-10
-20
-30
-40
-50
-60
-70
d
B
F
S
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
la s t.at2c
Figure.7. FFT(fsin=44.1kHz, fsout=48kHz; fin=1kHz, 0dBFS input)
<KM066802>
2006/12
- 40 -
ASAHI KASEI
[AKD4120]
Revision History
Date
Manual
Board
Reason
(YY/MM/DD) Revision Revision
01/09/28
KM066800
0
First Edition
01/12/26
KM066801
1
Circuit Change
06/12/11
KM066802
1
Contents
X’tal Frequency Change
X1: 24.576MHzÆ22.5792MHz
X2: 11.2896MHzÆ24.576MHz
Control Software Control Software Change: Ver.1.0Æ2.0
Manual Change
Evaluation Board Jumper pins and DIP switches set up correct
Manual Correct
IMPORTANT NOTICE
• These products and their specifications are subject to change without notice. Before considering any use or
application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or authorized distributor
concerning their current status.
• AKM assumes no liability for infringement of any patent, intellectual property, or other right in the application or
use of any information contained herein.
• Any export of these products, or devices or systems containing them, may require an export license or other
official approval under the law and regulations of the country of export pertaining to customs and tariffs,
currency exchange, or strategic materials.
• AKM products are neither intended nor authorized for use as critical components in any safety, life support, or
other hazard related device or system, and AKM assumes no responsibility relating to any such use, except with
the express written consent of the Representative Director of AKM. As used here:
(a) A hazard related device or system is one designed or intended for life support or maintenance of safety or
for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or
perform may reasonably be expected to result in loss of life or in significant injury or damage to person or
property.
(b) A critical component is one whose failure to function or perform may reasonably be expected to result,
whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it,
and which must therefore meet very high standards of performance and reliability.
• It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or otherwise
places the product with a third party to notify that party in advance of the above content and conditions, and the
buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any
and all claims arising from the use of said product in the absence of such notification.
<KM066802>
2006/12
- 41 -
5
4
3
2
1
JP1
D3V
S1
8
9
10
11
12
13
14
7
6
5
4
3
2
1
MCK12
MCK12
SDTO12
SDTO14
D
SDTO12
JP3
JP4
CN2
47
47
1
1
IMCLK2
IMCLK1
24
BCK12
BCK14
R-PACK6R
BCK12
2
2
220k
SDTI2
SDTI1
23
BCK12
BCK14
220k
23
BCK14
R7
R8
47
220k
JMP2x2
R11
JP5BCK12
R4
R6
47
D
47
24
R5
JP6
SDTO12
SDTO14
R2
R3
CAD1
CAD0
I2C
I2S
OMODE
I2MODE
U1
CN1
SDTO12
SDTO14
R1
SDTO14
RP1
7
6
5
4
3
2
1
MCK12
MCK14
MCK14
JP2
MCK14
MCK14
SW DIP-7
MCK12
R12
47
220k
3
3
IBICK1
IBICK2
22
22
4
4
ILRCK1
ILRCK2
21
21
5
5
TEST
I2MODE
20
20
6
6
I2S
VDD
19
R9
R10
47
220k
R13
JP7
R14
47
220k
LRCK12
LRCK14
LRCK12
LRCK14
BCK14
R15
220k
LRCK12
LRCK12
LRCK14
LRCK14
JP8
I2S
C1
0.1u
JMP2x2
VCC_3V
C
R18
3V
0
I2C
7
7
I2C
CAD0
8
8
CAD0
+
R16
I2MODE
220k
3V
19
C2
10u
JP10
VSS
18
18
OMODE
17
17
OMCLK
R17
OMODE
+
0.1u
C4
47u
JP11
PW
CSN/CAD1
9
9
CSN/CAD1
OMCLK
16
16
CCLK/SCL
10
10
CCLK/SCL
SDTO
15
15
CDTI/SDA
CAD1
11
11
R100B
10k
12
12
PDN
CDTI/SDA
OBICK
PDN
OLRCK
14
13
R19
R21
14
1
R22
220k
R23
13
R24
220k
R101B
47
47
47
SDTI14
JP12
OBICK
BCK14
JP13
OCLRK
LRCK14
R25
AK4120
220k
15k
2
R20
220k
JP14
CAD1
C
47
D3V
C3
MCK14
R27
470
1.8k
R29
470
R30
1.8k
R31
470
D3V
20
1.8k
R28
PORT1
10
9
8
7
6
CSN
SCL/CCLK
SDA/CDTI
SDA(ACK)
R37
100
CSN
R34
100
CCLK
51
uP-I/F
1
U3A
2
74LS07
B
U2
2
3
4
5
6
7
8
9
1
19
A1
A2
A3
A4
A5
A6
A7
A8
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
18
17
16
15
14
13
12
11
R33
100
CSN/CAD1
R35
100
CCLK/SCL
R36
100
CDTI/SDA
G1
G2
10
1
2
3
4
5
R32
VCC
R26
GND
D5V
B
3
CSN
74LVC541A
R38
CDTI/SDA
D3V
1.8k
A
A
Title
AK4120
Size
A3
Date:
5
4
3
2
Document Number
AK4120
Thursday, December 13, 2001
Rev
A
Sheet
1
1
of
6
5
4
3
D5V
SW1
1
2
3
4
5
BCKP1
LRCKP1
R42
R43
R44
220k
220k
220k
R1_DIF2
R1_DIF1
R1_DIF0
R1_CM0
R41
TDIF0
R1_DIF2
R1_DIF1
R1_DIF0
R1_CM0
220k
6
5
4
3
2
1
R40
RP2
220k
LRCKP1IN
SDTIP1IN
MODE
D
D3V
MCKP1
10
9
8
7
6
2
1
U4
2
3
4
5
6
7
8
9
A1
A2
A3
A4
A5
A6
A7
A8
1
19
G1
G2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
18
17
16
15
14
13
12
11
IN
LRCKP1IN
OUT
IMCLK
IBICK
ILRCK
SDTI
JP15
1
2
3
4
5
PORT2
10
9
8
7
6
#1
LRCK
R39 10k
D5V
D
SDTIP1IN
74LVC541
JP16
LRCKP1IN
47k
LRCKP1
U5
SDTIP1
C5
10u
J1
EX_CLK1
TEST1
MCKIN12
R45
51
1
+
C7
C8
10u
0.1u
D5V
D5V
DVDD
CM0/CDTO
28
R1_CM0
C6
0.1u
+
D3V
2
DVSS
CM1/CDTI
27
3
TVDD
OCKS1/CCLK
26
OCKS0/CSN
25
MCKO1
24
D5V
MCKP1
R46
1
2
V/TX
5
XTI
C9
74HC14
EXT
4
PDN
2
X1
22.5792 MHz
10k
1
3
4
6
74HC14
6
XTO
MCKO2
23
7
PDN
DAUX
22
8
R
BICK
21
1
SW2
C11
DIR
0.1u
MCKO2
BCKP1
C12
10u
+
9
AVDD
SDTO
20
10
AVSS
LRCK
19
11
RX1
ERF
18
PORT
0.1u
10u
1
D5V
C15
C16
C17
0.1u
0.1u
0.1u
U7A
+
1
R50
2
74HCT04
R1_DIF0
2
12
RX2/DIF0
FS96
SDTO12
LED1
2
1k
1
LRCKP1
ERF
PORT
17
D5V
JP23
LRCK12
B
LRCK12
C14
47u
JP22
SDTO12
C13
470
1
B
L1
VCC
SDTIP1
BCK12
BCK12
R49
for 74HC14, 74HCT04,
74HCT541
JP21
PORT
18k
D3V
C
MCK12
R48
2
3
5
74HC14
H
(open)
U6C
TEST2
MCK12
2
C10
U6B
L
MCK12
MCKO1
3
R47
D1
HSU119
JP19
MCKPORT1
JP20
(open)
1
51
JP18
C
JP17 EX_CLK1
U6A
R1_DIF1
13
RX3/DIF1
P/S
16
R1_DIF2
14
RX4/DIF2
AUTO
15
D5V
L2
47u
6
5
5
3V_1
D3V
+
C21
C20
47u
GND
VCC
GND
OUT
DIR1
4
3
2
1
2
PORT3
6
C18
0.1u
+ C19
10u
AK4112B
0.1u
A
A
Title
AK4120
Size
A3
Date:
5
4
3
2
Document Number
INPUT1
Thursday, December 13, 2001
Rev
A
Sheet
1
2
of
6
5
4
3
2
1
D5V
1
L3
D5V
47u
R57
C24
220k
D3V
R56
DIF0
DIF1
DIF2
OCKS0
OCKS1
CM0
LRCKP2
SDTOP2
LRCKP2IN
SDTIP2IN
220k
9
8
7
6
5
4
3
2
1
10u
0.1u
R55
RP3
+ C23
C22
R54
DIR1
220k
5
BCKP2
220k
5
D
4
3
2
1
GND
VCC
GND
OUT
R53
6
220k
6
LRCKP2IN
U8
MCKP2
PORT5
R52
16
15
14
13
12
11
10
9
220k
1
2
3
4
5
6
7
8
D3V
2
DIF0
DIF1
DIF2
OCKS0
OCKS1
CM1
SW3
2
3
4
5
6
7
8
9
A1
A2
A3
A4
A5
A6
A7
A8
1
19
G1
G2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
LRCKPORT2
D5V
D
10k
74HC541
+
10u
1
2
3
4
5
0.1u
JP25
18k
TEST3
MCKIN14
C26
51
DIF0
JP29
DIF1
EX_CLK2
C27
DIF2
OPEN
DIF1
DIF2
D3V
XTI
2
DIF0
X2
C28
IPS0/RX4
AVSS
DIF0/RX5
TEST2
DIF1/RX6
AVSS
DIF2/RX7
IPS1/IIC
P/SN
XTL0
XTL1
VIN
XTO
1
U9
AK4114
36
35
34
33
32
31
30
29
28
27
26
25
INT0
OCKS0/CSN
OCKS1/CCLK
CM1/CDTI
CM0/CDTO
PDN
XTI
XTO
DAUX
MCKO2
BICK
SDTO
TVDD
DVSS
TX0
TX1
BOUT
COUT
UOUT
VOUT
DVDD
DVSS
MCKO1
LRCK
EXT
1
2
3
4
5
6
7
8
9
10
11
12
OCKS0
OCKS1
10u
+
5
6
5
6
IN
VCC
IF
GND
TOTX176
B
0.1u
4
3
2
1
XTO R62
R63
R64
R65
PORT
47
47
47
47
JP30
SDTI14
SDTI14
47
PORT
R67
JP31
BCK14
BCK14
47
D5V
0.1u
C32
10u
OPT
R68
1k
C
C31
C30
PORT7
+
C29
MCK14
SDTOP2
CM0
PDN
XTI
BCKP2
R66
D5V
SDTIP2
MCKPORT2
MCKO1
13
14
15
16
17
18
19
20
21
22
23
24
OPEN 24.576 MHz
MCKO2
10k
LRCKP2
JP26
JP27
DIT MCLK
RX3
AVSS
RX2
TEST1
RX1
AVSS
RX0
AVSS
VCOM
R
AVDD
INT1
51
JP28
#1
D5V
48
47
46
45
44
43
42
41
40
39
38
37
R61
PORT6
10
9
8
7
6
R59
LRCKP2IN
MCKP2
0.47u
+
J2
C
#1
R51
R58
R60
SDTIP2IN
OUT
18
17
16
15
14
13
12
11
C25
47k
EX_CLK2
IN
1
2
3
4
5
JP24
PORT4
10
9
8
7
6
SDTIP2
D3V
PORT
C33
LRCKP2
0.1u
JP32
SDTO14
SDTO14
B
JP33
LRCK14
JMP2x2
A
A
Title
Ak4120
Size
A3
Date:
5
4
3
2
Document Number
OUTPUT
Thursday, December 13, 2001
Rev
A
Sheet
1
3
of
6
L1 Silk
Logo
L1 Pattern
L2 Pattern