CM1210 1, 2, 4 and 8-Channel Very Low Capacitance ESD Protectors Features Product Description • • • The CM1210 family of diode arrays has been designed to provide ESD protection for electronic components or sub-systems requiring minimal capacitive loading. These devices are ideal for protecting systems with high data and clock rates or for circuits requiring low capacitive loading. Each ESD channel consists of a pair of diodes which will steer the ESD current pulse to either the positive (VP) or negative (VN) supply rail. The CM1210 will protect against ESD pulses up to +6KV per the IEC 61000-4-2 standard. • • 1,2,4 and 8 channels of ESD protection Very low loading capacitance (1.0pF typical) +6 kV ESD protection per channel (IEC 61000-4-2 standard) Available in SOT23, SOT143, SC70 and MSOP packages Lead-free versions available Applications • • • • • • USB2.0 ports at 480Mbps IEEE1394 Firewire ports at 400Mbps Gigabit Ethernet ports Flat panel display interfaces Wireless antennas General purpose high-speed data line ESD protection This device is particularly well-suited for systems using high-speed port implementations such as USB2.0, IEEE1394 (Firewire, i.Link), Gigabit Ethernet and corresponding ports in removable storage, digital camcorders, DVD-RW drives and other applications where extremely low loading capacitance with ESD protection are required in a small package footprint. The CM1210 family of devices is optionally available with lead-free finishing. Electrical Schematics VP VP CH1 CH1 VP CH3 CH1 VN CH2 CH2 VN VN CM1210-01ST/SO CM1210-01SC/S7 CH4 CM1210-02ST/SO CM1210-02SC/S7 CH7 CH8 CH1 CH2 VP CM1210-04ST/SO CH5 CH6 CH3 CH4 VN CM1210-08MS/MR © 2004 California Micro Devices Corp. All rights reserved. 01/14/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲ Tel: 408.263.3214 ▲ Fax: 408.263.7846 ▲ www.calmicro.com 1 CM1210 PACKAGE / PINOUT DIAGRAMS Top View Top View 1 VN 3 VN CH1 2 VP 3-Pin SOT23-3 3-Pin SC70-3 Top View Top View 1 CH1 1 VN 4 CH1 2 CH2 5-pin SC70-5 3 4 VP 2 3 CH2 4-Pin SOT143-4 Top View CH4 6 VP 5 CH3 4 CH1 1 CH2 2 CH3 3 CH4 4 VN 5 10 CH8 9 CH7 D10/D108 3 VP CH2 D10/D104 2 VN 5 D10/D112 VN 1 VN D10/D111 D10/D101 3 2 VP 1 CH1 D10/D102 CH1 Top View 8 VP 7 CH6 6 CH5 10-pin MSOP-10 6-pin SOT23-6 Note: These drawings are not to scale. SOT23-3 & SC70-3 PACKAGE PIN DESCRIPTIONS SOT143-4 PACKAGE PIN DESCRIPTIONS PIN NAME TYPE DESCRIPTION DESCRIPTION 1 VN GND Negative voltage supply rail ESD Channel 2 CH1 I/O ESD Channel PWR Positive voltage supply rail 3 CH2 I/O ESD Channel GND Negative voltage supply rail 4 VP PWR PIN NAME TYPE 1 CH1 I/O 2 VP 3 VN SC70-5 PACKAGE PIN DESCRIPTIONS Positive voltage supply rail MSOP-10 PACKAGE PIN DESCRIPTIONS PIN NAME TYPE DESCRIPTION PIN NAME TYPE 1 VN GND Negative voltage supply rail 1 CH1 I/O ESD Channel 2 VN GND Negative voltage supply rail 2 CH2 I/O ESD Channel 3 VP PWR Positive voltage supply rail 3 CH3 I/O ESD Channel CH4 I/O ESD Channel DESCRIPTION 4 CH1 I/O ESD Channel 4 5 CH2 I/O ESD Channel 5 VN GND 6 CH5 I/O 7 CH6 I/O 8 VP PWR 9 CH7 I/O ESD Channel 10 CH8 I/O ESD Channel SOT23-6 PACKAGE PIN DESCRIPTIONS PIN NAME TYPE 1 CH1 I/O 2 VN GND 3 CH2 I/O 4 CH3 I/O 5 VP PWR 6 CH4 I/O DESCRIPTION ESD Channel Negative voltage supply rail Negative voltage supply rail ESD Channel ESD Channel Positive voltage supply rail ESD Channel ESD Channel Positive voltage supply rail ESD Channel © 2004 California Micro Devices Corp. All rights reserved. 2 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲ Tel: 408.263.3214 ▲ Fax: 408.263.7846 ▲ www.calmicro.com 01/14/04 CM1210 Ordering Information PART NUMBERING INFORMATION Standard Finish Lead-free Finish Ordering Part Ordering Part Pins Package Number1 Part Marking Number1 Part Marking 3 SOT23-3 CM1210-01ST D10 CM1210-01SO D101 3 SC70-3 CM1210-01SC D10 CM1210-01S7 D111 4 SOT143-4 CM1210-02ST D10 CM1210-02SO D102 5 SC70-5 CM1210-02SC D10 CM1210-02S7 D112 6 SOT23-6 CM1210-04ST D10 CM1210-04SO D104 10 MSOP-10 CM1210-08MS D10 CM1210-08MR D108 Note 1: Parts are shipped in Tape & Reel form unless otherwise specified. Specifications ABSOLUTE MAXIMUM RATINGS PARAMETER RATING UNITS 8.0 V 8 mA Operating Temperature Range -40 to +85 °C Storage Temperature Range -65 to +150 °C (VN - 0.5) to (VP + 0.5) V 225 200 225 200 225 400 mW mW mW mW mW mW RATING UNITS -40 to +85 °C 0 to 5.5 V Supply Voltage (VP - VN) Diode Forward DC Current (Note 1) DC Voltage at any channel input Package Power Rating SOT23-3 Package (CM1210-01ST/SO) SC70-3 Package (CM1210-01SC/S7) SOT143 Package (CM1210-02ST/SO) SC70-5 Package (CM1210-02SC/S7) SOT23-6 Package (CM1210-04ST/SO) MSOP10 Package (CM1210-08MS/MR) Note 1: Only one diode conducting at a time. STANDARD OPERATING CONDITIONS PARAMETER Operating Temperature Range Operating Supply Voltage (VP - VN) © 2004 California Micro Devices Corp. All rights reserved. 01/14/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲ Tel: 408.263.3214 ▲ Fax: 408.263.7846 ▲ www.calmicro.com 3 CM1210 ELECTRICAL OPERATING CHARACTERISTICS (SEE NOTE 1) SYMBOL PARAMETER CONDITIONS IP Supply Current (VP-VN)=3.3V VF Diode Forward Voltage Top Diode Bottom Diode IF = 8mA ILEAK CIN VESD VCL MIN 0.60 0.60 Channel Leakage Current Channel Input Capacitance At 1 MHz, VP=3.3V, VN=0V, VIN=1.65V; Note 2 applies ESD Protection Peak Discharge Voltage at any channel input, in system a) Contact discharge per IEC 61000-4-2 standard Notes 2,3 and 5; TA=25°C Channel Clamp Voltage CM1210-01ST, CM1210-01SC, CM1210-02ST, CM1210-02SC Positive Transients Negative Transients At 8kV ESD HBM; Notes 2 & 4 Channel Clamp Voltage CM1210-04ST, CM1210-08MS Positive Transients Negative Transients At 8kV ESD HBM; Notes 2 & 4 MAX UNIT S 8.0 µA 0.80 0.80 0.95 0.95 V V +0.1 +1.0 µA 1.0 1.3 pF TYP +6 kV VP + 10.0 VN - 10.0 V V VP + 13.0 VN - 13.0 V V Note 1: All parameters specified at TA = -40°C to +85°C unless otherwise noted. Note 2: These parameters guaranteed by design and characterization. Note 3: From I/O pins to VP or VN only. VP bypassed to VN with a 0.22µF ceramic capacitor (see Application Information for more details). Note 4: Human Body Model per MIL-STD-883, Method 3015, CDischarge = 100pF, RDischarge = 1.5KΩ, VP = 3.3V, VN grounded. Note 5: Standard IEC 61000-4-2 with CDischarge = 150pF, RDischarge = 330Ω, VP = 3.3V, VN grounded. © 2004 California Micro Devices Corp. All rights reserved. 4 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲ Tel: 408.263.3214 ▲ Fax: 408.263.7846 ▲ www.calmicro.com 01/14/04 CM1210 Performance Information Input Channel Capacitance Performance Curves Input Capacitance (pF) 2 1.5 1 0.5 0 0 0.5 1 1.5 2 2.5 3 Input Voltage (V) Typical Variation of CIN vs. VIN Input Capacitance (pF) (f=1MHz, VP = 3.3V, V N = 0V, 0.1 µF chip capacitor between VP and V N, 25°C ) 1.25 1.20 1.15 1.10 1.05 1.00 0.95 0.90 0.85 0.80 0.75 0V DC Input Bias 1.65V DC Input Bias -50 -25 0 25 50 75 100 Temperature (°C) Typical Variation of CIN vs. Temp (f=1MHz, VIN=30mV, V P = 3.3V, V N = 0V, 0.1 µF chip capacitor between VP and VN) © 2004 California Micro Devices Corp. All rights reserved. 01/14/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲ Tel: 408.263.3214 ▲ Fax: 408.263.7846 ▲ www.calmicro.com 5 CM1210 Performance Information (Cont’d) Typical Filter Performance (nominal conditions unless specified otherwise, 50 Ohm Environment) TEST CIRCUIT P1 P2 VP(3.3V) I/On GND Figure 1. Insertion Loss (S21) VS. Frequency (0V DC Bias, VP=3.3V) TEST CIRCUIT P1 P2 VP(3.3V) I/On GND Figure 2. Insertion Loss (S21) VS. Frequency (2.5V DC Bias, VP=3.3V) © 2004 California Micro Devices Corp. All rights reserved. 6 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲ Tel: 408.263.3214 ▲ Fax: 408.263.7846 ▲ www.calmicro.com 01/14/04 CM1210 Application Information Design Considerations a ROUT of 1 ohm would result in a 10V increment in VCL for a peak IESD of 10A. In order to realize the maximum protection against ESD pulses, care must be taken in the PCB layout to minimize parasitic series inductances on the Supply/ Ground rails as well as the signal trace segment between the signal input (typically a connector) and the ESD protection device. Refer to Figure 3, which illustrates an example of a positive ESD pulse striking an input channel. The parasitic series inductance back to the power supply is represented by L 1 and L2. The voltage VCL on the line being protected is: If the inductances and resistance described above are close to zero, the rail-clamp ESD protection diodes will do a good job of protection. However, since this is not possible in practical situations, a bypass capacitor must be used to absorb the very high frequency ESD energy. So for any brand of rail-clamp ESD protection diodes, a bypass capacitor should be connected between the VP pin of the diodes and the ground plane (VN pin of the diodes) as shown in the Application Circuit diagram below. A value of 0.22µF is adequate. Ceramic chip capacitors mounted with short printed circuit board traces are good choices for this application. Electrolytic capacitors should be avoided as they have poor high frequency characteristics. For extra protection, connect a zener diode in parallel with the bypass capacitor to mitigate the effects of the parasitic series inductance inherent in the capacitor. The breakdown voltage of the zener diode should be slightly higher than the maximum supply voltage. VCL = Fwd voltage drop of D1 + VSUPPLY + L1 x d(IESD ) / dt + L2 x d(IESD ) / dt where IESD is the ESD current pulse, and VSUPPLY is the positive supply voltage. An ESD current pulse can rise from zero to its peak value in a very short time. As an example, a level 4 contact discharge per the IEC61000-4-2 standard results in a current pulse that rises from zero to 30 Amps in 1ns. Here d(IESD)/dt can be approximated by ∆IESD/∆t, or 30/(1x10 -9). So just 910nH of series inductance (L1 and L2 combined) will lead to a 300V increment in VCL! As a general rule, the ESD Protection Array should be located as close as possible to the point of entry of expected electrostatic discharges. The power supply bypass capacitor mentioned above should be as close to the VP pin of the Protection Array as possible, with minimum PCB trace lengths to the power supply, ground planes and between the signal input and the ESD device to minimize stray series inductance. Similarly for negative ESD pulses, parasitic series inductance from the VN pin to the ground rail will lead to drastically increased negative voltage on the line being protected. Another consideration is the output impedance of the power supply for fast transient currents. Most power supplies exhibit a much higher output impedance to fast transient current spikes. In the VCL equation above, the VSUPPLY term, in reality, is given by (VDC + IESD x ROUT), where VDC and ROUT are the nominal supply DC output voltage and effective output impedance of the power supply respectively. As an example, Additional Information See also California Micro Devices Application Notes AP209, “Design Considerations for ESD Protection” and APxxx, "ESD Protection for USB 2.0 Systems". L2 POSITIVE SUPPLY RAIL VP PATH OF ESD CURRENT PULSE IESD 0.22µF D1 D2 L1 ONE CHANNEL OF CM1210 LINE BEING PROTECTED SYSTEM OR CIRCUITRY BEING PROTECTED CHANNEL INPUT 20A VCL 0A GROUND RAIL VN Figure 3. Application of Positive ESD Pulse between Input Channel and Ground © 2004 California Micro Devices Corp. All rights reserved. 01/14/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲ Tel: 408.263.3214 ▲ Fax: 408.263.7846 ▲ www.calmicro.com 7 CM1210 Mechanical Details The CM1210 is available in SOT23-3, SC70-3, SC705, SOT23-6, SOT143-4 and MSOP-10 packages.The various package drawings are presented below. SOT23-3 Mechanical Specifications Dimensions for CM1210 devices packaged in 3-pin SOT23 packages are presented below. Mechanical Package Diagrams For complete information on the SOT23-3 package, see the California Micro Devices SOT23 Package Information document. TOP VIEW b 3 PACKAGE DIMENSIONS E1 E Package SOT23-3 (JEDEC name is TO-236) Pins 3 Dimensions Millimeters Min Max Min 0.89 1.12 0.0350 0.0441 0.01 0.10 0.0004 0.0039 b 0.30 0.50 0.0118 0.0197 c 0.08 0.20 0.0031 0.0079 D 2.80 3.04 0.1102 0.1197 E 2.10 2.64 0.0827 0.1039 E1 1.20 1.40 0.0472 0.0551 e1 L L1 # per tape and reel SIDE VIEW D A1 A 0.0374 BSC 1.90 BSC 0.40 e Max A 0.95 BSC 2 e1 Inches A1 e 1 0.0748 BSC 0.60 0.54 REF 0.0157 END VIEW 0.0236 0.0213 REF 3000 pieces c L1 L Controlling dimension: millimeters Package Dimensions for SOT23-3. © 2004 California Micro Devices Corp. All rights reserved. 8 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲ Tel: 408.263.3214 ▲ Fax: 408.263.7846 ▲ www.calmicro.com 01/14/04 CM1210 Mechanical Details (cont’d) SOT23-6 Mechanical Specifications CM1210 devices are packaged in 6-pin SOT23 packages. Dimensions are presented below. Mechanical Package Diagrams For complete information on the SOT23-6 package, see the California Micro Devices SOT23 Package Information document. PACKAGE DIMENSIONS SOT23-6 (JEDEC name is MO-178) Pins 6 Millimeters Min Max Min -- 1.45 -- 0.0571 0.00 0.15 0.0000 0.0059 b 0.30 0.50 0.0118 0.0197 c 0.08 0.22 0.0031 0.0087 D 2.75 3.05 0.1083 0.1201 E 2.60 3.00 0.1024 0.1181 E1 1.45 1.75 0.0571 0.0689 e1 L L1 # per tape and reel 5 4 1 2 3 b SIDE VIEW D A A1 0.0374 BSC 1.90 BSC 0.30 6 Max A 0.95 BSC e E1 E Inches A1 e e1 Pin 1 Marking Package Dimensions TOP VIEW 0.0748 BSC 0.60 0.60 REF 0.0118 END VIEW 0.0236 0.0236 REF 3000 pieces c L1 L Controlling dimension: millimeters Package Dimensions for SOT23-6. © 2004 California Micro Devices Corp. All rights reserved. 01/14/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲ Tel: 408.263.3214 ▲ Fax: 408.263.7846 ▲ www.calmicro.com 9 CM1210 Mechanical Details (cont’d) SOT143 Mechanical Specifications Dimensions for CM1210 devices packaged in 4-pin SOT143 packages are presented below. Mechanical Package Diagrams For complete information on the SOT143 package, see the California Micro Devices SOT143 Package Information document. TOP VIEW e 4 3 PACKAGE DIMENSIONS Package SOT143 Pins 4 Dimensions Millimeters Min Max E1 E 1 Inches Min A 0.80 1.22 0.031 0.048 0.05 0.15 0.002 0.006 b 0.30 0.50 0.012 0.019 b2 0.76 0.89 0.030 0.035 c 0.08 0.20 0.003 0.008 D 2.80 3.04 0.110 0.119 E 2.10 2.64 0.082 0.103 E1 1.20 1.40 0.047 0.055 e 1.92 BSC 0.075 BSC e1 0.20 BSC 0.008 BSC L1 # per tape and reel 0.4 0.6 0.54 REF 0.016 e1 Max A1 L 2 SIDE VIEW D A b2 b A1 END VIEW 0.024 0.021 REF c 3000 pieces L L1 Controlling dimension: millimeters Package Dimensions for SOT143. © 2004 California Micro Devices Corp. All rights reserved. 10 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲ Tel: 408.263.3214 ▲ Fax: 408.263.7846 ▲ www.calmicro.com 01/14/04 CM1210 Mechanical Details (cont’d) SC70-3 Mechanical Specifications Dimensions for CM1210 devices packaged in 3-pin SC70 packages are presented below. Mechanical Package Diagrams For complete information on the SC70-3 package, see the California Micro Devices SC70 Package Information document. TOP VIEW B 3 E1 E PACKAGE DIMENSIONS 1 Package SC70-3 (JEDEC name is MO-203 Issue A) Pins 3 Dimensions e e Millimeters Min Max A 0.80 1.10 A1 0.00 0.10 A2 0.70 1.00 B 0.15 0.30 c 0.08 0.25 D 1.85 2.25 E1 1.15 1.35 e SIDE VIEW D A2 A A1 END VIEW 0.65 BSC E 2.00 2.40 L 0.26 0.46 # / tape and reel 2 c 3000 pieces L Package Dimensions for SC70-3. © 2004 California Micro Devices Corp. All rights reserved. 01/14/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲ Tel: 408.263.3214 ▲ Fax: 408.263.7846 ▲ www.calmicro.com 11 CM1210 Mechanical Details (cont’d) SC70-5 Mechanical Specifications: Dimensions for CM1210 devices packaged in 5-pin SC70 packages are presented below. Mechanical Package Diagrams For complete information on the SC70-5 package, see the California Micro Devices SC70 Package Information document. TOP VIEW e e 5 E1 E PACKAGE DIMENSIONS 1 Package SC70-5 (JEDEC name is MO-203 Issue A) Pins 5 Dimensions 2 3 B Millimeters Min Max A 0.80 1.10 A1 0.00 0.10 A2 0.70 1.00 B 0.15 0.30 c 0.08 0.25 D 1.85 2.25 E1 1.15 1.35 e SIDE VIEW D A2 A A1 END VIEW 0.65 BSC E 2.00 2.40 L 0.26 0.46 # / tape and reel 4 3000 pieces c L Package Dimensions for SC70-5. © 2004 California Micro Devices Corp. All rights reserved. 12 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲ Tel: 408.263.3214 ▲ Fax: 408.263.7846 ▲ www.calmicro.com 01/14/04 CM1210 Mechanical Details (cont’d) MSOP Mechanical Specifications CM1210 devices are packaged in 10-pin MSOP packages. Dimensions are presented below. Mechanical Package Diagrams For complete information on the MSOP-10 package, see the California Micro Devices MSOP Package Information document. TOP VIEW D 10 9 8 6 7 PACKAGE DIMENSIONS Package MSOP Pins 10 Dimensions Max Min Max A 0.75 0.95 0.028 0.038 A1 0.05 0.15 0.002 0.006 B 0.18 0.40 0.006 0.016 0.18 1 0.007 2.90 3.10 0.114 0.122 E 2.90 3.10 0.114 0.122 0.50 BSC 0.0196 BSC H 4.76 5.00 0.187 0.197 L 0.40 0.70 0.0137 0.029 # per tube 80 pieces* # per tape and reel 4000 2 3 5 4 SIDE VIEW D e Pin 1 Marking Inches Min C E H Millimeters A SEATING PLANE A1 B e END VIEW C Controlling dimension: inches * This is an approximate number which may vary. L Package Dimensions for MSOP-10 © 2004 California Micro Devices Corp. All rights reserved. 01/14/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲ Tel: 408.263.3214 ▲ Fax: 408.263.7846 ▲ www.calmicro.com 13