CM1213A 1-, 2- and 4-Channel Low Capacitance ESD Protection Arrays Features Product Description • • The CM1213A family of diode arrays has been designed to provide ESD protection for electronic components or sub-systems requiring minimal capacitive loading. These devices are ideal for protecting systems with high data and clock rates or for circuits requiring low capacitive loading. Each ESD channel consists of a pair of diodes in series which steer the positive or negative ESD current pulse to either the positive (VP) or negative (VN) supply rail. A Zener diode is embedded between VP and VN, offering two advantages. First, it protects the VCC rail against ESD strikes, and second, it eliminates the need for a bypass capacitor that would otherwise be needed for absorbing positive ESD strikes to ground. The CM1213A will protect against ESD pulses up to ±8kV per the IEC 61000-4-2 standard and using the MIL STD-883D (Method 3015) specification for Human Body Model (HBM) ESD, all pins are protected from contact discharges of greater than ±15kV. • • • • • • • 1, 2 and 4 channels of ESD protection Provides ESD protection to IEC61000-4-2 Level 4 - 8kV contact discharge - 15kV air discharge Low channel input capacitance of 0.85pF typical Minimal capacitance change with temperature and voltage Channel input capacitance matching of 0.02pF typical is ideal for differential signals Mutual capacitance between signal pin and adjacent signal pin - 0.11pF typical Zener diode protects supply rail and eliminates the need for external by-pass capacitors Each I/O pin can withstand over 1000 ESD strikes Available in SOT and MSOP lead-free packages Applications • • • • • • USB2.0 ports at 480Mbps in desktop PCs, notebooks and peripherals IEEE1394 Firewire® ports at 400Mbps / 800Mbps DVI ports, HDMI ports in notebooks, set top boxes, digital TVs, LCD displays Serial ATA ports in desktop PCs and hard disk drives PCI Express ports General purpose high-speed data line ESD protection These devices are particularly well-suited for protecting systems using high-speed ports such as USB 2.0, IEEE1394 (Firewire®, iLink™), Serial ATA, DVI, HDMI and corresponding ports in removable storage, digital camcorders, DVD-RW drives and other applications where extremely low loading capacitance with ESD protection are required in a small package footprint. The CM1213A family of devices is available with leadfree finishing. Electrical Schematics VP CH1 VP CH1 VN CM1213A-01SO CH4 VP CH3 CH1 VN CH2 CH2 VN CM1213A-02SO CM1213A-02SR CM1213A-04SO CM1213A-04MR © 2007 California Micro Devices Corp. All rights reserved. 04/03/07 490 N. McCarthy Blvd., Milpitas, CA 95035-5112 l Tel: 408.263.3214 l Fax: 408.263.7846 l www.cmd.com 1 CM1213A Package / Pinout Diagrams PACKAGE / PINOUT DIAGRAMS TOP VIEW TOP VIEW CH1 (1) 3-Lead SOT23-3 VN (2) 2 CH1 (3) 3 1 CH2 (3) 5 4 3 4 CH2 (4) CH4 (6) 1 CH1 (2) 2 4 VP (4) 3 CH2 (3) 4-Lead SOT143-4 CH1 (1) 1 10 NC (10) NC (2) 2 9 CH4 (9) VP (3) 3 8 VN (8) CH2 (4) 4 7 NC (7) NC (5) 5 6 CH3 (6) VP (5) CH3 (4) VN (1) TOP VIEW D237 2 D234 VN (2) 6 VP (5) 5-Lead SOT23-5 TOP VIEW CH1 (1) 5 D232 VP (2) 1 D233 D231 VN (3) NC (1) TOP VIEW 6-Lead SOT23-6 10-Lead MSOP-10 Note: These drawings are not to scale. Pin Descriptions PIN 1 2 3 PIN 1 2 3 4 PIN 1 2 3 4 5 1-CHANNEL, 3-LEAD SOT23-3 PACKAGE NAME TYPE DESCRIPTION CH1 I/O ESD Channel VP PWR Positive voltage supply rail VN GND Negative voltage supply rail 2-CHANNEL, 4-LEAD SOT143-4 PACKAGE NAME TYPE DESCRIPTION VN GND Negative voltage supply rail CH1 I/O ESD Channel CH2 I/O ESD Channel VP PWR Positive voltage supply rail 2-CHANNEL, 5-LEAD SOT23-5 PACKAGE NAME TYPE DESCRIPTION NC No Connect VN GND Negative voltage supply rail CH1 I/O ESD Channel CH2 I/O ESD Channel VP PWR Positive voltage supply rail PIN 1 2 3 4 5 6 4-CHANNEL, 6-LEAD SOT23-6 PACKAGES NAME TYPE DESCRIPTION CH1 I/O ESD Channel VN GND Negative voltage supply rail CH2 I/O ESD Channel CH3 I/O ESD Channel VP PWR Positive voltage supply rail CH4 I/O ESD Channel PIN 1 2 3 4 5 6 7 8 9 10 4-CHANNEL, 10-LEAD MSOP-10 PACKAGE NAME TYPE DESCRIPTION CH1 I/O ESD Channel NC No Connect VP PWR Positive voltage supply rail CH2 I/O ESD Channel NC No Connect CH3 I/O ESD Channel NC No Connect VN GND Negative voltage supply rail CH4 I/O ESD Channel NC No Connect Ordering Information PART NUMBERING INFORMATION # of Channels 1 Leads 3 Package SOT23-3 2 2 4 4 4 5 6 10 SOT143-4 SOT23-5 SOT23-6 MSOP-10 Lead-free Finish Ordering Part Number1 Part Marking 2 D231 CM1213A-01SO CM1213A-02SR2 CM1213A-02SO2 CM1213A-04SO CM1213A-04MR D232 D233 D234 D237 Note 1: Parts are shipped in Tape & Reel form unless otherwise specified. Note 2: Available Q2 ’07. © 2007 California Micro Devices Corp. All rights reserved. 2 490 N. McCarthy Blvd., Milpitas, CA 95035-5112 l Tel: 408.263.3214 l Fax: 408.263.7846 l www.cmd.com 04/03/07 CM1213A Specifications ABSOLUTE MAXIMUM RATINGS PARAMETER Operating Supply Voltage (VP - VN) Operating Temperature Range Storage Temperature Range DC Voltage at any channel input RATING 6.0 UNITS V –40 to +85 –65 to +150 (VN - 0.5) to (VP + 0.5) °C °C V STANDARD OPERATING CONDITIONS PARAMETER Operating Temperature Range Package Power Rating SOT23-3, SOT143-4,SOT23-5 and SOT23-6 Packages MSOP-10 Package RATING –40 to +85 UNITS °C 225 400 mW mW ELECTRICAL OPERATING CHARACTERISTICS(SEE NOTE 1) SYMBOL PARAMETER Operating Supply Voltage (VP-VN) VP CONDITIONS MIN IP Operating Supply Current (VP-VN)=3.3V VF Diode Forward Voltage Top Diode Bottom Diode Channel Leakage Current IF = 8mA; TA=25°C ILEAK CIN TYP 3.3 0.60 0.60 TA=25°C; VP=5V, VN=0V MAX 5.5 UNITS V 8.0 μA 0.80 0.80 ±0.1 0.95 0.95 ±1.0 V V μA 1.2 pF Channel Input Capacitance At 1 MHz, VP=3.3V, VN=0V, VIN=1.65V; Note 2 applies 0.85 Channel Input Capacitance Matching At 1 MHz, VP=3.3V, VN=0V, VIN=1.65V; Note 2 applies 0.02 pF CMUTUAL Mutual Capacitance between signal pin and adjacent signal pin At 1 MHz, VP=3.3V, VN=0V, VIN=1.65V; Note 2 applies 0.11 pF VESD ESD Protection - Peak Discharge Voltage at any channel input, in system a) Contact discharge per IEC 61000-4-2 standard b) Human Body Model, MIL-STD-883, Method 3015 ΔCIN VCL RDYN Notes 2, 4 & 5; TA=25°C ±8 kV Notes 2, 3 & 5; TA=25°C ±15 kV Channel Clamp Voltage Positive Transients Negative Transients TA=25°C, IPP = 1A, tP = 8/20μS; Notes 2, & 5 Dynamic Resistance Positive Transients Negative Transients IPP = 1A, tP = 8/20μS Any I/O pin to Ground; Note 2 and 5 Note 1: Note 2: Note 3: Note 4: Note 5: +9.96 –1.6 V V 0.96 0.5 Ω Ω All parameters specified at TA = –40°C to +85°C unless otherwise noted. These parameters guaranteed by design and characterization. Human Body Model per MIL-STD-883, Method 3015, CDischarge = 100pF, RDischarge = 1.5KΩ, VP = 3.3V, VN grounded. Standard IEC 61000-4-2 with CDischarge = 150pF, RDischarge = 330Ω, VP = 3.3V, VN grounded. These measurements performed with no external capacitor on VP (VP floating). © 2007 California Micro Devices Corp. All rights reserved. 04/03/07 490 N. McCarthy Blvd., Milpitas, CA 95035-5112 l Tel: 408.263.3214 l Fax: 408.263.7846 l www.cmd.com 3 CM1213A Performance Information Input Channel Capacitance Performance Curves Input Capacitance (pF) 2.0 1.5 1.0 0.5 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 Input Voltage (V) Typical Variation of CIN vs. VIN (f=1MHz, VP = 3.3V, VN = 0V, 0.1 μF chip capacitor between VP and VN, 25°C) Input Capacitance (pF) 1.10 1.05 0V DC Input Bias 1.00 1.65V DC Input Bias 0.95 0.90 0.85 0.80 0.75 -50 -25 0 25 50 Temperature (°C) 75 100 Typical Variation of CIN vs. Temp (f=1MHz, VIN=30mV, VP = 3.3V, VN = 0V, 0.1 μF chip capacitor between VP and VN) © 2007 California Micro Devices Corp. All rights reserved. 4 490 N. McCarthy Blvd., Milpitas, CA 95035-5112 l Tel: 408.263.3214 l Fax: 408.263.7846 l www.cmd.com 04/03/07 CM1213A Performance Information (cont’d) Typical Filter Performance (nominal conditions unless specified otherwise, 50 Ohm Environment) Figure 1. Insertion Loss (S21) VS. Frequency (0V DC Bias, VP=3.3V) Figure 2. Insertion Loss (S21) VS. Frequency (2.5V DC Bias, VP=3.3V) © 2007 California Micro Devices Corp. All rights reserved. 04/03/07 490 N. McCarthy Blvd., Milpitas, CA 95035-5112 l Tel: 408.263.3214 l Fax: 408.263.7846 l www.cmd.com 5 CM1213A Application Information Design Considerations inductance L2 on VCL by clamping VP at the breakdown voltage of the Zener diode. However, for the lowest possible VCL, especially when VP is biased at a voltage significantly below the Zener breakdown voltage, it is recommended that a 0.22μF ceramic chip capacitor be connected between VP and the ground plane. In order to realize the maximum protection against ESD pulses, care must be taken in the PCB layout to minimize parasitic series inductances on the Supply/ Ground rails as well as the signal trace segment between the signal input (typically a connector) and the ESD protection device. Refer to Figure 3, which illustrates an example of a positive ESD pulse striking an input channel. The parasitic series inductance back to the power supply is represented by L1 and L2. The voltage VCL on the line being protected is: As a general rule, the ESD Protection Array should be located as close as possible to the point of entry of expected electrostatic discharges. The power supply bypass capacitor mentioned above should be as close to the VP pin of the Protection Array as possible, with minimum PCB trace lengths to the power supply, ground planes and between the signal input and the ESD device to minimize stray series inductance. VCL = Fwd voltage drop of D1 + VSUPPLY + L1 x d(IESD) / dt + L2 x d(IESD) / dt where IESD is the ESD current pulse, and VSUPPLY is the positive supply voltage. Additional Information An ESD current pulse can rise from zero to its peak value in a very short time. As an example, a level 4 contact discharge per the IEC61000-4-2 standard results in a current pulse that rises from zero to 30 Amps in 1ns. Here d(IESD)/dt can be approximated by See also California Micro Devices Application Note AP209, “Design Considerations for ESD Protection,” in the Applications section at www.calmicro.com. ΔIESD/Δt, or 30/(1x10-9). So just 10nH of series inductance (L1 and L2 combined) will lead to a 300V increment in VCL! Similarly for negative ESD pulses, parasitic series inductance from the VN pin to the ground rail will lead to drastically increased negative voltage on the line being protected. The CM1213A has an integrated Zener diode between VP and VN. This greatly reduces the effect of supply rail L 2 VP POSITIVE SUPPLY RAIL VCC PATH OF ESD CURRENT PULSE IESD 0.22μF L1 D1 ONE CHANNEL LINE BEING PROTECTED SYSTEM OR CIRCUITRY BEING PROTECTED CHANNEL INPUT D2 OF 25A CM1213 VCL 0A GROUND RAIL VN CHASSIS GROUND Figure 3. Application of Positive ESD Pulse between Input Channel and Ground © 2007 California Micro Devices Corp. All rights reserved. 6 490 N. McCarthy Blvd., Milpitas, CA 95035-5112 l Tel: 408.263.3214 l Fax: 408.263.7846 l www.cmd.com 04/03/07 CM1213A Mechanical Details The CM1213A is available in SOT23-3, SOT143-4, SOT23-5, SOT23-6, and MSOP-10 packages with a lead-free finishing option. The various package drawings are presented below. SOT23-3 Mechanical Specifications, 3 pin The CM1213A is supplied in a 3-pin SOT23 package. Dimensions are presented below. Mechanical Package Diagrams For complete information on the SOT23-3, see the California Micro Devices SOT23 Package Information document. TOP VIEW b PACKAGE DIMENSIONS Package SOT23-3 (JEDEC name is TO-236) JEDEC No. TO-236 (Var. AB) Pins/Leads Dimensions 3 E1 E 1 3 Millimeters Inches Min Max Min Max A 0.89 1.12 0.0350 0.0441 A1 0.01 0.10 0.0004 0.0039 b 0.30 0.50 0.0118 0.0197 c 0.08 0.20 0.0031 0.0079 D 2.80 3.04 0.1102 0.1197 E 2.10 2.64 0.0827 0.1039 E1 1.20 1.40 0.0472 0.0551 e 0.95 BSC 0.0374 BSC e1 1.90 BSC 0.0748 BSC L 0.40 L1 0.60 0.54 REF # per tape and reel 2 0.0157 e1 e SIDE VIEW D A1 A END VIEW 0.0236 0.0213 REF 3000 pieces c Controlling dimension: millimeters L1 L Package Dimensions for SOT23-3 © 2007 California Micro Devices Corp. All rights reserved. 04/03/07 490 N. McCarthy Blvd., Milpitas, CA 95035-5112 l Tel: 408.263.3214 l Fax: 408.263.7846 l www.cmd.com 7 CM1213A Mechanical Details (cont’d) SOT143 Mechanical Specifications, 4 pin The CM1213A is packaged in a 4-pin SOT143 package. Dimensions are presented below. Mechanical Package Diagrams TOP VIEW For complete information on the SOT143 package, see the California Micro Devices SOT143 Package Information document. e PACKAGE DIMENSIONS Package SOT143 Pins 4 Dimensions 4 E1 E 1 Millimeters Min Max Min Max e1 A 0.80 1.22 0.031 0.048 0.05 0.15 0.002 0.006 b 0.30 0.50 0.012 0.019 b2 0.76 0.89 0.030 0.035 c 0.08 0.20 0.003 0.008 D 2.80 3.04 0.110 0.119 E 2.10 2.64 0.082 0.103 E1 1.20 1.40 0.047 0.055 e 1.92 BSC 0.075 BSC e1 0.20 BSC 0.008 BSC 0.4 L1 # per tape and reel 0.6 0.54 REF 2 Inches A1 L 3 0.016 SIDE VIEW D A b2 b A1 END VIEW 0.024 0.021 REF c 3000 pieces L Controlling dimension: millimeters L1 Package Dimensions for SOT143. © 2007 California Micro Devices Corp. All rights reserved. 8 490 N. McCarthy Blvd., Milpitas, CA 95035-5112 l Tel: 408.263.3214 l Fax: 408.263.7846 l www.cmd.com 04/03/07 CM1213A Mechanical Details (cont’d) SOT23-5 Mechanical Specifications, 5 pin Mechanical Package Diagrams The CM1213A is supplied in a 5-pin SOT23 package. DImensions are presented below. For complete information on the SOT23-5, see the California Micro Devices SOT23 Package Information document. TOP VIEW e1 PACKAGE DIMENSIONS 5 SOT23-5 JEDEC No. MO-178 (Var. AA) Pins/Leads 5 Millimeters 1 Inches Min Max Min Max -- 1.45 -- 0.0571 A1 0.00 0.15 0.0000 0.0059 b 0.30 0.50 0.0118 0.0197 c 0.08 0.22 0.0031 0.0087 D 2.75 3.05 0.1083 0.1201 E 2.60 3.00 0.1024 0.1181 E1 1.45 1.75 0.0571 0.0689 e 0.95 BSC 0.0374 BSC e1 1.90 BSC 0.0748 BSC 0.30 L1 0.60 0.60 REF # per tape and reel 0.0118 2 3 b A L 4 E1 E Package Dimensions e SIDE VIEW D A A1 END VIEW 0.0236 0.0236 REF c 3000 pieces L1 L Controlling dimensions: millimeters Package Dimensions for SOT23-5. © 2007 California Micro Devices Corp. All rights reserved. 04/03/07 490 N. McCarthy Blvd., Milpitas, CA 95035-5112 l Tel: 408.263.3214 l Fax: 408.263.7846 l www.cmd.com 9 CM1213A Mechanical Details (cont’d) SOT23-6 Mechanical Specifications, 6 pin The CM1213A is supplied in a 6-pin SOT23 package. Dimensions are presented below. Mechanical Package Diagrams For complete information on the SOT23-6, see the California Micro Devices SOT23 Package Information document. TOP VIEW e1 6 e 5 4 PACKAGE DIMENSIONS Pin 1 Marking Package SOT23-6 JEDEC No. MO-178 (Var. AB) Pins/Leads 6 Dimensions 1 Millimeters Inches Min Max Min Max -- 1.45 -- 0.0571 A1 0.00 0.15 0.0000 0.0059 b 0.30 0.50 0.0118 0.0197 c 0.08 0.22 0.0031 0.0087 D 2.75 3.05 0.1083 0.1201 E 2.60 3.00 0.1024 0.1181 E1 1.45 1.75 0.0571 0.0689 e 0.95 BSC 0.0374 BSC e1 1.90 BSC 0.0748 BSC 0.30 L1 # per tape and reel 0.60 0.60 REF 0.0118 2 3 b A L E1 E SIDE VIEW D A A1 END VIEW 0.0236 0.0236REF c 3000 pieces L1 L Controlling dimension: millimeters Package Dimensions for SOT23-6. © 2007 California Micro Devices Corp. All rights reserved. 10 490 N. McCarthy Blvd., Milpitas, CA 95035-5112 l Tel: 408.263.3214 l Fax: 408.263.7846 l www.cmd.com 04/03/07 CM1213A Mechanical Details (cont’d) MSOP-10 Mechanical Specifications, 10 pin Mechanical Package Diagrams The CM1213A is supplied in a 10-pin MSOP. Dimensions are presented below. TOP VIEW For complete information on the MSOP-10, see the California Micro Devices MSOP Package Information document. D 10 9 8 6 7 PACKAGE DIMENSIONS Package MSOP Pins 10 Dimensions Millimeters Pin 1 Marking Inches Min Max Min Max A 0.75 0.95 0.028 0.038 A1 0.05 0.15 0.002 0.006 B 0.17 0.27 0.007 0.013 C 0.13 0.23 0.005 0.009 D 2.90 3.10 0.114 0.122 E 2.90 3.10 0.114 0.122 e 0.50 BSC H 0.40 # per tape and reel 1 0.0137 3 5 4 A A1 B 0.193 BSC 0.70 2 SIDE VIEW SEATING PLANE 0.0196 BSC 4.90 BSC L E H e 0.029 4000 END VIEW Controlling dimension: millimeters C L Package Dimensions for MSOP-10 © 2007 California Micro Devices Corp. All rights reserved. 04/03/07 490 N. McCarthy Blvd., Milpitas, CA 95035-5112 l Tel: 408.263.3214 l Fax: 408.263.7846 l www.cmd.com 11