FUJITSU SEMICONDUCTOR DATA SHEET DS04-13511-3E Linear IC Converter CMOS D/A Converter for Digital Tuning (12-channel, 8-bit, on-chip OP amp, low-voltage) MB88346L ■ DESCRIPTION The Fujitsu MB88346L is a 12-channel 8-bit D/A converter capable of low-voltage operation that has amplifiers built into each of the 12 analog output lines to deliver heavy-current drive capability. The use of serial data input means that only three control lines are required, and enables cascade connection of multiple MB88346L chips. The MB88346L is suitable for applications such as electronic volume controls and replacing trimmer potentiometers in tuning systems. In addition, the MB88346L is both function-compatible and pin-compatible the currently used MB88346B, making it easy to reduce the voltage level of a system by simply replacing the MB88346B with the MB88346L. ■ FEATURES • • • • • • • Low voltage operation (VCC/VDD : 2.7 V to 3.6 V) Ultra-low power consumption (0.5 mW/ch at VCC = 3 V) Ultra-compact space-saving package lineup (SSOP-20) Contains 12-channel R-2R type 8-bit D/A converter On-chip analog output amps (sink current max. 1.0 mA, source current max. 1.0 mA) Analog output range from 0 to VCC Two separate power supply/ground lines for MCU interface block/operational amplifier output buffer block and D/A converter block • Serial data input : maximum operating speed 2.5 MHz (maximum operating speed in cascade connection is 1.5 MHz) • CMOS process • Package lineup includes DIP 20-pin, SSOP 20-pin Copyright©2000-2006 FUJITSU LIMITED All rights reserved MB88346L ■ PIN ASSIGNMENT (Top view) VSS 1 20 GND AO3 2 19 AO2 AO4 3 18 AO1 AO5 4 17 DI AO6 5 16 CLK AO7 6 15 LD AO8 7 14 DO AO9 8 13 AO12 AO10 9 12 AO11 VDD 10 11 VCC (DIP-20P-M02) (FPT-20P-M03) 2 MB88346L ■ PIN DESCRIPTION Pin No. Symbol I/O Function 17 DI I Serial address/data input to the internal 12-bit shift register : The address/data format is that upper 4 bits (D11 to D8) indicate an address and lower 8 bits (D7 to D0) indicate data. The D11 (MSB) is the firstin bit and D0 (LSB) is the last-in bit. 14 DO O Outputs MSB bit data from 12-bit shift register. 16 CLK I Shift clock input to the internal 12-bit shift register : At the rising edge of CLK data on the DI pin is shifted into the LSB of the shift register and contents of the shift register are shifted right (to the MSB) . 15 LD I Load strobe input for a 12-bit address/data : A high level on the LD pin latches a 4-bit address (upper 4 bits : D11 to D8) of the internal 12-bit shift register into the internal address decoder, and writes 8-bit data (lower 8 bits : D7 to D0) of the shift register into an internal data latch selected by the latched address. 18 19 2 3 4 5 6 7 8 9 12 13 AO1 AO2 AO3 AO4 AO5 AO6 AO7 AO8 AO9 AO10 AO11 AO12 O 8-bit D/A output pins with OP amps. 11 VCC ⎯ MCU interface and OP amp power supply pin. 20 GND ⎯ MCU interface and OP amp ground pin. 10 VDD ⎯ D/A converter power supply pin. 1 VSS ⎯ D/A converter ground pin. 3 MB88346L ■ BLOCK DIAGRAM 12-bit shift register DI CLK D0 D1 D2 D3 D4 D5 D6 DO D7 D8 D9 D10 D11 LD Address decoder 8 1 2 3 4 12 D0 1 D7 12 8-bit latch 8-bit R-2R D/A converter VCC 4 GND D0 12 D7 8-bit latch 8-bit R-2R D/A converter + + – – AO1 AO12 VDD VSS MB88346L ■ DATA CONFIGURATION The MB88346L has a 12-bit shift register for controlling the chip. The data passed to the 12-bit shift register needs to be supplied in the following format. The data structure consists of a total of 12 bits, four for address selection and eight for D/A data output. 1. Shift Register Control Data Configuration First MSB Last LSB D0 D1 D2 D3 D4 D5 D6 D7 D/A data output D8 D9 D10 D11 Address selection 2. D/A Converter Control Signals D0 D1 D2 D3 D4 D5 D6 D7 0 0 0 0 0 0 0 0 =: VSS 1 0 0 0 0 0 0 0 =: VLB + VSS 0 1 0 0 0 0 0 0 =: VLB × 2 + VSS • • • • • • • • • • • • • • • • • • • • • • • • 0 1 1 1 1 1 1 1 =: VLB × 254 + VSS 1 1 1 1 1 =: VDD 1 1 1 VLB = (VDD − VSS) /255 D/A data output • • • 5 MB88346L 3. Address Selection Signals 6 D8 D9 D10 D11 Address selection 0 0 0 0 Don’t Care 0 0 0 1 AO1 selection 0 0 1 0 AO2 selection 0 0 1 1 AO3 selection 0 1 0 0 AO4 selection 0 1 0 1 AO5 selection 0 1 1 0 AO6 selection 0 1 1 1 AO7 selection 1 0 0 0 AO8 selection 1 0 0 1 AO9 selection 1 0 1 0 AO10 selection 1 0 1 1 AO11 selection 1 1 0 0 AO12 selection 1 1 0 1 Don’t Care 1 1 1 0 Don’t Care 1 1 1 1 Don’t Care MB88346L ■ OPERATING DESCRIPTION 1. Timing Chart for Data Condition Setup MSB DI D11 LSB D10 D9 D8 D2 D1 D0 CLK LD D/A data output 2. Analog Output Voltage Range R-2R ladder output VDD OP amp output VCC VAOH (V CC) D/A output range (linear range) VAOL (GND) VSS GND VCC = VDD GND = VSS 7 MB88346L ■ ABSOLUTE MAXIMUM RATINGS Parameter Symbol Rating Condition VCC Power supply voltage VDD* Input voltage VIN Output voltage GND used as reference, Ta = + 25 °C VOUT Unit Min Max − 0.3 + 7.0 V − 0.3 + 7.0 V − 0.3 VCC + 0.3 V − 0.3 VCC + 0.3 V Power consumption PD ⎯ ⎯ 250 mW Operating temperature Ta ⎯ − 20 + 85 °C Tstg ⎯ − 55 + 150 °C Storage temperature * : VCC ≥ VDD WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. ■ RECOMMENDED OPERATING CONDITIONS Parameter Power supply voltage 1 Power supply voltage 2 Symbol Condition VCC GND VDD VSS Value Unit Min Typ Max ⎯ 2.7 ⎯ 3.6 V ⎯ ⎯ 0 ⎯ V 2.0 ⎯ VCC V GND ⎯ VCC − 2.0 V VDD − VSS ≥ 2.0 V Analog output source current IAL VCC = 3.0 V ⎯ ⎯ 1.0 mA Analog output sink current IAH VCC = 3.0 V ⎯ ⎯ 1.0 mA Oscillator limiting output capacity CAL ⎯ ⎯ ⎯ 0.1 µF Digital data value range ⎯ ⎯ #00 ⎯ #FF ⎯ Operating temperature Ta ⎯ − 20 ⎯ + 85 °C WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. 8 MB88346L ■ ELECTRICAL CHARACTERISTICS 1. DC Characteristics (1) Digital Block (VDD, VCC = 2.7 V to 3.6 V (VCC ≥ VDD) , GND = VSS = 0 V, Ta = −20 °C to +85 °C) Parameter Symbol Power supply voltage VCC Power supply current 1 ICC Input leak current IILK L level input voltage VIL H level input voltage VIH L level output voltage VOL H level output voltage VOH Pin Value Condition VCC Typ Max ⎯ 2.7 3.0 3.6 V Stationary (CLK signal stopped) , no load ⎯ 1.2 3.0 mA − 10 ⎯ + 10 µA ⎯ ⎯ ⎯ 0.2 VCC V ⎯ 0.8 VCC ⎯ ⎯ V ⎯ ⎯ 0.4 V VCC − 0.4 ⎯ ⎯ V VIN = 0 to VCC CLK, DI, LD IOL = 2.5 mA DO Unit Min IOH = − 400 µA (2) Analog Block 1 (VDD, VCC = 2.7 V to 3.6 V (VCC ≥ VDD) , GND = VS = 0 V, Ta = –20 °C to +85 °C) Parameter Power consumption Analog voltage Value Symbol Pin Condition IDD VDD Maximum setting value from #00 to #FF VDD VDD VSS VSS Resolution Res Monotonic increase Rem Nonlinearity error LE Differential linearity error DLE VDD – VSS ≥ 2.0 ⎯ AO1 to AO12 VDD ≤ VCC − 0.1 V, VSS ≥ 0.1 V, no load Unit Min Typ Max ⎯ 0.6 1.5 mA 2.0 ⎯ VCC V GND ⎯ VCC − 2.0 V ⎯ 8 ⎯ bit ⎯ 8 ⎯ bit − 1.5 ⎯ + 1.5 LSB − 1.0 ⎯ + 1.0 LSB Nonlinearity error : Deviation (error) in input/output curves with respect to an ideal straight line connecting output voltage at “00” and output voltage at “FF.” Differential linearity error : Deviation (error) in amplification with respect to theoretical increase in amplification per 1-bit increase in digital value. Analog output Ideal straight line VAOH Non linearity error VAOL Digital setting #00 #FF Note : The value of VAOH and VDD, and the value of VAOL and VSS are not necessarily equivalent. 9 MB88346L (3) Analog Block 2 (VDD, VCC = 2.7 V to 3.6 V (VCC ≥ VDD) , GND = VSS = 0 V, Ta = −20 °C to +85 °C) Parameter Output minimum voltage 1 Output minimum voltage 2 Output minimum voltage 3 Output minimum voltage 4 Output minimum voltage 5 Symbol Pin Output maximum voltage 2 Output maximum voltage 3 Output maximum voltage 4 Output maximum voltage 5 10 Value Unit Min Typ Max VAOL1 VDD = VCC = 3.0 V, VSS = GND = 0.0 V, IAL = 0 µA Digital data = #00 VSS ⎯ VSS + 0.1 V VAOL2 VDD = VCC = 3.0 V, VSS = GND = 0.0 V, IAL = 500 µA Digital data = #00 VSS − 0.2 VSS VSS + 0.2 V VAOL3 VDD = VCC = 3.0 V, VSS = GND = 0.0 V, IAH = 500 µA Digital data = #00 VSS ⎯ VSS + 0.2 V VAOL4 VDD = VCC = 3.0 V, VSS = GND = 0.0 V, IAL = 1.0 mA Digital data = #00 VSS − 0.3 VSS VSS + 0.3 V VAOL5 VDD = VCC = 3.0 V, VSS = GND = 0.0 V, IAH = 1.0 mA Digital data = #00 VSS ⎯ VSS + 0.3 V VAOH1 VDD = VCC = 3.0 V, VSS = GND = 0.0 V, IAL = 0 µA Digital data = #FF VDD − 0.1 ⎯ VDD V VAOH2 VDD = VCC = 3.0 V, VSS = GND = 0.0 V, IAL = 500 µA Digital data = #FF VDD − 0.2 ⎯ VDD V VAOH3 VDD = VCC = 3.0 V, VSS = GND = 0.0 V, IAH = 500 µA Digital data = #FF VDD − 0.2 VDD VDD + 0.2 V VAOH4 VDD = VCC = 3.0 V, VSS = GND = 0.0 V, IAL = 1.0 mA Digital data = #FF VDD − 0.3 ⎯ VDD V VAOH5 VDD = VCC = 3.0 V, VSS = GND = 0.0 V, IAH = 1.0 mA Digital data = #FF VDD − 0.3 VDD VDD + 0.3 V AO1 to AO12 Output maximum voltage 1 Condition MB88346L 2. AC Characteristics (VDD, VCC = 2.7 V to 3.6 V (VCC ≥ VDD) , GND = VSS = 0 V, Ta = − 20 °C to +85 °C) Parameter Symbol Condition Clock L level pulse width tCKL Clock H level pulse width Value Unit Min Max ⎯ 200 ⎯ ns tCKH ⎯ 200 ⎯ ns Clock rise time Clock fall time tCr tCf ⎯ ⎯ 200 ns Data setup time tDCH ⎯ 30 ⎯ ns Data hold time tCHD ⎯ 60 ⎯ ns Load setup time tCHL ⎯ 200 ⎯ ns Load hold time tLDC ⎯ 100 ⎯ ns Load H level pulse width tLDH ⎯ 100 ⎯ ns Data output delay time tDO Refer to “• Load condition 1” 70 600 ns D/A output settling time tLDD Refer to “• Load condition 2” ⎯ 300 µs • Load condition 1 • Load condition 2 Measurement point Measurement point CL = 20 pF to 100 pF R AL = 10 kΩ CAL = 50 pF 11 MB88346L • Input/output timing tCr tCKH tCf CLK tCKL tLDC DI tLDH tDCH tCHD tCHL LD tLDD 90 % D/A output 10 % tDO DO Note: Decision levels: 80 % and 20 % of VCC ■ VAO vs. IAO CHARACTERISTICS : EXAMPLE Ta = +25°C 3.0 V 3.0 V Source current MB88346L Pattern input VDD DI CLK LD VSS VCC AO1 to AO12 GND Sink current V (Continued) 12 MB88346L (Continued) #FF setting [mV] 3,000 2,980 Analog output level 2,960 2,940 2,920 2,900 2,880 2,860 2,840 2,820 2,800 1.0 0.8 0.6 0.4 0.2 0.0 0.2 Sink current 0.4 0.6 0.8 1.0 [mA] Source current #80 setting [mV] 1,600 1,580 Analog output level 1,560 1,540 1,520 1,500 1,480 1,460 1,440 1,420 1,400 1.0 [mV] 0.8 0.6 0.4 Sink current 0.2 0.0 0.2 0.4 0.6 0.8 Source current 1.0 [mA] 0.2 0.0 0.2 0.4 0.6 0.8 Source current 1.0 [mA] #00 setting 200 180 Analog output level 160 140 120 100 80 60 40 20 0 1.0 0.8 0.6 0.4 Sink current 13 MB88346L ■ ORDERING INFORMATION Part number MB88346LP MB88346LPFV 14 Package 20-pin plastic DIP (DIP-20P-M02) 20-pin plastic SSOP (FPT-20P-M03) Remarks MB88346L ■ PACKAGE DIMENSIONS 20-pin plastic DIP Lead pitch 2.54mm(100mil) Row spacing 7.62mm(300mil) Sealing method Plastic mold (DIP-20P-M02) 20-pin plastic DIP (DIP-20P-M02) +0.20 24.64 –0.30 +.008 .970 –.012 INDEX-1 6.20±0.25 (.244±.010) INDEX-2 0.51(.020)MIN 4.36(.172)MAX 0.25±0.05 (.010±.002) 3.00(.118)MIN 0.46±0.08 (.018±.003) +0.30 0.86 –0 +.012 .034 –0 1.27(.050) MAX C +0.30 1.27 –0 +.012 .050 –0 7.62(.300) TYP 15°MAX 2.54(.100) TYP 1994 FUJITSU LIMITED D20003S-3C-4 Dimensions in mm (inches). Note: The values in parentheses are reference values. Please confirm the latest Package dimension by following URL. http://edevice.fujitsu.com/fj/DATASHEET/ef-ovpklv.html (Continued) 15 MB88346L (Continued) 20-pin plastic SSOP Lead pitch 0.65 mm Package width × package length 4.40 × 6.50 mm Lead shape Gullwing Sealing method Plastic mold Mounting height 1.45 mmMAX Weight 0.09g Code (Reference) P-SSOP20-4.4×6.5-0.65 (FPT-20P-M03) 20-pin plastic SSOP (FPT-20P-M03) Note 1) *1 : Resin protrusion. (Each side : +0.15 (.006) Max). Note 2) *2 : These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder. *1 6.50±0.10(.256±.004) 0.17±0.03 (.007±.001) 11 20 *24.40±0.10 6.40±0.20 (.173±.004) (.252±.008) INDEX Details of "A" part +0.20 1.25 –0.10 +.008 .049 –.004 LEAD No. 1 10 0.65(.026) "A" 0.24±0.08 (.009±.003) 0.13(.005) M 0.10(.004) C 2003 FUJITSU LIMITED F20012S-c-4-6 Please confirm the latest Package dimension by following URL. http://edevice.fujitsu.com/fj/DATASHEET/ef-ovpklv.html 16 (Mounting height) 0~8˚ 0.50±0.20 (.020±.008) 0.60±0.15 (.024±.006) 0.10±0.10 (Stand off) (.004±.004) 0.25(.010) Dimensions in mm (inches). Note: The values in parentheses are reference values. MB88346L FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. 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