S E M I C O N D U C T O R HGTP3N60C3D, HGT1S3N60C3D, HGT1S3N60C3DS 6A, 600V, UFS Series N-Channel IGBT with Anti-Parallel Hyperfast Diode May 1996 Features Packaging JEDEC TO-220AB • 6A, 600V at TC = +25oC EMITTER COLLECTOR GATE • 600V Switching SOA Capability • Typical Fall Time - 130ns at TJ = +150oC COLLECTOR (FLANGE) • Short Circuit Rating • Low Conduction Loss • Hyperfast Anti-Parallel Diode Description JEDEC TO-262AA The HGTP3N60C3D, HGT1S3N60C3D, and HGT1S3N60C3DS are MOS gated high voltage switching devices combining the best features of MOSFETs and bipolar transistors. These devices have the high input impedance of a MOSFET and the low on-state conduction loss of a bipolar transistor. The much lower on-state voltage drop varies only moderately between +25oC and +150oC. The IGBT used is the development type TA49113. The diode used in anti-parallel with the IGBT is the development type TA49055. EMITTER COLLECTOR GATE A COLLECTOR (FLANGE) JEDEC TO-263AB M A A The IGBT is ideal for many high voltage switching applications operating at moderate frequencies where low conduction losses are essential. COLLECTOR (FLANGE) GATE EMITTER PACKAGING AVAILABILITY PART NUMBER PACKAGE BRAND HGTP3N60C3D TO-220AB G3N60C3D HGT1S3N60C3D TO-262AA G3N60C3D HGT1S3N60C3DS TO-263AB G3N60C3D NOTE: When ordering, use the entire part number. Add the suffix 9A to obtain the TO-263AB variant in tape and reel, i.e. HGT1S3N60C3DS9A. Terminal Diagram N-CHANNEL ENHANCEMENT MODE C G Formerly Developmental Type TA49119. E Absolute Maximum Ratings TC = +25oC, Unless Otherwise Specified Collector-Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .BVCES Collector Current Continuous At TC = +25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC25 At TC = +110oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC110 Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ICM Gate-Emitter Voltage Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGES Gate-Emitter Voltage Pulsed. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGEM Switching Safe Operating Area at TJ = +150oC, Fig. 14. . . . . . . . . . . . . . . . . . . . . SSOA Power Dissipation Total at TC = +25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Power Dissipation Derating TC > +25oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Lead Temperature for Soldering. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Short Circuit Withstand Time (Note 2) at VGE = 10V, Fig 6 . . . . . . . . . . . . . . . . . . . . .tSC HGTP3N60C3D, HGT1S3N60C3D HGT1S3N60C3DS 600 6 3 24 ±20 ±30 18A at 480V 33 0.27 -40 to +150 260 8 UNITS V A A A V V W W/ oC oC oC µs NOTE: 1. Repetitive Rating: Pulse width limited by maximum junction temperature. 2. VCE(PK) = 360V, TJ = +125oC, RGE = 82Ω. CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures. Copyright © Harris Corporation 1996 1 File Number 4140 Specifications HGTP3N60C3D, HGT1S3N60C3D, HGT1S3N60C3DS Electrical Specifications TC = +25oC, Unless Otherwise Specified PARAMETERS SYMBOL Collector-Emitter Breakdown Voltage Gate-Emitter Threshold Voltage IC = 250µA, VGE = 0V BVCES MIN TYP MAX UNITS 600 - - V VCE = BVCES TC = +25oC - - 250 µA VCE = BVCES TC = +150oC - - 2.0 mA IC = IC110, VGE = 15V TC = +25oC - 1.65 2.0 V TC = +150oC - 1.85 2.2 V VGE(TH) IC = 250µA, VCE = VGE TC = +25oC 3.0 5.5 6.0 V IGES VGE = ±25V - - ±250 nA SSOA TJ = +150oC RG = 82Ω VGE = 15V VCE(PK)=480V 18 - - A VCE(PK)=600V 2 - - A IC = IC110, VCE = 0.5 BVCES - 8.3 - V IC = IC110, VCE = 0.5 BVCES VGE = 15V - 10.8 13.5 nC VGE = 20V - 13.8 17.3 nC - 5 - ns - 10 - ns - 325 400 ns - 130 275 ns Collector-Emitter Leakage Current Collector-Emitter Saturation Voltage TEST CONDITIONS ICES VCE(SAT) Gate-Emitter Leakage Current Switching SOA L = 1mH Gate-Emitter Plateau Voltage On-State Gate Charge VGEP QG(ON) Current Turn-On Delay Time tD(ON)I Current Rise Time tRI Current Turn-Off Delay Time tD(OFF)I TJ = 150oC ICE = IC110 VCE(PK) = 0.8 BVCES VGE = 15V RG = 82Ω L = 1mH Current Fall Time tFI Turn-On Energy EON - 85 - µJ Turn-Off Energy (Note 1) EOFF - 245 - µJ Diode Forward Voltage VEC IEC = 3A - 2.0 2.5 V Diode Reverse Recovery Time tRR IEC = 3A, dIEC/dt = 200A/µs - 22 28 ns IEC = 1A, dIEC/dt = 200A/µs - 17 22 ns Thermal Resistance RθJC IGBT - - 3.75 oC/W Diode - - 3.0 oC/W NOTE: 1. Turn-Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero (ICE = 0A). The HGTP3N60C3D, HGT1S3N60C3D, and HGT1S3N60C3DS were tested per JEDEC standard No. 24-1 Method for Measurement of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss. Turn-On losses include diode losses. HARRIS SEMICONDUCTOR IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS: 4,364,073 4,587,713 4,641,162 4,794,432 4,860,080 4,417,385 4,598,461 4,644,637 4,801,986 4,883,767 4,430,792 4,605,948 4,682,195 4,803,533 4,888,627 4,443,931 4,618,872 4,684,413 4,809,045 4,890,143 4,466,176 4,620,211 4,694,313 4,809,047 4,901,127 2 4,516,143 4,631,564 4,717,679 4,810,665 4,904,609 4,532,534 4,639,754 4,743,952 4,823,176 4,933,740 4,567,641 4,639,762 4,783,690 4,837,606 4,963,951 HGTP3N60C3D, HGT1S3N60C3D, HGT1S3N60C3DS 20 DUTY CYCLE <0.5%, VCE = 10V PULSE DURATION = 250µs 16 14 12 10 8 TC = +150oC 6 TC = +25oC TC = -40oC 4 2 0 4 6 8 10 12 PULSE DURATION = 250µs DUTY CYCLE <0.5% TC = +25oC 18 16 14 10V 12 VGE = 15V 10 8 9.0V 6 8.5V 4 8.0V 2 7.5V 7.0V 0 14 0 2 4 6 8 VCE, COLLECTOR-TO-EMITTER VOLTAGE (V) VGE, GATE-TO-EMITTER VOLTAGE (V) PULSE DURATION = 250µs DUTY CYCLE <0.5%, VGE = 10V 18 16 14 12 10 TC = -40oC 8 TC = +150oC 6 TC = +25oC 4 2 0 0 1 2 3 4 5 20 PULSE DURATION = 250µs DUTY CYCLE <0.5%, VGE = 15V 18 16 14 TC = +25oC 12 10 TC = -40oC 8 6 TC = +150oC 4 2 0 0 tSC , SHORT CIRCUIT WITHSTAND TIME (µS) ICE , DC COLLECTOR CURRENT (A) VGE = 15V 6 5 4 3 2 1 +50 +75 +100 +125 2 3 4 5 FIGURE 4. COLLECTOR-EMITTER ON - STATE VOLTAGE FIGURE 3. COLLECTOR-EMITTER ON - STATE VOLTAGE 0 +25 1 VCE, COLLECTOR-TO-EMITTER VOLTAGE (V) VCE, COLLECTOR-TO-EMITTER VOLTAGE (V) 7 10 FIGURE 2. SATURATION CHARACTERISTICS ICE, COLLECTOR-EMITTER CURRENT (A) ICE, COLLECTOR-EMITTER CURRENT (A) FIGURE 1. TRANSFER CHARACTERISTICS 20 12V +150 TC , CASE TEMPERATURE (oC) 14 70 VCE = 360V, RGE = 82Ω, TJ = +125oC 12 60 50 10 tSC 8 40 ISC 6 30 4 20 2 10 0 10 11 12 13 14 VGE , GATE-TO-EMITTER VOLTAGE (V) 0 15 FIGURE 6. SHORT CIRCUIT WITHSTAND TIME FIGURE 5. MAXIMUM DC COLLECTOR CURRENT AS A FUNCTION OF CASE TEMPERATURE 3 ISC, PEAK SHORT CIRCUIT CURRENT(A) 18 20 ICE, COLLECTOR-EMITTER CURRENT (A) ICE, COLLECTOR-EMITTER CURRENT (A) Typical Performance Curves HGTP3N60C3D, HGT1S3N60C3D, HGT1S3N60C3DS Typical Performance Curves 500 TJ = +150oC, RG = 82Ω, L = 1mH, VCE(PK) = 480V tD(OFF)I , TURN-OFF DELAY TIME (ns) tD(ON)I , TURN-ON DELAY TIME (ns) 20 (Continued) VGE = 10V 10 VGE = 15V 3 1 2 3 4 5 7 6 400 300 VGE = 15V VGE = 10V 200 8 TJ = +150oC, RG = 82Ω, L = 1mH, VCE(PK) = 480V 1 ICE , COLLECTOR-EMITTER CURRENT (A) 5 6 7 8 FIGURE 8. TURN-OFF DELAY TIME AS A FUNCTION OF COLLECTOR-EMITTER CURRENT 300 TJ = +150oC, RG = 82Ω, L = 1mH, VCE(PK) = 480V tFI , FALL TIME (ns) tRI , TURN-ON RISE TIME (ns) 4 TJ = +150oC, RG = 82Ω, L = 1mH, VCE(PK) = 480V VGE = 10V VGE = 15V 10 5 1 2 3 4 5 6 7 200 VGE = 10V or 15V 100 8 1 ICE , COLLECTOR-EMITTER CURRENT (A) 0.5 0.8 EOFF , TURN-OFF ENERGY LOSS (mJ) 0.4 VGE = 10V 0.3 0.2 VGE = 15V 0.1 0 2 3 4 5 6 3 4 5 6 7 8 FIGURE 10. TURN-OFF FALL TIME AS A FUNCTION OF COLLECTOR-EMITTER CURRENT TJ = +150oC, RG = 82Ω, L = 1mH, VCE(PK) = 480V 1 2 ICE , COLLECTOR-EMITTER CURRENT (A) FIGURE 9. TURN-ON RISE TIME AS A FUNCTION OF COLLECTOR-EMITTER CURRENT EON , TURN-ON ENERGY LOSS (mJ) 3 ICE , COLLECTOR-EMITTER CURRENT (A) FIGURE 7. TURN-ON DELAY TIME AS A FUNCTION OF COLLECTOR-EMITTER CURRENT 80 2 7 0.6 VGE = 10V or 15V 0.5 0.4 0.3 0.2 0.1 0 8 ICE , COLLECTOR-EMITTER CURRENT (A) TJ = +150oC, RG = 82Ω, L = 1mH, VCE(PK) = 480V 0.7 1 2 3 4 5 6 7 ICE , COLLECTOR-EMITTER CURRENT (A) FIGURE 11. TURN-ON ENERGY LOSS AS A FUNCTION OF COLLECTOR-EMITTER CURRENT FIGURE 12. TURN-OFF ENERGY LOSS AS A FUNCTION OF COLLECTOR-EMITTER CURRENT 4 8 HGTP3N60C3D, HGT1S3N60C3D, HGT1S3N60C3DS TJ = +150oC, TC = +75oC RG = 82Ω, L = 1mH 100 fMAX1 = 0.05/(tD(OFF)I + tD(ON)I) fMAX2 = (PD - PC)/(EON + EOFF) VGE = 15V PD = ALLOWABLE DISSIPATION PC = CONDUCTION DISSIPATION (DUTY FACTOR = 50%) 10 VGE = 10V RθJC = 3.75oC/W 1 2 3 4 5 6 20 TJ = +150oC, VGE = 15V, RG = 82Ω, L = 1mH 18 16 14 12 10 8 6 4 2 0 0 ICE, COLLECTOR-EMITTER CURRENT (A) FIGURE 13. OPERATING FREQUENCY AS A FUNCTION OF COLLECTOR-EMITTER CURRENT FIGURE 14. MINIMUM SWITCHING SAFE OPERATING AREA VCE , COLLECTOR - EMITTER VOLTAGE (V) 500 FREQUENCY = 1MHz CIES C, CAPACITANCE (pF) 400 300 200 COES 100 CRES 0 0 5 10 15 20 25 VCE, COLLECTOR-TO-EMITTER VOLTAGE (V) FIGURE 15. CAPACITANCE AS A FUNCTION OF COLLECTOREMITTER VOLTAGE ZθJC , NORMALIZED THERMAL RESPONSE 100 200 300 400 500 600 VCE(PK), COLLECTOR-TO-EMITTER VOLTAGE (V) 600 15 480 12 9 360 VCE = 600V VCE = 400V 240 IG REF = 1.060mA 120 0 6 VCE = 200V RL = 200Ω TC = +25oC 0 2 4 6 8 10 QG , GATE CHARGE (nC) 12 3 0 14 FIGURE 16. GATE CHARGE WAVEFORMS 100 0.5 0.2 10-1 t1 0.1 PD 0.05 t2 0.02 0.01 DUTY FACTOR, D = t1 / t2 PEAK TJ = (PD X ZθJC X RθJC) + TC SINGLE PULSE 10-2 10-5 10-4 10-3 10-2 10-1 t1 , RECTANGULAR PULSE DURATION (s) 100 FIGURE 17. IGBT NORMALIZED TRANSIENT THERMAL IMPEDANCE, JUNCTION TO CASE 5 101 VGE, GATE-EMITTER VOLTAGE (V) fMAX , OPERATING FREQUENCY (kHz) 200 (Continued) ICE, COLLECTOR-EMITTER CURRENT (A) Typical Performance Curves HGTP3N60C3D, HGT1S3N60C3D, HGT1S3N60C3DS Typical Performance Curves (Continued) 30 TC = +25oC, dIEC/dt = 200A/µs 25 12 tR , RECOVERY TIMES (ns) IEC , FORWARD CURRENT (A) 15 9 +100oC 6 +150oC +25oC 3 tRR 20 tA 15 10 tB 5 0 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0.5 1 4 IEC , FORWARD CURRENT (A) VEC , FORWARD VOLTAGE (V) FIGURE 18. DIODE FORWARD CURRENT AS A FUNCTION OF FORWARD VOLTAGE DROP FIGURE 19. RECOVERY TIMES AS A FUNCTION OF FORWARD CURRENT Test Circuit and Waveforms 90% L = 1mH RHRD460 10% VGE EOFF RG = 82Ω EON VCE 90% + - VDD = 480V ICE 10% tD(OFF)I tRI tFI FIGURE 20. INDUCTIVE SWITCHING TEST CIRCUIT tD(ON)I FIGURE 21. SWITCHING TEST WAVEFORMS Operating Frequency Information fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON). The allowable dissipation (PD) is defined by PD = (TJMAX TC)/RθJC. The sum of device switching and conduction losses must not exceed PD . A 50% duty factor was used (Figure 13) and the conduction losses (PC) are approximated by PC = (VCE x ICE)/2. Operating frequency information for a typical device (Figure 13) is presented as a guide for estimating device performance for a specific application. Other typical frequency vs collector current (ICE) plots are possible using the information shown for a typical unit in Figures 4, 7, 8, 11 and 12. The operating frequency plot (Figure 13) of a typical device shows fMAX1 or fMAX2 whichever is smaller at each point. The information is based on measurements of a typical device and is bounded by the maximum rated junction temperature. EON and EOFF are defined in the switching waveforms shown in Figure 21. EON is the integral of the instantaneous power loss (ICE x VCE) during turn-on and EOFF is the integral of the instantaneous power loss during turn-off. All tail losses are included in the calculation for EOFF; i.e. the collector current equals zero (ICE = 0). fMAX1 is defined by fMAX1 = 0.05/(tD(OFF)I + tD(ON)I). Deadtime (the denominator) has been arbitrarily held to 10% of the on- state time for a 50% duty factor. Other definitions are possible. tD(OFF)I and tD(ON)I are defined in Figure 21. Device turn-off delay can establish an additional frequency limiting condition for an application other than TJMAX. tD(OFF)I is important when controlling output ripple under a lightly loaded condition. 6 HGTP3N60C3D, HGT1S3N60C3D, HGT1S3N60C3DS Handling Precautions for IGBTs Insulated Gate Bipolar Transistors are susceptible to gateinsulation damage by the electrostatic discharge of energy through the devices. When handling these devices, care should be exercised to assure that the static charge built in the handler’s body capacitance is not discharged through the device. With proper handling and application procedures, however, IGBTs are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge. IGBTs can be handled safely if the following basic precautions are taken: 3. Tips of soldering irons should be grounded. 4. Devices should never be inserted into or removed from circuits with power on. 5. Gate Voltage Rating - Never exceed the gate-voltage rating of VGEM. Exceeding the rated VGE can result in permanent damage to the oxide layer in the gate region. 6. Gate Termination - The gates of these devices are essentially capacitors. Circuits that leave the gate open-circuited or floating should be avoided. These conditions can result in turn-on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup. 1. Prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as †ECCOSORBD LD26 or equivalent. 7. Gate Protection - These devices do not have an internal monolithic zener diode from gate to emitter. If gate protection is required an external zener is recommended. 2. When devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means - for example, with a metallic wristband. † Trademark Emerson and Cumming, Inc. 7 HGTP3N60C3D, HGT1S3N60C3D, HGT1S3N60C3DS TO-220AB 3 LEAD JEDEC TO-220AB PLASTIC PACKAGE A INCHES E ØP A1 Q H1 TERM. 4 D 45o E1 D1 L1 b1 L b c MIN MAX MIN MAX NOTES A 0.170 0.180 4.32 4.57 - A1 0.048 0.052 1.22 1.32 - b 0.030 0.034 0.77 0.86 3, 4 b1 0.045 0.055 1.15 1.39 2, 3 c 0.014 0.019 0.36 0.48 2, 3, 4 D 0.590 0.610 14.99 15.49 - D1 - 0.160 E 0.395 0.410 E1 - 0.030 e 60o 1 2 e1 3 e J1 e1 LEAD 1 - GATE LEAD 2 - COLLECTOR LEAD 3 - EMITTER TERM. 4 - COLLECTOR MILLIMETERS SYMBOL 0.100 TYP 0.200 BSC H1 0.235 0.255 J1 0.100 0.110 L 0.530 0.550 10.04 - 4.06 - 10.41 - 0.76 - 2.54 TYP 5 5.08 BSC 5 5.97 6.47 - 2.54 2.79 6 13.47 13.97 - L1 0.130 0.150 3.31 3.81 2 ØP 0.149 0.153 3.79 3.88 - Q 0.102 0.112 2.60 2.84 - NOTES: 1. These dimensions are within allowable dimensions of Rev. J of JEDEC TO-220AB outline dated 3-24-87. 2. Lead dimension and finish uncontrolled in L1. 3. Lead dimension (without solder). 4. Add typically 0.002 inches (0.05mm) for solder coating. 5. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 6. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 7. Controlling dimension: Inch. 8. Revision 1 dated 1-93. 8 HGTP3N60C3D, HGT1S3N60C3D, HGT1S3N60C3DS TO-262AA 3 LEAD JEDEC TO-262AA PLASTIC PACKAGE E INCHES A 15o A1 H1 TERM. 4 D L1 b1 MIN MAX MIN MAX c A 0.170 0.180 4.32 4.57 - 0.048 0.052 1.22 1.32 3, 4 b 0.030 0.034 0.77 0.86 3, 4 b1 0.045 0.055 1.15 1.39 3, 4 c 0.018 0.022 0.46 0.55 3, 4 D 0.405 0.425 10.29 10.79 - E 0.395 0.405 10.04 10.28 e1 L 60o 1 2 3 e J1 - GATE LEAD 2 - COLLECTOR LEAD 3 - EMITTER TERM. 4 - COLLECTOR 0.100 TYP 0.200 BSC - 2.54 TYP 5 5.08 BSC 5 H1 0.045 0.055 1.15 1.39 - J1 0.095 0.105 L 0.530 0.550 2.42 2.66 6 13.47 13.97 - L1 0.110 0.130 2.80 3.30 2 NOTES: 1. These dimensions are within allowable dimensions of Rev. A of JEDEC TO-262AA outline dated 6-90. 2. Solder finish uncontrolled in this area. 3. Dimension (without solder). 4. Add typically 0.002 inches (0.05mm) for solder plating. 5. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 6. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 7. Controlling dimension: Inch. 8. Revision 4 dated 10-95. e1 LEAD 1 NOTES A1 e b MILLIMETERS SYMBOL 9 HGTP3N60C3D, HGT1S3N60C3D, HGT1S3N60C3DS TO-263AB SURFACE MOUNT JEDEC TO-263AB PLASTIC PACKAGE E INCHES A A1 H1 TERM. 4 D L2 L1 L 1 3 b b1 e c e1 J1 .450 (11.43) TERM. 4 L3 .350 (8.89) b2 .700 (17.78) 3 .150 (3.81) .080(2.03) .062(1.58) .062(1.58) MINIMUM PAD SIZE RECOMMENDED FOR SURFACE-MOUNTED APPLICATIONS LEAD 1 - GATE LEAD 3 - EMITTER TERM. 4 - COLLECTOR MIN MAX MIN MAX NOTES A 0.170 0.180 4.32 4.57 - A1 0.048 0.052 1.22 1.32 4, 5 b 0.030 0.034 0.77 0.86 4, 5 b1 0.045 0.055 1.15 1.39 4, 5 b2 0.310 - 7.88 - 2 c 0.018 0.022 0.46 0.55 4, 5 D 0.405 0.425 10.29 10.79 - E 0.395 0.405 10.04 10.28 - e 0.100 TYP 2.54 TYP 7 e1 0.200 BSC 5.08 BSC 7 H1 0.045 0.055 1.15 1.39 - J1 0.095 0.105 2.42 2.66 - L 0.175 0.195 4.45 4.95 - L1 0.090 0.110 2.29 2.79 4, 6 L2 0.050 0.070 1.27 1.77 3 L3 0.315 - 8.01 - 2 NOTES: 1. These dimensions are within allowable dimensions of Rev. C of JEDEC TO-263AB outline dated 2-92. 2. L3 and b2 dimensions established a minimum mounting surface for terminal 4. 3. Solder finish uncontrolled in this area. 4. Dimension (without solder). 5. Add typically 0.002 inches (0.05mm) for solder plating. 6. L1 is the terminal length for soldering. 7. Position of lead to be measured 0.120 inches (3.05mm) from bottom of dimension D. 8. Controlling dimension: Inch. 9. Revision 7 dated 10-95. 1 .080(2.03) MILLIMETERS SYMBOL 10 HGTP3N60C3D, HGT1S3N60C3D, HGT1S3N60C3DS TO-263AB 24mm TAPE AND REEL 40mm MIN. ACCESS HOLE 4.0mm 1.5mm DIA. HOLE 2.0mm 30.4mm 13mm 330mm 1.75mm C L 24mm 100mm 16mm 24.4mm USER DIRECTION OF FEED COVER TAPE GENERAL INFORMATION 1. USE "9A" SUFFIX ON PART NUMBER. 2. 800 PIECES PER REEL. 3. ORDER IN MULTIPLES OF FULL REELS ONLY. 4. MEETS EIA-481 REVISION "A" SPECIFICATIONS. Revision 7 dated 10-95 All Harris Semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Harris Semiconductor products are sold by description only. Harris Semiconductor reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Harris is believed to be accurate and reliable. However, no responsibility is assumed by Harris or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Harris or its subsidiaries. Sales Office Headquarters For general information regarding Harris Semiconductor and its products, call 1-800-4-HARRIS NORTH AMERICA Harris Semiconductor P. O. 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