HGTP7N60C3D, HGT1S7N60C3DS TM Data Sheet November 2000 14A, 600V, UFS Series N-Channel IGBT with Anti-Parallel Hyperfast Diodes The HGTP7N60C3D and HGT1S7N60C3DS are MOS gated high voltage switching devices combining the best features of MOSFETs and bipolar transistors. These devices have the high input impedance of a MOSFET and the low on-state conduction loss of a bipolar transistor. The much lower on-state voltage drop varies only moderately between 25oC and 150oC. The IGBT used is developmental type TA49115. The diode used in anti-parallel with the IGBT is developmental type TA49057. File Number 4150.3 Features • 14A, 600V at TC = 25oC • 600V Switching SOA Capability • Typical Fall Time. . . . . . . . . . . . . . . . 140ns at TJ = 150oC • Short Circuit Rating • Low Conduction Loss • Hyperfast Anti-Parallel Diode Packaging JEDEC TO-220AB The IGBT is ideal for many high voltage switching applications operating at moderate frequencies where low conduction losses are essential, such as: AC and DC motor controls, power supplies and drivers for solenoids, relays and contactors. EMITTER COLLECTOR GATE COLLECTOR (FLANGE) Formerly Developmental Type TA49121. Ordering Information PART NUMBER PACKAGE BRAND HGTP7N60C3D TO-220AB G7N60C3D HGT1S7N60C3DS TO-263AB G7N60C3D JEDEC TO-263AB NOTE: When ordering, use the entire part number. Add the suffix 9A to obtain the TO-263AB variant in tape and reel, i.e. HGT1S7N60C3DS9A. GATE EMITTER Symbol COLLECTOR (FLANGE) C G E INTERSIL CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS 4,364,073 4,417,385 4,430,792 4,443,931 4,466,176 4,516,143 4,532,534 4,587,713 4,598,461 4,605,948 4,620,211 4,631,564 4,639,754 4,639,762 4,641,162 4,644,637 4,682,195 4,684,413 4,694,313 4,717,679 4,743,952 4,783,690 4,794,432 4,801,986 4,803,533 4,809,045 4,809,047 4,810,665 4,823,176 4,837,606 4,860,080 4,883,767 4,888,627 4,890,143 4,901,127 4,904,609 4,933,740 4,963,951 4,969,027 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000 HGTP7N60C3D, HGT1S7N60C3DS Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified HGTP7N60C3D, HGT1S7N60C3DS UNITS Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .BVCES 600 V Collector Current Continuous At TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC25 At TC = 110oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC110 Average Diode Forward Current at 110oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I(AVG) Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ICM Gate to Emitter Voltage Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGES Gate to Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGEM Switching Safe Operating Area at TJ = 150oC (Figure 14) . . . . . . . . . . . . . . . . . . . . . . SSOA Power Dissipation Total at TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Power Dissipation Derating TC > 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Short Circuit Withstand Time (Note 2) at VGE = 15V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .tSC Short Circuit Withstand Time (Note 2) at VGE = 10V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .tSC 14 7 8 56 ±20 ±30 40A at 480V 60 0.487 -40 to 150 260 1 8 A A A A V V W W/oC oC oC µs µs CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. Repetitive Rating: Pulse width limited by maximum junction temperature. 2. VCE(PK) = 360V, TJ = 125oC, RG = 50Ω. TC = 25oC, Unless Otherwise Specified Electrical Specifications PARAMETER SYMBOL Collector to Emitter Breakdown Voltage BVCES Collector to Emitter Leakage Current Collector to Emitter Saturation Voltage Gate-Emitter Threshold Voltage ICES VCE(SAT) VGE(TH) Gate-Emitter Leakage Current IGES Switching SOA SSOA Gate to Emitter Plateau Voltage VGEP On-State Gate Charge QG(ON) Current Turn-On Delay Time td(ON)I Current Rise Time trI Current Turn-Off Delay Time td(OFF)I Current Fall Time tfI Turn-On Energy EON Turn-Off Energy (Note 3) EOFF Diode Forward Voltage VEC Diode Reverse Recovery Time trr Thermal Resistance RθJC TEST CONDITIONS IC = 250µA, VGE = 0V MIN TYP MAX UNITS 600 - - V VCE = BVCES TC = 25oC - - 250 µA VCE = BVCES TC = 150oC - - 2.0 mA IC = IC110, VGE = 15V TC = 25oC TC = 150oC TC = 25oC - 1.6 2.0 V - 1.9 2.4 V 3.0 5.0 6.0 V - - ±250 nA VCE(PK) = 480V 40 - - A VCE(PK) = 600V 6 - - A IC = IC110, VCE = 0.5 BVCES - 8 - V IC = IC110, VCE = 0.5 BVCES VGE = 15V - 23 30 nC VGE = 20V - 30 38 nC - 8.5 - ns - 11.5 - ns - 350 400 ns - 140 275 ns - 165 - µJ - 600 - µJ IEC = 7A - 1.9 2.5 V IEC = 7A, dIEC/dt = 200A/µs - 25 37 ns IEC = 1A, dIEC/dt = 200A/µs - 18 30 ns IGBT - - 2.1 oC/W Diode - - 2.0 oC/W IC = 250µA, VCE = VGE VGE = ±25V TJ = 150oC, RG = 50Ω, VGE = 15V, L = 1mH TJ = 150oC ICE = IC110 VCE(PK) = 0.8 BVCES VGE = 15V RG = 50Ω L = 1mH NOTE: 3. Turn-Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero (ICE = 0A). The HGTP7N60C3D and HGT1S7N60C3DS were tested per JEDEC standard No. 24-1 Method for Measurement of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss. Turn-On losses include diode losses. 2 HGTP7N60C3D, HGT1S7N60C3DS 40 DUTY CYCLE <0.5%, V CE = 10V PULSE DURATION = 250µs 35 30 25 TC = 150oC TC = 25oC 15 TC = -40oC 10 5 0 4 6 8 10 12 VGE, GATE TO EMITTER VOLTAGE (V) 14 40 PULSE DURATION = 250µs, DUTY CYCLE <0.5%, 35 TC = 25oC 10.0V 30 25 VGE = 15.0V 20 9.0V 15 8.5V 10 8.0V 5 7.5V 0 7.0V 0 ICE, COLLECTOR TO EMITTER CURRENT (A) ICE, COLLECTOR TO EMITTER CURRENT (A) 30 25 TC = -40oC 20 15 TC = 150oC 10 TC = 25oC 5 0 0 1 2 3 4 40 9 6 3 0 100 125 150 TC , CASE TEMPERATURE (oC) FIGURE 5. MAXIMUM DC COLLECTOR CURRENT vs CASE TEMPERATURE 3 TC = 25oC 25 20 TC = 150oC 15 10 5 0 0 1 2 3 4 5 FIGURE 4. COLLECTOR TO EMITTER ON-STATE VOLTAGE tSC , SHORT CIRCUIT WITHSTAND TIME (µs) ICE , DC COLLECTOR CURRENT (A) 12 75 10 VCE, COLLECTOR TO EMITTER VOLTAGE (V) VGE = 15V 50 8 TC = -40oC 30 5 FIGURE 3. COLLECTOR TO EMITTER ON-STATE VOLTAGE 25 6 PULSE DURATION = 250µs DUTY CYCLE <0.5%, VGE = 15V 35 VCE, COLLECTOR TO EMITTER VOLTAGE (V) 15 4 FIGURE 2. SATURATION CHARACTERISTICS PULSE DURATION = 250µs DUTY CYCLE <0.5%, VGE = 10V 35 2 VCE, COLLECTOR TO EMITTER VOLTAGE (V) FIGURE 1. TRANSFER CHARACTERISTICS 40 12.0V 12 140 VCE = 360V, RG = 50Ω, TJ = 125oC 10 120 ISC 8 100 6 80 4 60 tSC 2 10 11 12 13 14 VGE , GATE TO EMITTER VOLTAGE (V) 40 15 FIGURE 6. SHORT CIRCUIT WITHSTAND TIME ISC, PEAK SHORT CIRCUIT CURRENT (A) 20 ICE, COLLECTOR TO EMITTER CURRENT (A) ICE, COLLECTOR TO EMITTER CURRENT (A) Typical Performance Curves HGTP7N60C3D, HGT1S7N60C3DS Typical Performance Curves 500 TJ = 150oC, RG = 50Ω, L = 1mH, VCE(PK) = 480V 40 td(OFF)I , TURN-OFF DELAY TIME (ns) td(ON)I , TURN-ON DELAY TIME (ns) 50 (Continued) 30 20 VGE = 10V VGE = 15V 10 5 2 8 5 11 14 17 TJ = 150oC, RG = 50Ω, L = 1mH, VCE(PK) = 480V 450 400 350 VGE = 10V or 15V 300 250 200 20 2 ICE , COLLECTOR TO EMITTER CURRENT (A) FIGURE 7. TURN-ON DELAY TIME vs COLLECTOR TO EMITTER CURRENT 300 TJ = 150oC, RG = 50Ω, L = 1mH, VCE(PK) = 480V VGE = 15V 200 VGE = 10V or 15V 150 10 100 2 5 2 17 14 8 11 ICE , COLLECTOR TO EMITTER CURRENT (A) 5 20 5 EOFF, TURN-OFF ENERGY LOSS (µJ) TJ = 150oC, RG = 50Ω, L = 1mH, VCE(PK) = 480V 1000 11 14 17 20 FIGURE 10. TURN-OFF FALL TIME vs COLLECTOR TO EMITTER CURRENT 3000 2000 8 ICE , COLLECTOR TO EMITTER CURRENT (A) FIGURE 9. TURN-ON RISE TIME vs COLLECTOR TO EMITTER CURRENT EON , TURN-ON ENERGY LOSS (µJ) TJ = 150oC, RG = 50Ω, L = 1mH, VCE(PK) = 480V 250 VGE = 10V 100 20 FIGURE 8. TURN-OFF DELAY TIME vs COLLECTOR TO EMITTER CURRENT tfI , FALL TIME (ns) trI , TURN-ON RISE TIME (ns) 200 5 8 11 14 17 ICE , COLLECTOR TO EMITTER CURRENT (A) VGE = 10V 500 VGE = 15V 100 TJ = 150oC, RG = 50Ω, L = 1mH, VCE(PK) = 480V 1000 VGE = 10V OR 15V 500 100 40 2 5 8 11 14 17 ICE , COLLECTOR TO EMITTER CURRENT (A) FIGURE 11. TURN-ON ENERGY LOSS vs COLLECTOR TO EMITTER CURRENT 4 20 2 5 8 11 14 17 ICE , COLLECTOR TO EMITTER CURRENT (A) 20 FIGURE 12. TURN-OFF ENERGY LOSS vs COLLECTOR TO EMITTER CURRENT HGTP7N60C3D, HGT1S7N60C3DS TJ = 150oC, TC = 75oC RG = 50Ω, L = 1mH 100 VGE = 15V VGE = 10V 10 fMAX1 = 0.05/(tD(OFF)I + tD(ON)I) fMAX2 = (PD - PC)/(EON + EOFF) PD = ALLOWABLE DISSIPATION PC = CONDUCTION DISSIPATION (DUTY FACTOR = 50%) RθJC = 2.1oC/W 1 2 10 20 30 50 TJ = 150oC, VGE = 15V, RG = 50Ω, L = 1mH 40 30 20 10 0 0 ICE, COLLECTOR TO EMITTER CURRENT (A) C, CAPACITANCE (pF) CIES 800 600 400 200 COES CRES 0 0 5 10 15 20 25 600 15 500 12.5 400 ZθJC , NORMALIZED THERMAL RESPONSE 10 VCE = 200V VCE = 400V 300 7.5 VCE = 600V 5 200 IG(REF) = 1.044mA, 100 0 0 2.5 RL = 50Ω, TC = 25oC 5 VCE, COLLECTOR TO EMITTER VOLTAGE (V) FIGURE 15. CAPACITANCE vs COLLECTOR TO EMITTER VOLTAGE 600 FIGURE 14. MINIMUM SWITCHING SAFE OPERATING AREA VCE , COLLECTOR TO EMITTER VOLTAGE (V) FREQUENCY = 1MHz 1000 500 400 300 200 VCE(PK), COLLECTOR TO EMITTER VOLTAGE (V) FIGURE 13. OPERATING FREQUENCY vs COLLECTOR TO EMITTER CURRENT 1200 100 15 10 20 0 30 25 QG , GATE CHARGE (nC) FIGURE 16. GATE CHARGE WAVEFORMS 100 0.5 t1 0.2 PD 10-1 0.1 t2 0.05 0.02 DUTY FACTOR, D = t1 / t2 PEAK TJ = (PD X ZθJC X RθJC) + TC 0.01 SINGLE PULSE 10-2 10-5 10-4 10-2 10-1 10-3 t1 , RECTANGULAR PULSE DURATION (s) 100 FIGURE 17. IGBT NORMALIZED TRANSIENT THERMAL IMPEDANCE, JUNCTION TO CASE 5 101 VGE, GATE TO EMITTER VOLTAGE (V) fMAX , OPERATING FREQUENCY (kHz) 200 (Continued) ICE, COLLECTOR TO EMITTER CURRENT (A) Typical Performance Curves HGTP7N60C3D, HGT1S7N60C3DS Typical Performance Curves (Continued) 30 tr, RECOVERY TIMES (ns) IEC , FORWARD CURRENT (A) 30 10 175oC 100oC 25oC 1.0 0.5 TC = 25oC, dIEC/dt = 200A/µs 25 trr 20 15 ta 10 tb 5 0 0.5 1.0 2.5 2.0 1.5 0 0.5 3.0 1 FIGURE 18. DIODE FORWARD CURRENT vs FORWARD VOLTAGE DROP 3 7 IEC , FORWARD CURRENT (A) VEC , FORWARD VOLTAGE (V) FIGURE 19. RECOVERY TIMES vs FORWARD CURRENT Test Circuit and Waveforms L = 1mH 90% RHRD660 10% VGE EOFF RG = 50Ω EON VCE + - 90% VDD = 480V ICE 10% td(OFF)I trI tfI FIGURE 20. INDUCTIVE SWITCHING TEST CIRCUIT 6 td(ON)I FIGURE 21. SWITCHING TEST WAVEFORMS HGTP7N60C3D, HGT1S7N60C3DS Handling Precautions for IGBTs Operating Frequency Information Insulated Gate Bipolar Transistors are susceptible to gate-insulation damage by the electrostatic discharge of energy through the devices. When handling these devices, care should be exercised to assure that the static charge built in the handler’s body capacitance is not discharged through the device. With proper handling and application procedures, however, IGBTs are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge. IGBTs can be handled safely if the following basic precautions are taken: Operating frequency information for a typical device (Figure 13) is presented as a guide for estimating device performance for a specific application. Other typical frequency vs collector current (ICE) plots are possible using the information shown for a typical unit in Figures 4, 7, 8, 11 and 12. The operating frequency plot (Figure 13) of a typical device shows fMAX1 or fMAX2 whichever is smaller at each point. The information is based on measurements of a typical device and is bounded by the maximum rated junction temperature. 1. Prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as ECCOSORBD LD26 or equivalent. 2. When devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means - for example, with a metallic wristband. 3. Tips of soldering irons should be grounded. 4. Devices should never be inserted into or removed from circuits with power on. 5. Gate Voltage Rating - Never exceed the gate-voltage rating of VGEM. Exceeding the rated VGE can result in permanent damage to the oxide layer in the gate region. 6. Gate Termination - The gates of these devices are essentially capacitors. Circuits that leave the gate opencircuited or floating should be avoided. These conditions can result in turn-on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup. 7. Gate Protection - These devices do not have an internal monolithic zener diode from gate to emitter. If gate protection is required an external zener is recommended. 7 fMAX1 is defined by fMAX1 = 0.05/(td(OFF)I + td(ON)I). Deadtime (the denominator) has been arbitrarily held to 10% of the on-state time for a 50% duty factor. Other definitions are possible. td(OFF)I and td(ON)I are defined in Figure 21. Device turn-off delay can establish an additional frequency limiting condition for an application other than TJM . td(OFF)I is important when controlling output ripple under a lightly loaded condition. fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON). The allowable dissipation (PD) is defined by PD = (TJM - TC)/RθJC. The sum of device switching and conduction losses must not exceed PD . A 50% duty factor was used (Figure 13) and the conduction losses (PC) are approximated by PC = (VCE x ICE)/2. EON and EOFF are defined in the switching waveforms shown in Figure 21. EON is the integral of the instantaneous power loss (ICE x VCE) during turn-on and EOFF is the integral of the instantaneous power loss during turn-off. All tail losses are included in the calculation for EOFF; i.e. the collector current equals zero (ICE = 0). ECCOSORBD™ is a trademark of Emerson and Cumming, Inc. HGTP7N60C3D, HGT1S7N60C3DS TO-263AB SURFACE MOUNT JEDEC TO-263AB PLASTIC PACKAGE E A A1 H1 TERM. 4 D L2 L1 L 1 3 b b1 e c J1 e1 0.450 (11.43) TERM. 4 L3 b2 3 0.350 (8.89) 0.700 (17.78) 0.150 (3.81) 1 0.080 TYP (2.03) 0.062 TYP (1.58) MINIMUM PAD SIZE RECOMMENDED FOR SURFACE-MOUNTED APPLICATIONS 1.5mm DIA. HOLE INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A 0.170 0.180 4.32 4.57 A1 0.048 0.052 1.22 1.32 4, 5 b 0.030 0.034 0.77 0.86 4, 5 b1 0.045 0.055 1.15 1.39 4, 5 b2 0.310 7.88 2 c 0.018 0.022 0.46 0.55 4, 5 D 0.405 0.425 10.29 10.79 E 0.395 0.405 10.04 10.28 e 0.100 TYP 2.54 TYP 7 e1 0.200 BSC 5.08 BSC 7 H1 0.045 0.055 1.15 1.39 J1 0.095 0.105 2.42 2.66 L 0.175 0.195 4.45 4.95 L1 0.090 0.110 2.29 2.79 4, 6 L2 0.050 0.070 1.27 1.77 3 L3 0.315 8.01 2 NOTES: 1. These dimensions are within allowable dimensions of Rev. C of JEDEC TO-263AB outline dated 2-92. 2. L3 and b2 dimensions established a minimum mounting surface for terminal 4. 3. Solder finish uncontrolled in this area. 4. Dimension (without solder). 5. Add typically 0.002 inches (0.05mm) for solder plating. 6. L1 is the terminal length for soldering. 7. Position of lead to be measured 0.120 inches (3.05mm) from bottom of dimension D. 8. Controlling dimension: Inch. 9. Revision 10 dated 5-99. 4.0mm USER DIRECTION OF FEED 2.0mm TO-263AB 1.75mm C L 24mm TAPE AND REEL 24mm 16mm COVER TAPE 40mm MIN. ACCESS HOLE 30.4mm 13mm 330mm 100mm GENERAL INFORMATION 1. 800 PIECES PER REEL. 2. ORDER IN MULTIPLES OF FULL REELS ONLY. 3. MEETS EIA-481 REVISION "A" SPECIFICATIONS. 8 24.4mm HGTP7N60C3D, HGT1S7N60C3DS TO-220AB 3 LEAD JEDEC TO-220AB PLASTIC PACKAGE A INCHES E ØP A1 Q H1 TERM. 4 D 45o E1 D1 L1 b1 L b c MIN MAX MIN MAX NOTES A 0.170 0.180 4.32 4.57 - A1 0.048 0.052 1.22 1.32 - b 0.030 0.034 0.77 0.86 3, 4 b1 0.045 0.055 1.15 1.39 2, 3 c 0.014 0.019 0.36 0.48 2, 3, 4 D 0.590 0.610 14.99 15.49 - 4.06 - 10.41 - D1 - 0.160 E 0.395 0.410 E1 - 0.030 e 60o 1 2 e1 3 e J1 e1 MILLIMETERS SYMBOL H1 0.100 TYP 0.200 BSC 0.235 0.255 10.04 - 0.76 - 2.54 TYP 5 5.08 BSC 5 5.97 6.47 - J1 0.100 0.110 2.54 2.79 6 L 0.530 0.550 13.47 13.97 - L1 0.130 0.150 3.31 3.81 2 ØP 0.149 0.153 3.79 3.88 - Q 0.102 0.112 2.60 2.84 - NOTES: 1. These dimensions are within allowable dimensions of Rev. J of JEDEC TO-220AB outline dated 3-24-87. 2. Lead dimension and finish uncontrolled in L1. 3. Lead dimension (without solder). 4. Add typically 0.002 inches (0.05mm) for solder coating. 5. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 6. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 7. Controlling dimension: Inch. 8. Revision 2 dated 7-97. All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 9 ASIA Intersil Ltd. 8F-2, 96, Sec. 1, Chien-kuo North, Taipei, Taiwan 104 Republic of China TEL: 886-2-2515-8508 FAX: 886-2-2515-8369