ETC TPA12

TPA12/ TPA12A
Power Operational Amplifier
THALER CORPORATION • 2015 N. FORBES BOULEVARD • TUCSON, AZ. 85745 • (520) 882-4000
FEATURES
APPLICATIONS
• HIGH OUTPUT CURRENT - ±15A PEAK
• MOTOR, VALVE AND ACTUATOR CONTROL
• HIGH VOLTAGE RATING - ±50V
• MAGNETIC DEFLECTION CIRCUITS UP TO 10A
• LOW THERMAL RESISTANCE – 1.4 oC/W
• POWER TRANSDUCERS UP TO 100 kHz
•CURRENT FOLDOVER PROTECTION
• AUDIO AMPLIFIERS UP TO 120W RMS
• EXCELLENT LINEARITY - CLASS A/B OUTPUT
EQUIVALENT SCHEMATIC
DESCRIPTION
The TPA12 and TPA12A are designed for high
voltage and high current applications. They can
deliver up to 600 Watts of power to a load. The
safe operating area (SOA) at the output stage can
be guaranteed for all operating conditions by
properly selecting the external current limiting
resistor.
The class A/B output stage delivers power with
remarkably low distortion (see graph page 3). In
order to maintain stable bias current and low
distortion over the operating temperature range a
resistor/thermistor network in the VBE multiplier is
used to closely match the VBE of the output
transistors.
3
D1
2
7
4
A1
1
5
8
6
EXTERNAL CONNECTIONS AND PIN
CONFIGURATIONS
RCL+
+Vs
+IN 4
-IN
CL+
2
3
1
OUT
OUTPUT
TOP VIEW
5
6
-Vs
7
8
CL-
RCL-
F.O.
TPA12/12A Rev. B Oct. 2006
TPA12/TPA12A
ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Output Current, within SOA
Power Dissipation, internal
Input Voltage, differential
Input Voltage, common mode
100V
15A
125W
±VS -3V
±VS
Temperature, pin solder – 10s
Temperature, junction1
Temperature range, storage
Operating temperature range, case
Electrical Specifications
PARAMETER
TPA12
CONDITIONS
2,5
INPUT
Offset Voltage, initial
Offset Voltage, vs. temp.
Offset Voltage, vs. supply
Offset Voltage, vs. power
Bias Current, initial
Bias Current, vs. temp.
Bias Current, vs. supply
Offset Current, initial
Offset Current, vs. temp.
Input Impedance, DC
Input Capacitance
Common Mode Volt. Range3
Common Mode Rejection, DC
Tc = 25°C
full temperature range
Tc = 25°C
Tc = 25°C
Tc = 25°C
full temperature range
T c= 25°C
T c= 25°C
full temperature range
Tc = 25°C
Tc = 25°C
full temperature range
full temp. range VCM = ±Vs-5
GAIN
Open Loop Gain at 10Hz
Open Loop Gain at 10Hz
Gain Bandwidth Product (1MHz)
Power Bandwidth
Phase Margin AV = +4
Tc = 25°C, 1kΩ load
Full temp range, 8Ω load
Tc = 25°C, 8Ω load
T c= 25°C, 8Ω load
Full temp range, 8Ω load
OUTPUT
Voltage Swing3
Voltage Swing3
Voltage Swing3
Current, peak
Settling Time to .1%,
Slew Rate
Capacitive Load
Capacitive Load
Tc = 25°C, Io = 5A
full temp range, Io = 80mA
Tc = 25°C
T c= 25°C, 2V step
Tc = 25°C
full temp range, Av = 4
full temp range, Av >10
POWER SUPPLY
Voltage
Current, quiescent
full temp range
Tc = 25°C
THERMAL
Resistance, AC junction to case4
Resistance, DC junction to case
Resistance, junction to air
Temperature Range, case
Tc= -55 to +125°C, F>60Hz
Tc= -55 to +125°C
Tc= -55 to +125°C
Meets full range specifications
Notes:
300°C
200°C
-65 to +150°C
-55 to +125°C
T c=25°C,TPA12 =10A, TPA12A=15A
TPA12A
MIN
TYP
MAX
±6
±65
±200
±Vs-5
74
±2
±10
±30
±20
±12
±50
±10
±12
±50
200
3
± Vs-3
100
96
13
TYP
MAX
UNITS
±4
±40
*
*
*
±1
*
*
*
10
*
*
±5
*
*
*
*
*
mV
µV/°C
µV/V
µV/W
nA
pA/°C
pA/V
nA
pA/°C
MΩ
pF
V
db
± 30
± 500
± 30
110
108
4
20
20
*
*
±Vs-6
±Vs-5
±Vs-5
10
2.5
MIN
-25
±20
*
*
*
*
*
db
db
MHz
kHz
o
*
*
*
15
2
4
*
*
*
1.5
SOA
±10
20
*
±40
25
±45
50
0.8
1.25
30
0.9
1.4
+85
*
*
*
-55
V
V
V
A
µs
V/µs
nF
*
*
±50
*
V
mA
*
*
*
*
*
°C/W
°C/W
°C/W
°C
+125
*Same as previous Model.
1. Long term operation at the maximum junction
temperature will result in reduced product life.
Derate internal power dissipation to achieve high
MTTF.
2. The power supply voltage for all specifications is
±40V unless otherwise noted as a test condition.
3. +Vs and -Vs denote the positive and negative supply rail
respectively. Total Vs is measured from +Vs to -Vs.
4. Rating applies if the output current alternates between both
output transistors at a rate faster than 60Hz.
5. Exceeding CMV range can cause the output to latch.
Caution: The internal substrate contains beryllia (BeO). Do not crush, break, machine or subject the substrate to temperatures
in excess of 850C.
TPA12/12A Rev. B Oct. 2006
TYPICAL PERFORMANCE CURVES
BIAS CURRENT
100
80
60
TPA12
40
20
17.5
2.2
15.0
1.9
1.6
1.3
1.0
.7
20
40
60
80
-50 -25
100 120 140
RCL = 0.18Ω, RFO = 0
7.5
Vo = 24V
Vo = 0V
5.0
0
25
50
Vo = -24V
0
-50 -25
0
25
75 100 125
50
75 100 125
CASE TEMPERATURE oC
CASE TEMPERATURE oC
SMALL SIGNAL RESPONSE
PHASE RESPONSE
POWER RESPONSE
100
-30
80
-60
60
-90
40
100
-120
20
-150
0
-180
100
1K
10K 100K 1M 10M
1
10
FREQUENCY (Hz)
COMMON MODE REJECTION
100
1K
60
40
20
VIN = ±5V, tr = 100ns
4
2
0
-2
-4
100K 1M
0
2
4
HARMONIC DISTORTION
Po
W
=4
0.03
=
Po
12
0W
1K
3K
10K
FREQUENCY (Hz)
30
20
10
100
30K 100K
1K
10K
100K
FREQUENCY (Hz)
OUTPUT VOLTAGE SWING
6
1.2
T c = -2
1.0
5o C
oC
T c = 25
Tc = 8
0.8
oC
5
Tc = 1
oC
25
0.4
300
40
10
12
0.6
0.003
100
10
VOLTAGE DROP FROM SUPPLY (V)
=
W
0m
10
Po
0.01
8
1.4
NORMALIZED (X)
0.3
0.1
6
1.6
AV = 10
VS = ±37V
RL = 4Ω
50K 70K 100K
50
QUIESCENT CURRENT
3
30K
70
TIME (µs)
FREQUENCY (Hz)
1
20K
INPUT NOISE
-8
10K
10
100
-6
1K
abs(+Vs)+abs(-Vs)=30V
FREQUENCY (Hz)
INPUT NOISE VOLTAGE (nV/√Hz))
OUTPUT VOLTAGE (V)
80
100
15
abs(+Vs)+abs(-Vs)=80V
PULSE RESPONSE
6
100
10
22
4.6
10K
10K 100K 1M 10M
8
1
32
FREQUENCY (Hz)
120
0
46
6.8
-210
10
abs(+Vs)+abs(-Vs)=100V
68
OUTPUT VOLTAGE (VP-P)
0
PHASE (o)
120
1
COMMON MODE REJECTION (dB)
Vo = 0V
10.0
CASE TEMPERATURE oC
-20
DISTORTION (%)
RCL = 0.06Ω, RFO = ∞
12.5
2.5
.4
0
0
OPEN LOOP GAIN (dB)
TPA12A
CURRENT LIMIT
2.5
CURRENT LIMIT (A)
120
NORMALIZED BIAS CURRENT (X)
INTERNAL POWER DISSIPATION (W)
POWER DERATING
140
40
50
60
70
80
90
TOTAL SUPPLY VOLTAGE (V)
100
5
4
-Vo
3
+Vo
2
1
0
3
6
9
12
15
OUTPUT CURRENT (A)
TPA12/12A Rev. B Oct. 2006
DISCUSSION OF PERFORMANCE
SAFE OPERATING AREA (SOA)
±Vs
The output stage of most power amplifiers has three
distinct limitations:
50V
40V
35V
30V
25V
20V
15V
1) The current handling capability of the transistor
geometry and the wire bonds.
2) The second breakdown effect which occurs
whenever the simultaneous collector current and
collector-emitter voltage exceeds specified limits.
15
2.0
=8
3 oC
s
5m
C
=2
5 oC
E
AT
ST
0.6
0.4
0.3
10
20
30
40
2.4A
2.9A
3.7A
4.1A
4.9A
6.3A
8.0A
These simplified limits may be exceeded with further
analysis using the operating conditions for a specific
application.
50
70
CURRENT LIMIT
For fixed current limit, leave pin 7 open and use the
equations in 1 and 2.
DY
EA
ST
T =
C
125 o
C
1.0
s
C
T
t=
T
MA
L
s
1m
ER
4.0
m
0.5
TH
6.0
0.30A
0.58A
0.87A
1.50A
2.40A
2.90A
4.20A
Short to
Common
t=
SECOND BREAKDOWN
10
t=
OUTPUT CURRENT FROM +Vs OR -Vs (A)
3) The junction temperature of the output resistors.
transistors.
SOA
Short to ±VS
C,L or EMF Load
100
RCL = 0.65/LCL
(1)
ICL = 0.65/RCL
(2)
Where:
ICL is the current limit in amperes.
SUPPLY TO OUTPUT DIFFERENTIAL VOLTAGE (V)
The SOA curves combine the effect of all limits for
this Power Op Amp. For a given application, the
direction and magnitude of the output current should
be calculated or measured and checked against the
SOA curves. This is simple for resistive loads but
more complex for reactive and EMF generating
loads. The following guidelines may save extensive
analytical efforts.
RCL is the current limit resistor in ohms.
ICL= (0.65+(Vo*0.014)) / RCL
(3)
1.Capacitive and dynamic* loads up to the following
maximums are safe with the current limits set as
specified.
RCL =( 0.65 + (Vo * 0.014)) / ICL
(4)
±Vs
Capacitive Load
ILIM = 5A
ILIM = 10A
50V
40V
35V
30V
25V
20V
15V
200µF
500µF
2.0mF
7.0mF
25mF
60mF
150mF
125µF
350µF
850µF
2.5mF
10mF
20mF
60mF
Inductive Load
ILIM = 5A
ILIM= 10A
5mH
15mH
50mH
150mH
500mH
1,000mH
2,500mH
2.0mH
3.0mH
5.0mH
10mH
20mH
30mH
50mH
2. The amplifier can handle any EMF generating or
reactive load and short circuits to the supply rail or
common if the current limits are set as follows at
Tc = 25OC.
* If the inductive load is driven near steady state
conditions, allowing the output voltage to drop more than
8V below the supply rail with ILIM = 15A or 25V below the
supply rail with ILIM = 5A while the amplifier is current
limiting, the inductor must be capacitively coupled or the
current limit must be lowered to meet SOA criteria.
For certain applications the foldover current limit
adds a slope to the current limit which allows more
power to be delivered to the load without violating
the SOA. For maximum foldover slope, ground pin
7and use equations 3 and 4.
Where Vo is the output voltage in volts.
Most designers start with either equation 1 to set
RCL for the desired output current at 0V out or with
equation 4 set to RCL at the maximum output
voltage. Equation 3 should then be used to plot the
resulting foldover limits on the SOA graph. If
equation 3 results in a negative current limit,
foldover slope must be reduced. This can happen
when the output voltage is the opposite polarity of
the supply conducting the current.
In applications where a reduced foldover slope is
desired, this can be achieved by adding a resistor
(RFO) between pin 7 and ground. Use equations 5
and 6 with this new resistor in the circuit.
ICL= ((0.65+(VO*0.014)/(10.14+RFO)) / RCL
(5)
RCL= ((0.65+(VO*0.014)/(10.14+RFO)) / ICL
(6)
Where RFO is in K ohms.
TPA12/12A Rev. B Oct. 2006
MECHANICAL
TO3-8 Package
TPA12/12A Rev. B Oct. 2006