PDM41028 1 Megabit Static RAM 256K x 4-Bit Description Features n High speed access times Com’l: 10, 12 and 15 ns Ind’l: 12 and 15 ns n Low power operation (typical) - PDM41028SA Active: 400 mW Standby: 150 mW - PDM41028LA Active: 350 mW Standby: 100 mW n n n 1 The PDM41028 is a high-performance CMOS static RAM organized as 262,144 x 4 bits. Writing to this device is accomplished when the write enable (WE) and the chip enable (CE) inputs are both LOW. Reading is accomplished when WE remains HIGH and CE and OE are both LOW. The PDM41028 operates from a single +5V power supply and all the inputs and outputs are fully TTLcompatible. The PDM41028 comes in two versions, the standard power version PDM41028SA and a low power version the PDM41028LA. The two versions are functionally the same and only differ in their power consumption. Single +5V (±10%) power supply TTL-compatible inputs and outputs Packages Plastic SOJ (300 mil) - TSO Plastic SOJ (400 mil) - SO The PDM41028 is available in a 28-pin 300-mil SOJ, and a 28-pin 400-mil SOJ for surface mount applications. I/O 0 I/O 1 3 4 5 6 7 Functional Block Diagram Addresses 2 A0 • • • • • A17 Decoder • • • • • • Memory 8 Matrix 9 • • • • • Input Data Control Column I/O 10 I/O 2 I/O 3 11 CE 12 WE OE Rev. 2.2 - 4/29/98 1 PDM41028 Pin Configuration SOJ Pin Description A7 1 28 Vcc A8 2 27 A6 Name Description A9 3 26 A5 A17-A0 Address Inputs A10 4 25 A4 I/O3-I/O0 Data Inputs/Outputs A11 5 24 A3 OE Output Enable Input A12 6 23 A2 A13 7 22 A1 WE Write Enable Input A14 8 21 A0 CE Chip Enable Input A15 9 NC NC No Connect A16 10 20 19 A17 11 18 I/O2 VCC Power (+5V) CE 12 17 I/O1 VSS Ground OE 13 14 16 I/O0 15 WE Vss I/O3 Truth Table(1) OE WE CE I/O MODE X X H Hi-Z Standby L H L DOUT Read X L L DIN Write H H L Hi-Z Output Disable NOTE: 1. H = VIH, L = VIL, X = DON’T CARE Absolute Maximum Ratings (1) Symbol Rating Com’l. Ind. Unit VTERM Terminal Voltage with Respect to VSS –0.5 to +7.0 –0.5 to +7.0 V TBIAS Temperature Under Bias –55 to +125 –65 to +135 °C TSTG Storage Temperature –55 to +125 –65 to +150 °C PT Power Dissipation 1.0 1.0 W IOUT DC Output Current 50 50 mA 125 145 °C Tj Maximum Junction Temperature (2) NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. Appropriate thermal calculations should be performed in all cases and specifically for those where the chosen package has a large thermal resistance (e.g., TSOP). The calculation should be of the form: Tj = Ta + P * θja where Ta is the ambient temperature, P is average operating power and θja the thermal resistance of the package. For this product, use the following θja values: SOJ: 76o C/W TSOP: 100o C/W 2 Rev. 2.2 - 4/29/98 PDM41028 Recommended DC Operating Conditions Symbol Parameter Min. Typ. Max. Unit VCC Supply Voltage 4.5 5.0 5.5 V VSS Supply Voltage 0 0 0 V Industrial Ambient Temperature –40 25 85 °C Commercial Ambient Temperature 0 25 70 °C 1 2 3 DC Electrical Characteristics (VCC = 5.0V ± 10%) PDM41028SA PDM41028LA Min. Max. Min. Max. Unit Symbol Parameter Test Conditions ILI Input Leakage Current VCC = MAX., VIN = VSS to VCC Com’l/ Ind. –5 5 –5 5 µA ILO Output Leakage Current VCC= MAX., CE = VIH, VOUT = VSS to VCC Com’l/ Ind. –5 5 –5 5 µA 0.8 V VIL Input Low Voltage –0.5 (1) 0.8 –0.5 (1) VIH Input High Voltage 2.2 6.0 2.2 6.0 V VOL Output Low Voltage IOL = 8 mA, VCC = Min. IOL = 10 mA, VCC = Min. — — 0.4 0.5 — — 0.4 0.5 V V VOH Output High Voltage IOH = –4 mA, VCC = Min. 2.4 — 2.4 — V 4 5 6 7 NOTE: 1. VIL(min) = –3.0V for pulse width less than 20 ns Power Supply Characteristics -10 Symbol Parameter ICC Operating Current CE = VIL, ISB ISB1 -12 8 -15 Power Com’l. Com’l Ind. Com’l Ind. SA 250 230 240 185 195 Unit mA f = fMAX = 1/tRC VCC = Max. IOUT = 0 mA LA 230 210 220 165 175 mA Standby Current CE = VIH SA 80 70 70 55 55 mA f = fMAX = 1/tRC VCC = Max. LA 75 65 65 50 50 mA Full Standby Current CE ≥ VHC SA 20 15 25 10 15 mA f=0 VCC = Max., VIN ≥ VCC – 0.2V or ≤ 0.2V LA 10 10 10 5 10 mA 9 10 11 12 SHADED AREA = PRELIMINARY DATA NOTES: All values are maximum guaranteed values. VLC ≤ 0.2V, VHC ≥ VCC – 0.2V Rev. 2.2 - 4/29/98 3 PDM41028 Capacitance(1) (TA = +25°C, f = 1.0 MHz) Symbol Parameter Max. Unit CIN Input Capacitance 8 pF COUT Output Capacitance 8 pF NOTE:1. This parameter is determined by device characterization but is not production tested. AC Test Conditions Input pulse levels VSS to 3.0V Input rise and fall times 3 ns Input timing reference levels 1.5V Output reference levels 1.5V Output load See Figures 1 and 2 +5V +5V 480Ω 480Ω DOUT DOUT 255Ω 30 pF Delta tAA - ns Figure 1. Output Load Equivalent 5 pf Figure 2. Output Load Equivalent (for tLZCE, tHZCE, tLZWE, tHZWE, tLZOE, tHZOE) Typical Delta tAA vs Capacitive Loading 5 4 3 2 1 0 0 4 255Ω Figure 30 60 4. 90 120 Additional Lumped Capacitive Loading (pF) Rev. 2.2 - 4/29/98 PDM41028 Read Cycle No. 1(4, 5) 1 tRC ADDR tAA tOH DOUT 2 DATA VALID PREVIOUS DATA VALID 3 Read Cycle No. 2(2, 4, 6) tRC 4 ADDR tAA tACE CE 5 tHZCE tLZCE OE tLZOE tHZOE DOUT 6 DATA VALID tAOE 7 8 AC Electrical Characteristics -10(7) Description READ Cycle Sym READ cycle time tRC -12(7) -15 Min. Max. Min. Max. Min. Max. Units 10 12 15 Address access time tAA 10 12 15 ns Chip enable access time tACE 10 12 15 ns Output hold from address change Chip enable to output in low Z (1,3) Chip disable to output in high Z(1,2,3) Chip enable to power up time(3) Chip disable to power down time tOH 3 3 3 ns tLZCE 5 5 5 ns tHZCE tPU (3) tPD Output enable access time tAOE Output enable to output in low Z (1,3) tLZOE Output disable to output in high Z (1,3) 6 0 tHZOE 6 0 10 6 0 6 0 6 7 0 12 10 ns 11 ns 15 ns 6 ns 0 6 9 ns ns 6 12 ns SHADED AREA = PRELIMINARY DATA Notes referenced are after Data Retention Table. Rev. 2.2 - 4/29/98 5 PDM41028 Write Cycle No. 1 (Write Enable Controlled) tWC ADDR tAW tAH tCW CE tWP2 WE tAS tDS DIN tDH DATA VALID tHZWE DOUT tLZWE HIGH-Z HIGH-Z Write Cycle No. 2 (Write Enable Controlled) tWC ADDR tAW tAH tCW CE tAS tWP1 WE tDS DIN tDH DATA VALID HIGH-Z DOUT NOTE: Output Enable (OE) is inactive (high) Write Cycle No. 3 (Chip Enable Controlled) tWC ADDR tAW tCW CE tAS WE tAH tWP1 tDS DIN DOUT 6 tDH DATA VALID HIGH-Z Rev. 2.2 - 4/29/98 PDM41028 AC Electrical Characteristics -10(7) Description -12(7) WRITE Cycle Sym WRITE Cycle time tWC 10 12 15 ns Chip enable active time tCW 10 10 11 ns Address Valid to end of write tAW 10 10 11 ns Address setup time tAS 0 0 0 ns Address hold from end of write tAH 0 0 0 ns Write pulse width tWP1 9 10 11 ns Write pulse width tWP2 10 11 12 ns tDS 7 7 7 ns Data setup time Data hold time 1 -15 Min. Max. Min. Max. Min. Max. Units tDH 0 0 0 ns (1,3) Write disable to output in low Z tLZWE 0 0 0 ns Write enable to output in high Z(1,3) tHZWE 7 7 7 2 3 4 ns 5 SHADED AREA = PRELIMINARY DATA Notes referenced are after Data Retention Table 6 Low VCC Data Retention Waveform Data Retention Mode V CC 4.5V t CDR CE 7 4.5V VDR VIH V IL tR VDR 8 DON'T CARE 9 Data Retention Electrical Characteristics (LA Version Only) Symbol Parameter VDR VCC for Retention Data ICCDR Data Retention Current tCDR tR (3) Chip Deselect to Data Retention Time Operation Recovery Time Test Conditions CE ≥ VCC – 0.2V VIN ≥ VCC – 0.2V or ≤ 0.2V Min. Typ. Max. Unit 2 — — V VCC = 2V — — 500 µA VCC = 3V — — 750 µA 0 — — ns tRC — — ns 10 11 NOTES: (For three previous Electrical Characteristics tables) 1. The parameter is tested with CL = 5 pF as shown in Figure 2. Transition is measured ±200 mV from steady state voltage. 2. At any given temperature and voltage condition, tHZCE is less than tLZCE. 3. This parameter is sampled. 4. WE is high for a READ cycle. 5. The device is continuously selected. Chip Enable is held in its active state. 6. The address is valid prior to or coincident with the latest occuring Chip Enable. 7. Vcc = 5V ± 5%. Rev. 2.2 - 4/29/98 7 12 PDM41028 Ordering Information XXXXX X Device Type Power XX Speed X X X Package Type Process Temp. Range Preferred Shipping Container Blank Tubes TR Tape & Reel TY Tray Blank Commercial (0° to +70°C) I Industrial (–40°C to +85°C) A Automotive ( –40°C to +105°C) TSO 28-pin 300-mil Plastic SOJ SO 28-pin 400-mil Plastic SOJ 10 12 15 Commercial Only SA LA Standard Power Low Power (Use 15ns for slower designs.) PDM41028 - (256Kx4) Static RAM Faster Memories for a Faster World ™ 8 Rev. 2.2 - 4/29/98