ETC SPT7868SIR

SPT7868
10-BIT, 80 MSPS A/D CONVERTER
PRELIMINARY INFORMATION
FEATURES
APPLICATIONS
• 80 MSPS maximum sample rate
• 9.2 effective number of bits at ƒIN = 15 MHz and
ƒS = 80 MSPS
• 2 VP-P full-scale input range
• Differential input 2.5 V common mode
• Internal or external voltage reference
• Common-mode voltage reference output
• +3.3 V / +5 V digital output logic compatibility
• +5 V analog power supply
• High-speed applications where low power dissipation is
required
• Video imaging
• Medical imaging
• Radar receivers
• IR imaging
• Digital communications
GENERAL DESCRIPTION
processing technologies to achieve its advanced performance. Inputs and outputs are TTL/CMOS compatible to
interface with TTL/CMOS logic systems. Output data format is straight binary.
The SPT7868 is a 10-bit, 80 MSPS analog-to-digital converter with low power dissipation at only 627 mW typical at
80 MSPS with a power supply of +5.0 V. The digital outputs
are +3 V or +5 V, and are user selectable. The SPT7868
has incorporated proprietary circuit design and CMOS
The SPT7868 is available in a 28-lead SSOP package
over the industrial temperature range.
BLOCK DIAGRAM
VDD
GND
Sleep
VCM
Bias
Cell
Bandgap
Reference
EXT/INT
REFH
REFL
VIN
VIN
THA
10-BIT
80 MSPS
ADC
10
Data
Output
Latches
& Buffers
1
10
OR
D0–D9
2
CLK, CLK
GND
OVDD
Signal Processing Technologies, Inc.
Phone: 719-528-2300
4755 Forge Road, Colorado Springs, Colorado 80907, USA
Fax: 719-528-2370
Web Site: http://www.spt.com
e-mail: [email protected]
ABSOLUTE MAXIMUM RATINGS (Beyond which damage may occur)1 25 °C
Supply Voltages
VDD ....................................................................... TBD
OVDD ..................................................................... TBD
Output
Digital Outputs ....................................................... TBD
Temperature
Operating Temperature ........................... –40 to +85 °C
Storage Temperature ............................ –65 to +150 °C
Input Voltages
Analog Input .......................................................... TBD
CLK Input .............................................................. TBD
Note: 1. Operation at any Absolute Maximum Rating is not implied. See Electrical Specifications for proper nominal applied conditions in typical
applications.
ELECTRICAL SPECIFICATIONS
TA=TMIN to TMAX, VDD=+5.0 V, ƒS=80 MSPS, VRHS=3.0 V, VRLS=2.0 V, unless otherwise specified.
PARAMETERS
TEST
CONDITIONS
TEST
LEVEL
Resolution
DC Accuracy
Differential Linearity Error (DLE)
Integral Linearity Error (ILE)
@ +25 °C
full temperature
@ +25 °C
full temperature
V
VI
V
V
V
Timing Characteristics
Conversion Rate
Pipeline Delay (Latency)
Output Delay (tD)
Aperture Delay Time
Aperture Jitter Time
Total Harmonic Distortion (THD)
ƒIN = 15 MHz, ƒCLK = 80 MSPS
Signal-to-Noise and Distortion (SINAD)
ƒIN = 15 MHz, ƒCLK = 80 MSPS
Spurious Free Dynamic Range (SFDR)
ƒIN = 15 MHz, ƒCLK = 80 MSPS
SPT
MAX
UNITS
Bits
±0.5
±0.75
±0.8
±1.0
Guaranteed
V
Analog Input
Input Voltage Range (Differential)
Input Common Mode
Input Capacitance
Common Mode Rejection Ratio (CMRR)
Signal-to-Noise Ratio (SNR)
ƒIN = 15 MHz, ƒCLK = 80 MSPS
SPT7868
TYP
10
No Missing Codes
Dynamic Performance
Effective Number of Bits (ENOB)
ƒIN = 15 MHz, ƒCLK = 80 MSPS
MIN
LSB
LSB
LSB
LSB
±1
2.5
2
TBD
V
V
pF
VI
IV
IV
V
V
80
TBD
25 °C
–40 °C to +85 °C
I
IV
9.0
8.8
9.2
9.0
Bits
Bits
25 °C
–40 °C to +85 °C
I
IV
57
TBD
57
TBD
dB
dB
25 °C
–40 °C to +85 °C
I
IV
25 °C
–40 °C to +85 °C
I
IV
56
TBD
57
TBD
dB
dB
25 °C
–40 °C to +85 °C
I
IV
69
TBD
72
TBD
dB
dB
7
TBD
TBD
TBD
–69
TBD
TBD
–66
TBD
MSPS
clocks
ns
ns
ps (rms)
dB
dB
SPT7868
2
8/15/00
ELECTRICAL SPECIFICATIONS
TA=TMIN to TMAX, VDD=+5.0 V, ƒS=80 MSPS, VRHS=3.0 V, VRLS=2.0 V, unless otherwise specified.
PARAMETERS
TEST
CONDITIONS
TEST
LEVEL
Power Supply Requirements
VDD Voltage (Analog Supply)
OVDD Voltage (Output Supply)
VDD Current
OVDD Current
Power Dissipation
External Voltage Reference
Internal Voltage Reference
Sleep Mode Power Dissipation
External Voltage Reference
Internal Voltage Reference
Power Supply Rejection Ratio (PSRR)
SPT7868
TYP
MAX
UNITS
5.0
3.3/5.0
125
14
5.25
5.25
131
16
V
V
mA
mA
VI
VI
619
627
643
651
mW
mW
VI
VI
V
TBD
TBD
TBD
TBD
TBD
mW
mW
mV/V
TBD
2.05
3.05
V
ppm/°C
kΩ
µA
V
V
IV
IV
VI
VI
MIN
4.75
2.7
Internal References
Common Mode Voltage Reference (VCM) IO = –1 µA
Common Mode Voltage Tempco
Output Impedance
Current Capability
(EXT/INT) = 0
Reference Low Output Voltage (VREFL)
Reference High Output Voltage (VREFH) (EXT/INT) = 0
VI
V
V
VI
VI
VI
TBD
1.95
2.95
2.5
100
TBD
TBD
2.0
3.0
External References
Reference Low Input Voltage Range
Reference High Input Voltage Range
(EXT/INT) = 1
(EXT/INT) = 1
IV
IV
1.7
2.7
2.0
3.0
2.3
3.3
V
V
IO = –2 mA
IO = 2 mA
VI
VI
85% OVDD
90% OVDD
0.2
OVDD
0.4
V
V
Digital Inputs
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
VI
VI
VI
VI
80% VDD
20% VDD
±10
±10
V
V
µA
µA
Clock Inputs
Clock Inputs High Voltage
Clock Inputs Low Voltage
VI
VI
2
5
0.4
V
V
Digital Outputs
Output Voltage High
Output Voltage Low
TEST LEVEL CODES
TEST LEVEL
All electrical characteristics are subject to the
following conditions:
All parameters having min/max specifications are
guaranteed. The Test Level column indicates the
specific device testing actually performed during
production and Quality Assurance inspection. Any
blank section in the data column indicates that the
specification is not tested at the specified
condition.
SPT
I
II
TEST PROCEDURE
100% production tested at the specified temperature.
100% production tested at TA = +25 °C, and sample tested
at the specified temperatures.
QA sample tested only at the specified temperatures.
Parameter is guaranteed (but not tested) by design and
characterization data.
Parameter is a typical value for information purposes only.
100% production tested at TA = +25 °C. Parameter is
guaranteed over specified temperature range.
III
IV
V
VI
SPT7868
3
8/15/00
Figure 1 – Driving Differential Inputs with a
Differential Configuration
VIHD
VICM
VILD
Figure 2 – Driving Differential Inputs with a SingleEnded Configuration
VIH
VID
VICM
VIL
PACKAGE OUTLINE
28-Lead SSOP
INCHES
28
I H
SYMBOL
MIN
MAX
MIN
MAX
A
0.397
0.407
10.07
10.33
B
0.002
0.008
0.05
0.21
C
1
A
MILLIMETERS
0.0256 typ
0.65 typ
D
0.010
0.015
0.25
0.38
E
0.004
0.008
0.09
0.20
F
0.066
0.070
1.68
1.78
G
0.025
0.037
0.63
0.95
H
0.301
0.311
7.65
7.90
I
0.205
0.212
5.20
5.38
F
B
C
D
H
G
E
SPT
SPT7868
4
8/15/00
PIN ASSIGNMENTS
PIN FUNCTIONS
GND
1
28
D0
VDD
2
27
D1
REFL
3
26
D2
REFH
4
25
D3
EXT/INT
5
24
D4
VCM
6
23
OGND
GND
7
22
OVDD
VDD
8
21
OGND
VIN
9
20
OVDD
VIN 10
19
D5
Sleep 11
18
D6
CLK 12
17
D7
CLK 13
16
D8
OR 14
15
D9 (MSB)
SPT7868
28L SSOP
Name Function
GND
Analog ground
VDD
Analog +5 V
OGND
Output ground
OVDD
Supply voltage for digital outputs +5 V or
+3.3 V
REFL
Reference pin low, input for external
reference, bypass with capacitor (100 nF)
when internal reference is selected.
REFH
Reference pin high, input for external
reference, bypass with capacitor (100 nF)
when internal voltage is selected.
VCM
2.5 V common mode voltage reference output
VIN
Non-inverted analog input
VIN
Inverted analog input
CLK
Clock input pin
CLK
Complement of clock input pin, internally
biased to 1.5 V; if single-ended clock is used,
bypass to GND with 100 nF
D0–D9
Digital outputs; D0 = LSB; 3.3 V/5 V
compatible
OR
Overrange bit; 3.3 V/5 V compatible
EXT/INT EXT/INT = 1, external reference used; internal
reference powered down
EXT/INT = 0, internal reference used;
internally pulled down
Sleep
Sleep = 1, normal operation; internally pulled
up
Sleep = 0, powered-down mode
ORDERING INFORMATION
PART NUMBER
SPT7868SIR
TEMPERATURE RANGE
PACKAGE TYPE
–40 to +85 °C
28L SSOP
Signal Processing Technologies, Inc. reserves the right to change products and specifications without notice. Permission is
hereby expressly granted to copy this literature for informational purposes only. Copying this material for any other use is strictly
prohibited.
WARNING – LIFE SUPPORT APPLICATIONS POLICY – SPT products should not be used within Life Support Systems without
the specific written consent of SPT. A Life Support System is a product or system intended to support or sustain life which, if it
fails, can be reasonably expected to result in significant personal injury or death.
Signal Processing Technologies believes that ultrasonic cleaning of its products may damage the wire bonding, leading to device
failure. It is therefore not recommended, and exposure of a device to such a process will void the product warranty.
SPT
SPT7868
5
8/15/00