IS61C1024AL IS64C1024AL ISSI ® 128K x 8 HIGH-SPEED CMOS STATIC RAM JANUARY 2005 FEATURES DESCRIPTION • High-speed access time: 12, 15 ns • Low active power: 160 mW (typical) • Low standby power: 1000 µW (typical) CMOS standby • Output Enable (OE) and two Chip Enable (CE1 and CE2) inputs for ease in applications • Fully static operation: no clock or refresh required • TTL compatible inputs and outputs • Single 5V (±10%) power supply • Commercial, industrial, and automotive temperature ranges available • Lead free available The ISSI IS61C1024AL/IS64C1024AL is a very high-speed, low power, 131,072-word by 8-bit CMOS static RAMs. They are fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields higher performance and low power consumption devices. When CE1 is HIGH or CE2 is LOW (deselected), the device assumes a standby mode at which the power dissipation can be reduced by using CMOS input levels. Easy memory expansion is provided by using two Chip Enable inputs, CE1 and CE2. The active LOW Write Enable (WE) controls both writing and reading of the memory. The IS61C1024AL/IS64C1024AL is available in 32-pin 300mil SOJ, 32-pin 400-mil SOJ, 32-pin TSOP (Type I, 8x20), and 32-pin sTSOP (Type I, 8 x 13.4) packages. FUNCTIONAL BLOCK DIAGRAM A0-A16 DECODER 128K x 8 MEMORY ARRAY I/O DATA CIRCUIT COLUMN I/O VDD GND I/O0-I/O7 CE1 CE2 OE WE CONTROL CIRCUIT Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 01/24/05 1 ISSI IS61C1024AL, IS64C1024AL PIN CONFIGURATION PIN CONFIGURATION 32-Pin SOJ 32-Pin TSOP (Type 1) (T) and sTSOP (Type 1) (H) NC 1 32 VDD A16 2 31 A15 A14 3 30 CE2 A12 4 29 WE A7 5 28 A13 A6 6 27 A8 A5 7 26 A9 A4 8 25 A11 A3 9 24 OE A2 10 23 A10 A1 11 22 CE1 A0 12 21 I/O7 I/O0 13 20 I/O6 I/O1 14 19 I/O5 I/O2 15 18 I/O4 GND 16 17 I/O3 A11 A9 A8 A13 WE CE2 A15 VDD NC A16 A14 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 ® OE A10 CE1 I/O7 I/O6 I/O5 I/O4 I/O3 GND I/O2 I/O1 I/O0 A0 A1 A2 A3 PIN DESCRIPTIONS A0-A16 Address Inputs CE1 Chip Enable 1 Input CE2 Chip Enable 2 Input OE Output Enable Input WE Write Enable Input I/O0-I/O7 Input/Output VDD Power GND Ground OPERATING RANGE (IS61C1024AL) Range Commercial Ambient Temperature 0°C to +70°C VDD 5V ± 10% Industrial -40°C to +85°C 5V ± 10% OPERATING RANGE (IS64C1024AL) Range Automotive Ambient Temperature -40°C to +125°C VDD 5V ± 10% TRUTH TABLE Mode Not Selected (Power-down) Output Disabled Read Write 2 WE CE1 CE2 OE X X H H L H X L L L X L H H H X X H L X I/O Operation High-Z High-Z High-Z DOUT DIN VDD Current ISB1, ISB2 ISB1, ISB2 ICC1, ICC2 ICC1, ICC2 ICC1, ICC2 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 01/24/05 ISSI IS61C1024AL, IS64C1024AL ® ABSOLUTE MAXIMUM RATINGS(1) Symbol VTERM TSTG PT IOUT Parameter Terminal Voltage with Respect to GND Storage Temperature Power Dissipation DC Output Current (LOW) Value –0.5 to +7.0 –65 to +150 1.5 20 Unit V °C W mA Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. CAPACITANCE(1,2) Symbol Parameter CIN Input Capacitance COUT Output Capacitance Conditions Max. Unit VIN = 0V 5 pF VOUT = 0V 7 pF Notes: 1. Tested initially and after any design or process changes that may affect these parameters. 2. Test conditions: TA = 25°C, f = 1 MHz, VDD = 5.0V. DC ELECTRICAL CHARACTERISTICS (Over Operating Range) Symbol Parameter Test Conditions Min. Max. Unit VOH Output HIGH Voltage VDD = Min., IOH = –4.0 mA 2.4 — V VOL Output LOW Voltage VDD = Min., IOL = 8.0 mA — 0.4 V VIH Input HIGH Voltage 2.2 VDD + 0.5 V VIL Input LOW Voltage(1) –0.3 0.8 V ILI Input Leakage GND ≤ VIN ≤ VDD Com. Ind. Auto. –1 –2 –5 1 2 5 µA ILO Output Leakage GND ≤ VOUT ≤ VDD Outputs Disabled Com. Ind. Auto. –1 –2 –5 1 2 5 µA Note: 1. VIL = –3.0V for pulse width less than 10 ns. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 01/24/05 3 ISSI IS61C1024AL, IS64C1024AL ® IS61C1024AL/IS64C1024AL POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range) Symbol Parameter Test Conditions ICC1 VDD = VDD MAX., CE1 = VIL IOUT = 0 mA, f = 0 ICC2 ISB1 ISB2 VDD Operating Supply Current VDD Dynamic Operating Supply Current TTL Standby Current (TTL Inputs) CMOS Standby Current (CMOS Inputs) -12 ns Min. Max. Com. Ind. Auto. — — Com. Ind. Auto. typ.(2) — — 45 50 — 32 VDD = VDD MAX., VIN = VIH or VIL CE1 ≥ VIH, f = 0 or CE2 ≤ VIL, f = 0 Com. Ind. Auto. — — 1 1.5 VDD = VDD MAX., CE1 ≥ VDD – 0.2V, CE2 ≤ 0.2V VIN ≥ VDD – 0.2V, or VIN ≤ 0.2V, f = 0 Com. Ind. Auto. typ.(2) — — 400 450 — 200 VDD = VDD MAX., CE1 = VIL IOUT = 0 mA, f = fMAX -15 ns Min. Max. 35 40 Unit mA — 45 mA — 55 mA — 2 µA — 500 Note: 1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change. 2. Typical Values are measured at VDD = 5V, TA = 25oC and not 100% tested. 4 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 01/24/05 ISSI IS61C1024AL, IS64C1024AL ® READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range) Symbol -12 Min. Max. Parameter -15 Min. Max. Unit tRC Read Cycle Time 12 — 15 — ns tAA Address Access Time — 12 — 15 ns tOHA Output Hold Time 3 — 3 — ns tACE1 CE1 Access Time — 12 — 15 ns tACE2 CE2 Access Time — 12 — 15 ns tDOE OE Access Time — 6 — 7 ns OE to Low-Z Output 0 — 0 — ns tHZOE(2) OE to High-Z Output 0 6 0 6 ns tLZCE1 CE1 to Low-Z Output 2 — 2 — ns tLZCE2 CE2 to Low-Z Output 2 — 2 — ns tHZCE CE1 or CE2 to High-Z Output 0 7 0 8 ns tPU(3) CE1 or CE2 to Power-Up 0 — 0 — ns tPD CE1 or CE2 to Power-Down — 12 — 12 ns tLZOE (2) (2) (2) (2) (3) Notes: 1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading specified in Figure 1. 2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested. 3. Not 100% tested. AC TEST CONDITIONS Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Level Output Load Unit 0V to 3.0V 3 ns 1.5V See Figures 1 and 2 AC TEST LOADS 480 Ω 480 Ω 5V 5V OUTPUT OUTPUT 30 pF Including jig and scope Figure 1 255 Ω 5 pF Including jig and scope Figure 2 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 01/24/05 255 Ω 5 ISSI IS61C1024AL, IS64C1024AL ® AC WAVEFORMS READ CYCLE NO. 1(1,2) t RC ADDRESS t AA t OHA t OHA DOUT DATA VALID PREVIOUS DATA VALID READ1.eps READ CYCLE NO. 2(1,3) t RC ADDRESS t AA t OHA OE t HZOE t DOE t LZOE CE1 CE2 t ACE1 t ACE2 t LZCE1 t LZCE2 DOUT HIGH-Z t HZCE1 t HZCE2 DATA VALID CE2_RD2.eps Notes: 1. WE is HIGH for a Read Cycle. 2. The device is continuously selected. OE, CE1 = VIL, CE2 = VIH. 3. Address is valid prior to or coincident with CE1 LOW and CE2 HIGH transitions. 6 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 01/24/05 ISSI IS61C1024AL, IS64C1024AL ® WRITE CYCLE SWITCHING CHARACTERISTICS(1,2) (Over Operating Range, Standard and Low Power) Symbol Parameter -12 ns Min. Max. -15 ns Min. Max. Unit tWC Write Cycle Time 12 — 15 — ns tSCE1 CE1 to Write End 10 — 12 — ns tSCE2 CE2 to Write End 10 — 12 — ns tAW Address Setup Time to Write End 10 — 12 — ns tHA Address Hold from Write End 0 — 0 — ns Address Setup Time 0 — 0 — ns tPWE WE Pulse Width 10 — 12 — ns tSD Data Setup to Write End 7 — 10 — ns tSA (3) tHD Data Hold from Write End 0 — 0 — ns (4) tHZWE WE LOW to High-Z Output — 7 — 7 ns (4) tLZWE WE HIGH to Low-Z Output 2 — 2 — ns Notes: 1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading specified in Figure 1. 2. The internal write time is defined by the overlap of CE1 LOW, CE2 HIGH and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the Write. 3. Tested with OE HIGH. 4. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 01/24/05 7 ISSI IS61C1024AL, IS64C1024AL ® AC WAVEFORMS WRITE CYCLE NO. 1 (CE1 Controlled, OE is HIGH or LOW) (1 ) t WC VALID ADDRESS ADDRESS t SCE1 t SCE2 t SA t HA CE1 CE2 t AW t PWE1 t PWE2 WE t HZWE DOUT t LZWE HIGH-Z DATA UNDEFINED t SD t HD DATAIN VALID DIN CE2_WR1.eps WRITE CYCLE NO. 2 (OE is HIGH During Write Cycle) (1,2) t WC ADDRESS VALID ADDRESS t HA OE CE1 LOW HIGH CE2 t AW t PWE1 WE t HZWE t SA DOUT DATA UNDEFINED t LZWE HIGH-Z t SD DIN t HD DATAIN VALID CE2_WR2.eps Notes: 1. The internal write time is defined by the overlap of CE1 LOW, CE2 HIGH and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the Write. 2. I/O will assume the High-Z state if OE = VIH. 8 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 01/24/05 ISSI IS61C1024AL, IS64C1024AL ® WRITE CYCLE NO. 3 (OE is LOW During Write Cycle) (1) t WC ADDRESS VALID ADDRESS OE LOW CE1 LOW t HA HIGH CE2 t AW t PWE2 WE t SA DOUT DATA UNDEFINED t HZWE t LZWE HIGH-Z t SD DIN t HD DATAIN VALID CE2_WR3.eps Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 01/24/05 9 ISSI IS61C1024AL, IS64C1024AL ® DATA RETENTION SWITCHING CHARACTERISTICS Symbol Parameter Test Condition Min. VDR VDD for Data Retention See Data Retention Waveform 2.0 IDR Data Retention Current VDD = 2.0V, CE1 ≥ VDD – 0.2V or CE2 ≤ 0.2V VIN ≥ VDD – 0.2V, or VIN ≤ VSS + 0.2V tSDR Data Retention Setup Time See Data Retention Waveform tRDR Recovery Time See Data Retention Waveform Com. Ind. Auto. Typ.(1) Max. Unit 5.5 V 400 450 500 µA 0 — ns tRC — ns — — — 200 — — Note: 1. Typical Values are measured at VDD = 5V, TA = 25oC and not 100% tested. DATA RETENTION WAVEFORM (CE1 CE1 Controlled) Data Retention Mode tSDR tRDR VDD 4.5V 2.2V VDR CE1 ≥ VDD - 0.2V CE1 GND DATA RETENTION WAVEFORM (CE2 Controlled) Data Retention Mode VDD 4.5V CE2 2.2V tSDR tRDR VDR 0.4V CE2 ≤ 0.2V GND 10 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 01/24/05 ISSI IS61C1024AL, IS64C1024AL ® ORDERING INFORMATION: IS61C1024AL Commercial Range: 0°C to +70°C Speed (ns) 12 Order Part No. Package IS61C1024AL-12J IS61C1024AL-12T 300-mil Plastic SOJ TSOP (Type I) ORDERING INFORMATION: IS61C1024AL Industrial Range: –40°C to +85°C Speed (ns) 12 Order Part No. Package IS61C1024AL-12JI IS61C1024AL-12JLI IS61C1024AL-12KI IS61C1024AL-12KLI IS61C1024AL-12HI IS61C1024AL-12TI IS61C1024AL-12TLI 300-mil Plastic SOJ 300-mil Plastic SOJ, Lead-free 400-mil Plastic SOJ 400-mil Plastic SOJ, Lead-free sTSOP (Type I) TSOP (Type I) TSOP (Type I), Lead-free ORDERING INFORMATION: IS64C1024AL Automotive Range: –40°C to +125°C Speed (ns) 15 Order Part No. Package IS64C1024AL-15KA3 IS64C1024AL-15TA3 400-mil Plastic SOJ TSOP (Type I) Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B 01/24/05 11 ISSI PACKAGING INFORMATION Plastic STSOP - 32 pins Package Code: H (Type I) A2 A A1 1 N E b e D1 S SEATING PLANE D L Plastic STSOP (H - Type I) Millimeters Inches Symbol Min Max Min Max Ref. Std. N 32 A — 1.25 — 0.049 A1 0.05 — 0.002 — A2 0.95 1.05 0.037 0.041 b 0.17 0.23 0.007 0.009 C 0.14 0.16 0.0055 0.0063 D 13.20 13.60 0.520 0.535 D1 11.70 11.90 0.461 0.469 E 7.90 8.10 0.311 0.319 e 0.50 BSC 0.020 BSC L 0.30 0.70 0.012 0.028 S 0.28 Typ. 0.011 Typ. α 0° 5° 0° 5° Integrated Silicon Solution, Inc. PK13197H32 Rev. B 04/21/03 α C Notes: 1. Controlling dimension: millimeters, unless otherwise specified. 2. BSC = Basic lead spacing between centers. 3. Dimensions D1 and E do not include mold flash protrusions and should be measured from the bottom of the package. 4. Formed leads shall be planar with respect to one another within 0.004 inches at the seating plane. ® ISSI PACKAGING INFORMATION ® 400-mil Plastic SOJ Package Code: K N Notes: 1. Controlling dimension: millimeters. 2. BSC = Basic lead spacing between centers. 3. Dimensions D and E1 do not include mold flash protrusions and should be measured from the bottom of the package. 4. Reference document: JEDEC MS-027. N/2+1 E1 1 E N/2 SEATING PLANE D b A C A2 e Symbol No. Leads A A1 A2 B b C D E E1 E2 e B Millimeters Inches Min Max Min Max (N) 28 3.25 3.75 0.128 0.148 0.64 — 0.025 — 2.08 — 0.082 — 0.38 0.51 0.015 0.020 0.66 0.81 0.026 0.032 0.18 0.33 0.007 0.013 18.29 18.54 0.720 0.730 11.05 11.30 0.435 0.445 10.03 10.29 0.395 0.405 9.40 BSC 0.370 BSC 1.27 BSC 0.050 BSC A1 E2 Millimeters Min Max Inches Min Max Millimeters Min Max 32 3.25 3.75 0.64 — 2.08 — 0.38 0.51 0.66 0.81 0.18 0.33 20.82 21.08 11.05 11.30 10.03 10.29 9.40 BSC 1.27 BSC 0.128 0.148 0.025 — 0.082 — 0.015 0.020 0.026 0.032 0.007 0.013 0.820 0.830 0.435 0.445 0.395 0.405 0.370 BSC 0.050 BSC 3.25 3.75 0.64 — 2.08 — 0.38 0.51 0.66 0.81 0.18 0.33 23.37 23.62 11.05 11.30 10.03 10.29 9.40 BSC 1.27 BSC Inches Min Max 36 0.128 0.148 0.025 — 0.082 — 0.015 0.020 0.026 0.032 0.007 0.013 0.920 0.930 0.435 0.445 0.395 0.405 0.370 BSC 0.050 BSC Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. F 10/29/03 ISSI PACKAGING INFORMATION Millimeters Inches Symbol Min Max Min Max No. Leads (N) 40 A 3.25 3.75 0.128 0.148 A1 0.64 — 0.025 — A2 2.08 — 0.082 — B 0.38 0.51 0.015 0.020 b 0.66 0.81 0.026 0.032 C 0.18 0.33 0.007 0.013 D 25.91 26.16 1.020 1.030 E 11.05 11.30 0.435 0.445 E1 10.03 10.29 0.395 0.405 E2 9.40 BSC 0.370 BSC e 1.27 BSC 0.050 BSC Millimeters Min Max Inches Min Max Millimeters Min Max 42 3.25 3.75 0.64 — 2.08 — 0.38 0.51 0.66 0.81 0.18 0.33 27.18 27.43 11.05 11.30 10.03 10.29 9.40 BSC 1.27 BSC 0.128 0.148 0.025 — 0.082 — 0.015 0.020 0.026 0.032 0.007 0.013 1.070 1.080 0.435 0.445 0.395 0.405 0.370 BSC 0.050 BSC 3.25 3.75 0.64 — 2.08 — 0.38 0.51 0.66 0.81 0.18 0.33 28.45 28.70 11.05 11.30 10.03 10.29 9.40 BSC 1.27 BSC ® Inches Min Max 44 0.128 0.148 0.025 — 0.082 — 0.015 0.020 0.026 0.032 0.007 0.013 1.120 1.130 0.435 0.445 0.395 0.405 0.370 BSC 0.050 BSC Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. 2 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. F 10/29/03 ISSI PACKAGING INFORMATION ® 300-mil Plastic SOJ Package Code: J N E1 E 1 SEATING PLANE D A B e A2 C b A1 E2 MILLIMETERS INCHES Sym. Min. Typ. Max. Min. Typ. Max. N0. Leads 24/26 A — — 3.56 — A1 0.64 — — 0.025 — — A2 2.41 — 2.67 0.095 — 0.105 b 0.41 — 0.51 0.016 — 0.020 B 0.66 — 0.81 0.026 — 0.032 — 0.140 C 0.20 — 0.25 0.008 — 0.010 D 17.02 — 17.27 0.670 — 0.680 E 8.26 — 8.76 0.325 — 0.345 E1 7.49 — 7.75 0.295 — 0.305 E2 6.27 — 7.29 0.247 — 0.287 e 1.27 BSC Notes: 1. Controlling dimension: inches, unless otherwise specified. 2. BSC = Basic lead spacing between centers. 3. Dimensions D and E1 do not include mold flash protrusions and should be measured from the bottom of the package. 4. Formed leads shall be planar with respect to one another within 0.004 inches at the seating plane. 0.050 BSC Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. D 02/25/03 ISSI PACKAGING INFORMATION ® 300-mil Plastic SOJ Package Code: J MILLIMETERS INCHES Sym. Min. Typ. Max. Min. Typ. Max. N0. Leads 28 MILLIMETERS INCHES Sym. Min. Typ. Max. Min. Typ. Max. N0. Leads 32 A — — 3.56 — — 0.140 A — — 3.56 — — 0.140 A1 0.64 — — 0.025 — — A1 0.64 — — 0.025 — — A2 2.41 — 2.67 0.095 — 0.105 A2 2.41 — 2.67 0.095 — 0.105 b 0.41 — 0.51 0.016 — 0.020 b 0.41 — 0.51 0.016 — 0.020 B 0.66 — 0.81 0.026 — 0.032 B 0.66 — 0.81 0.026 — 0.032 C 0.20 — 0.25 0.008 — 0.010 C 0.20 — 0.25 0.008 — 0.010 D 18.29 — 18.54 0.720 — 0.730 D 20.83 — 21.08 0.820 — 0.830 E 8.26 — 8.76 0.325 — 0.345 E 8.26 — 8.76 0.325 — 0.345 E1 7.49 — 7.75 0.295 — 0.305 E1 7.49 — 7.75 0.295 — 0.305 E2 6.27 — 7.29 0.247 — 0.287 E2 6.27 — 7.29 0.247 — 0.287 e 2 1.27 BSC 0.050 BSC e 1.27 BSC 0.050 BSC Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. D 02/25/03 ISSI PACKAGING INFORMATION ® Plastic TSOP-Type I Package Code: T (32-pin) 1 E H N D SEATING PLANE A S MILLIMETERS Symbol No. Leads A A1 B C D E H e L α S Min. L B e A1 INCHES Max. Min. Max. 32 — 1.20 0.05 0.25 0.17 0.23 0.12 0.17 7.90 8.10 18.30 18.50 19.80 20.20 0.50 BSC 0.40 0.60 0° 8° 0.25 REF — 0.047 0.002 0.010 0.007 0.009 0.005 0.007 0.311 0.319 0.720 0.728 0.780 0.795 0.020 BSC 0.016 0.024 0° 8° 0.010 REF α C Notes: 1. Controlling dimension: millimeters, unless otherwise specified. 2. BSC = Basic lead spacing between centers. 3. Dimensions D and E do not include mold flash protrusions and should be measured from the bottom of the package. 4. Formed leads shall be planar with respect to one another within 0.004 inches at the seating plane. Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. C 06/13/03