NSC CD40193

CD4002M/CD4002C Dual 4-Input NOR Gate
CD4012M/CD4012C Dual 4-Input NAND Gate
General Description
Features
These NOR and NAND gates are monolithic complementary MOS (CMOS) integrated circuits. The N- and P-channel
enhancement mode transistors provide a symmetrical circuit with output swings essentially equal to the supply voltage. This results in high noise immunity over a wide supply
voltage range. No DC power other than that caused by leakage current is consumed during static conditions. All inputs
are protected against static discharge and latching conditions.
Y
Y
Y
Wide supply voltage range
Low power
High noise immunity
3.0V to 15V
10 nW (typ.)
0.45 VDD (typ.)
Applications
Y
Y
Y
Y
Automotive
Data terminals
Instrumentation
Medical Electronics
Y
Y
Y
Y
Alarm system
Industrial controls
Remote metering
Computers
Connection Diagrams
CD4012
Dual-In-Line Package
CD4002
Dual-In-Line Package
TL/F/5940 – 1
Top View
TL/F/5940 – 2
Top View
Order Number CD4002 or CD4012
C1995 National Semiconductor Corporation
TL/F/5940
RRD-B30M105/Printed in U. S. A.
CD4002M/CD4002C Dual 4-Input NOR Gate
CD4012M/CD4012C Dual 4-Input NAND Gate
March 1988
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Voltage at Any Pin
Operating Temperature Range
CD4002M, CD4012M
CD4002C, CD4012C
Storage Temperature Range (TS)
Power Dissipation (PD)
Dual-In-Line
Small Outline
Operating Range (VDD)
VSS b0.3V to VDD a 0.3V
b 55§ C to a 125§ C
b 40§ C to a 85§ C
b 65§ C to a 150§ C
700 mW
500 mW
VSS a 3.0V to VSS a 15V
Lead Temperature (TL)
(Soldering, 10 seconds)
260§ C
DC Electrical Characteristics CD4002M, CD4012M
Limits
Symbol
Parameter
b 55§ C
Conditions
Min
Max
a 25§ C
Min
Typ
a 125§ C
Max
Min
Units
Max
IDD
Quiescent
Device Current
VDD e 5.0V
VDD e 10V
0.05
0.1
0.001 0.05
0.001 0.1
3.0
6
mA
mA
PD
Quiescent Device
VDD e 5.0V
Dissipation/Package VDD e 10V
0.25
1.0
0.005 0.25
0.01
1.0
15
60
mW
mW
VOL
Output Voltage
Low Level
0.05
0.05
0.05
0.05
V
V
VOH
Output Voltage
High Level
VDD e 5.0V, VI e VDD, IO e 0A
VDD e 10V, VI e VDD, IO e 0A
VDD e 5.0V, VI e VSS, IO e 0A
VDD e 10V, VI e VSS, IO e 0A
0
0
4.95
9.95
4.95
9.95
5.0
10
4.95
9.95
V
V
VNL
Noise Immunity
(All Inputs)
VDD e 5.0V, VO e 3.6V, IO e 0A
VDD e 10V, VO e 7.2V, IO e 0A
1.5
3.0
1.5
3.0
2.25
4.5
1.4
2.9
V
V
VNH
Noise Immunity
(All Inputs)
VDD e 5.0V, VO e 0.95V, IO e 0A
VDD e 10V, VO e 2.9V, IO e 0A
1.4
2.9
1.5
3.0
2.25
4.5
1.5
3.0
V
V
IDN
Output Drive Current
N-Channel (4002)
(Note 2)
VDD e 5.0V, VO e 0.4V, VI e VDD
VDD e 10V, VO e 0.5V, VI e VDD
0.5
1.1
0.40
0.9
1.0
2.5
0.28
0.65
mA
mA
IDP
Output Drive Current
P-Channel (4002)
(Note 2)
VDD e 5.0V, VO e 2.5V, VI e VSS
VDD e 10V, VO e 9.5V, VI e VSS
b 0.62
b 0.62
b 0.5
b 0.5
b 2.0
b 1.0
b 0.35
b 0.35
mA
mA
IDN
Output Drive Current
N-Channel (4012)
(Note 2)
VDD e 5.0V, VO e 0.4V, VI e VDD
VDD e 10V, VO e 0.5V, VI e VDD
0.31
0.63
0.25
0.5
0.5
0.6
0.175
0.35
mA
mA
IDP
Output Drive Current
P-Channel (4012)
(Note 2)
VDD e 5.0V, VO e 2.5V, VI e VSS
VDD e 10V, VO e 9.5V, VI e VSS
b 0.31
b 0.75
b 0.25
b 0.6
b 0.5
b 1.2
b 0.175
b 0.4
mA
mA
II
Input Current
10
0.05
0.05
pA
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
Note 2: IDN and IDP are tested one output at a time.
2
DC Electrical Characteristics CD4002C, CD4012C
Limits
Symbol
Parameter
b 55§ C
Conditions
Min
Max
a 25§ C
Min
a 85§ C
Typ
Max
Min
Units
Max
IDD
Quiescent
Device Current
VDD e 5.0V
VDD e 10V
0.5
5.0
0.005
0.005
0.5
5.0
15
30
mA
mA
PD
Quiescent Device
VDD e 5.0V
Dissipation/Package VDD e 10V
2.5
50
0.025
0.05
2.5
50
75
300
mW
mW
VOL
Output Voltage
Low Level
0.05
0.05
0
0
0.05
0.05
0.05
0.05
V
V
VOH
Output Voltage
High Level
VNL
Noise Immunity
(All Inputs)
VNH
Noise Immunity
(All Inputs)
IDN
VDD e 5.0V, VI e VDD, IO e 0A
VDD e 10V, VI e VDD, IO e 0A
VDD e 5.0V, VI e VSS, IO e 0A
VDD e 10V, VI e VSS, IO e 0A
4.95
9.95
4.95
9.95
5.0
10
4.95
9.95
V
V
VDD e 5.0V, VO t 3.6V, IO e 0A
VDD e 10V, VO t 7.2V, IO e 0A
VDD e 5.0V, VO s 0.95V, IO e 0A
VDD e 10V, VO s 2.9V, IO e 0A
1.5
3.0
1.5
3.0
2.25
4.5
1.4
2.9
V
V
1.4
2.9
1.5
3.0
2.25
4.5
1.5
3.0
V
V
Output Drive Current
N-Channel (4002)
(Note 2)
VDD e 5.0V, VO e 0.4V, VI e VDD
VDD e 10V, VO e 0.5V, VI e VDD
0.35
0.72
0.3
0.6
1.0
2.5
0.24
0.48
mA
mA
IDN
Output Drive Current
N-Channel (4012)
(Note 2)
VDD e 5.0V, VO e 0.4V, VI e VDD
VDD e 10V, VO e 0.5V, VI e VDD
0.145
0.3
0.12
0.25
0.5
0.6
0.095
0.2
mA
mA
IDP
Output Drive Current
P-Channel (4002)
(Note 2)
VDD e 5.0V, VO e 2.5V, VI e VSS
VDD e 10V, VO e 9.5V, VI e VSS
b 0.35
b 0.3
b 0.3
b 0.25
b 2.0
b 1.0
b 0.24
b 0.2
mA
mA
IDP
Output Drive Current
P-Channel (4012)
(Note 2)
VDD e 5.0V, VO e 2.5V, VI e VSS
VDD e 10V, VO e 9.5V, VI e VSS
b 0.145
b 0.35
b 0.12
b 0.3
b 0.5
b 1.2
b 0.095
b 0.24
mA
mA
II
Input Current
10
pA
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
Note 2: IDN and IDP are tested one output at a time.
3
AC Electrical Characteristics* TA e 25§ C, CL e 15 pF, and input rise and fall times e 20 ns. Typical
temperature coefficient for all values of VDD e 0.3%/§ C.
Symbol
Parameter
Conditions
tPHL
Propagation Delay Time
High to Low Level
tPLH
Min
Typ
Max
Units
VDD e 5.0V
VDD e 10V
35
25
50
40
ns
ns
Propagation Delay Time
Low to High Level
VDD e 5.0V
VDD e 10V
35
25
50
40
ns
ns
tTHL
Transition Time High
to Low Level
VDD e 5.0V
VDD e 10V
65
35
175
75
ns
ns
tTLH
Transition Time Low
to High Level
VDD e 5.0V
VDD e 10V
65
35
125
70
ns
ns
CIN
Input Capacitance
Any Input
5.0
tPHL
Propagation Delay Time
High to Low Level
VDD e 5.0V
VDD e 10V
35
25
120
65
ns
ns
TPLH
Propagation Delay Time
Low to High Level
VDD e 5.0V
VDD e 10V
35
25
80
55
ns
ns
tTHL
Transition Time High
to Low Level
VDD e 5.0V
VDD e 10V
65
35
300
125
ns
ns
tTLH
Transition Time Low
to High Level
VDD e 5.0V
VDD e 10V
65
35
200
115
ns
ns
CIN
Input Capacitance
Any Input
5.0
CD4002M
pF
CD4002C
pF
*AC Parameters are guaranteed by DC correlated testing.
AC Electrical Characteristics* TA e 25§ C, CL e 15 pF, and input rise and fall times e 20 ns. Typical
temperature coefficient for all values of VDD e 0.3%/§ C.
Symbol
Parameter
Conditions
tPHL
Propagation Delay Time
High to Low Level
tPLH
Min
Typ
Max
Units
VDD e 5.0V
VDD e 10V
50
25
75
40
ns
ns
Propagation Delay Time
Low to High Level
VDD e 5.0V
VDD e 10V
50
25
75
40
ns
ns
tTHL
Transition Time High
to Low Level
VDD e 5.0V
VDD e 10V
75
50
125
75
ns
ns
tTLH
Transition Time Low
to High Level
VDD e 5.0V
VDD e 10V
75
40
100
60
ns
ns
CIN
Input Capacitance
Any Input
5.0
tPHL
Propagation Delay Time
High to Low Level
VDD e 5.0V
VDD e 10V
50
25
100
50
ns
ns
TPLH
Propagation Delay Time
Low to High Level
VDD e 5.0V
VDD e 10V
50
25
100
50
ns
ns
tTHL
Transition Time High
to Low Level
VDD e 5.0V
VDD e 10V
75
50
150
100
ns
ns
tTLH
Transition Time Low
to High Level
VDD e 5.0V
VDD e 10V
75
40
125
75
ns
ns
CIN
Input Capacitance
Any Input
5.0
CD4012M
pF
CD4012C
pF
*AC Parameters are guaranteed by DC correlated testing.
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature
Range’’ they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual
device operation.
4
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number CD4002MJ, CD4002CJ, CD4012MJ or CD4012CJ
NS Package Number J14A
5
CD4002M/CD4002C Dual 4-Input NOR Gate
CD4012M/CD4012C Dual 4-Input NAND Gate
Physical Dimensions inches (millimeters) (Continued)
Molded Dual-In-Line Package (N)
Order Number CD4002MN, CD4002CN, CD4012MN or CD4012CN
NS Package Number N14A
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and whose
failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
National Semiconductor
Corporation
1111 West Bardin Road
Arlington, TX 76017
Tel: 1(800) 272-9959
Fax: 1(800) 737-7018
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
National Semiconductor
Europe
Fax: (a49) 0-180-530 85 86
Email: cnjwge @ tevm2.nsc.com
Deutsch Tel: (a49) 0-180-530 85 85
English Tel: (a49) 0-180-532 78 32
Fran3ais Tel: (a49) 0-180-532 93 58
Italiano Tel: (a49) 0-180-534 16 80
National Semiconductor
Hong Kong Ltd.
13th Floor, Straight Block,
Ocean Centre, 5 Canton Rd.
Tsimshatsui, Kowloon
Hong Kong
Tel: (852) 2737-1600
Fax: (852) 2736-9960
National Semiconductor
Japan Ltd.
Tel: 81-043-299-2309
Fax: 81-043-299-2408
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.