LMV710, LMV711 and LMV715 Low Power, RRIO Operational Amplifiers with High Output Current Drive and Shutdown Option General Description Features The LMV710, LMV711 and LMV715 are BiCMOS operational amplifiers with a CMOS input stage. These devices have greater than RR input common mode voltage range, rail-to-rail output and high output current drive. They offer a bandwidth of 5MHz and a slew rate of 5V/µs. On the LMV711/LMV715, a separate shutdown pin can be used to disable the device and reduces the supply current to 0.2µA (typical). They also feature a turn on time of less than 10µs. It is an ideal solution for power sensitive applications, such as cellular phone, pager, palm computer, etc. In addition, once the LMV715 is in shutdown the output will be “Tri-stated”. The LMV710 is offered in the space saving SOT23-5 Tiny package. The LMV711 and LMV715 are offered in the space saving SOT23-6 Tiny package. The LMV710/711/715 are designed to meet the demands of low power, low cost, and small size required by cellular phones and similar battery powered portable electronics. (For 5 Supply, Typical Unless Otherwise Noted). n Low offset voltage 3mV, max n Gain-bandwidth product 5MHz, typ n Slew rate 5V/µs, typ n Space saving packages SOT23-5 and SOT23-6 < 10µs n Turn on time from shutdown n Industrial temperature range −40˚C to +85˚C n Supply current in shutdown mode 0.2µA, typ n Guaranteed 2.7V and 5V Performance n Unity gain stable n Rail-to-rail input and output n Capable of driving 600Ω load Applications n n n n n n n Wireless phones GSM/TDMA/CDMA power amp control AGC, RF power detector Temperature compensation Wireless LAN Bluetooth HomeRF Typical Application High Side Current Sensing 10132513 © 2003 National Semiconductor Corporation DS101325 www.national.com LMV710, LMV711 and LMV715 Low Power, RRIO Operational Amplifiers with High Output Current Drive and Shutdown Option January 2003 LMV710, LMV711 and LMV715 Absolute Maximum Ratings Mounting Temp. (Note 1) Infrared or Convection (20 sec) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Storage Temperature Range Junction Temperature(TJMAX) (Note 5) ESD Tolerance (Note 2) Machine Model 235˚C −65˚C to 150˚C 150˚C 100V Human Body Model 2000V Operating Ratings (Note 1) ± Supply Voltage Differential Input Voltage Voltage at Input/Output Pin Supply Voltage (V+) + 0.4V (V−) − 0.4V 2.7V to 5.0V −40˚C ≤ TJ ≤ 85˚C Temperature Range Thermal Resistance (θJA) Supply Voltage (V+ - V −) 5.5V Output Short Circuit to V+ (Note 3) MF05A Package, 5-Pin SOT23-5 265 ˚C/W (Note 4) MF06A package, 6-Pin SOT23-6 265 ˚C/W Output Short Circuit to V − ± 10mA Current at Input Pin 2.7V Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25˚C. V+ = 2.7V, V limits apply at the temperature extremes. Symbol Parameter − = 0V, VCM = 1.35V and RL > 1MΩ. Boldface Condition Typ (Note 6) Limits (Note 7) Units VCM = 0.85V & VCM = 1.85V 0.4 3 3.2 mV max VOS Input Offset Voltage IB Input Bias Current CMRR Common Mode Rejection Ratio 0 ≤ VCM ≤ 2.7V 75 50 45 dB min PSRR Power Supply Rejection Ratio 2.7V ≤ V+ ≤ 5V, VCM = 0.85V 110 70 68 dB min 2.7V ≤ V+ ≤ 5V, VCM = 1.85V 95 70 68 dB min -0.3 -0.2 3 2.9 Sourcing VO =0V 28 15 12 mA min Sinking VO = 2.7V 40 25 22 mA min 2.68 2.62 2.60 V min 0.01 0.12 0.15 V max 2.55 2.52 2.50 V min 0.05 0.23 0.30 V max 200 mV VCM ISC VO Input Common-Mode Voltage Range Output Short Circuit Current Output Swing 4 For CMRR ≥ 50dB RL = 10kΩ to 1.35V RL = 600Ω to 1.35V pA V VO (SD) Output Voltage Level in Shutdown Mode (LMV711 only) 50 IO (SD) Output Leakage Current in Shutdown Mode (LMV715 Only) 1 pA CO (SD) Output Capacitance in Shutdown Mode (LMV715 Only) 32 pF IS Supply Current www.national.com ON Mode 1.22 1.7 1.9 mA max Shutdown Mode, VSD = 0V 0.002 10 µA 2 (Continued) Unless otherwise specified, all limits guaranteed for TJ = 25˚C. V+ = 2.7V, V limits apply at the temperature extremes. Symbol AV Parameter Large Signal Voltage SR Slew Rate GBWP Gain-Bandwidth Product φm Phase Margin TON Turn-on Time from Shutdown VSD Shutdown Pin Voltage Range − = 0V, VCM = 1.35V and RL > 1MΩ. Boldface Condition Typ (Note 6) Limits (Note 7) Units Sourcing RL = 10kΩ VO = 1.35V to 2.3V 115 80 76 dB min Sinking RL = 10kΩ VO = 0.4V to 1.35V 113 80 76 dB min Sourcing RL = 600Ω VO = 1.35V to 2.2V 110 80 76 dB min Sinking RL = 600Ω VO = 0.5V to 1.35V 100 80 76 dB min (Note 8) On Mode Shutdown Mode en Input-Referred Voltage Noise f = 1kHz 5 V/µs 5 MHz 60 Deg < 10 µs 1.5 to 2.7 2.4 to 2.7 V 0 to 1 0 to 0.8 V 20 3.2V Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25˚C. V+ = 3.2V, V− = 0V, VCM = 1.6V. Boldface limits apply at the temperature extremes. Symbol VO Parameter Output Swing Conditions IO = 6.5mA Typ (Note 6) Limit (Note 7) Units 3.0 2.95 2.92 V min 0.01 0.18 0.25 V max 5V Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25˚C. V+ = 5V, V apply at the temperature extremes. Symbol Parameter − = 0V, VCM = 2.5V, and RL > 1MΩ. Boldface limits Condition Typ (Note 6) Limits (Note 7) Units VCM = 0.85V & VCM = 1.85V 0.4 3 3.2 mV max VOS Input Offset Voltage IB Input Bias Current CMRR Common Mode Rejection Ratio 0V ≤ VCM ≤ 5V 70 50 48 dB min PSRR Power Supply Rejection Ratio 2.7V ≤ V+ ≤ 5V, VCM = 0.85V 110 70 68 dB min 2.7V ≤ V+ ≤ 5V, VCM = 1.85V 95 70 68 dB min -0.3 −0.2 5.3 5.2 VCM Input Common-Mode Voltage Range 4 For CMRR ≥ 50dB 3 pA V www.national.com LMV710, LMV711 and LMV715 2.7V Electrical Characteristics LMV710, LMV711 and LMV715 5V Electrical Characteristics (Continued) Unless otherwise specified, all limits guaranteed for TJ = 25˚C. V+ = 5V, V apply at the temperature extremes. Symbol ISC VO Parameter Output Short Circuit Current Output Swing − = 0V, VCM = 2.5V, and RL > 1MΩ. Boldface limits Condition Typ (Note 6) Limits (Note 7) Units Sourcing VO = 0V 35 25 21 mA min Sinking VO = 5V 40 25 21 mA min 4.98 4.92 4.90 V min 0.01 0.12 0.15 V max 4.85 4.82 4.80 V min 0.05 0.23 0.3 V max 200 mV RL = 10kΩ to 2.5V RL = 600Ω to 2.5V VO (SD) Output Voltage Level in Shutdown Mode (LMV711 only) 50 IO (SD) Output Leakage Current in Shutdown Mode (LMV715 Only) 1 pA CO (SD) Output Capacitance in shutdown Mode (LMV715 Only) 32 pF IS Supply Current AV Large Signal Voltage Gain SR Slew Rate GBWP Gain-Bandwidth Product φm Phase Margin TON Turn-on Time from Shutdown VSD Shutdown Pin Voltage Range On Mode 1.17 1.7 1.9 mA max Shutdown Mode 0.2 10 µA Sourcing RL = 10kΩ VO = 2.5V to 4.6V 123 80 76 dB min Sinking RL = 10kΩ VO = 0.4V to 2.5V 120 80 76 dB min Sourcing RL = 600Ω VO = 2.5V to 4.5V 110 80 76 dB min Sinking RL = 600Ω VO = 0.5V to 2.5V 118 80 76 dB min (Note 8) Input-Referred Voltage Noise V/µs MHz 60 Deg < 10 ON Mode Shutdown Mode en 5 5 f = 1kHz µs 2 to 5 2.4 to 5 0 to 1.5 0 to 0.8 V 20 Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. Note 2: Human body model, 1.5 kΩ in series with 100pF. Machine model, 0Ω in series with 100pF. Note 3: Shorting circuit output to V+ will adversely affect reliability. Note 4: Shorting circuit output to V− will adversely affect reliability. Note 5: The maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(max) - T A)/θJA. All numbers apply for packages soldered directly into a PC board. Note 6: Typical values represent the most likely parametric norm. Note 7: All limits are guaranteed by testing or statistical analysis. Note 8: Number specified is the slower of the positive and negative slew rates. www.national.com 4 Unless otherwise specified, VS = +5V, single supply, LMV711 and LMV715 Supply Current vs. Supply Voltage (Shutdown Mode) Supply Current vs. Supply Voltage (On Mode) 10132527 10132528 Output Positive Swing vs. Supply Voltage Output Negative Swing vs. Supply Voltage 10132529 10132530 Output Positive Swing vs. Supply Voltage Output Negative Swing vs. Supply Voltage 10132531 10132532 5 www.national.com LMV710, LMV711 and LMV715 Typical Performance Characteristics TA = 25˚C. LMV710, LMV711 and LMV715 Typical Performance Characteristics Unless otherwise specified, VS = +5V, single supply, TA = 25˚C. (Continued) Output Positive Swing vs. Supply Voltage Output Negative Swing vs. Supply Voltage 10132533 10132534 Input Voltage Noise vs. Frequency PSRR vs. Frequency 10132535 10132536 CMRR vs. Frequency LMV711/LMV715 Turn On Characteristics 10132538 10132537 www.national.com 6 LMV710, LMV711 and LMV715 Typical Performance Characteristics Unless otherwise specified, VS = +5V, single supply, TA = 25˚C. (Continued) Sourcing Current vs. Output Voltage Sinking Current vs. Output Voltage 10132539 10132540 THD+N vs. Frequency (VS = 5V) THD+N vs. Frequency (VS = 2.7V) 10132541 10132542 THD+N vs. VOUT THD+N vs. VOUT 10132543 10132544 7 www.national.com LMV710, LMV711 and LMV715 Typical Performance Characteristics Unless otherwise specified, VS = +5V, single supply, TA = 25˚C. (Continued) CCM vs. VCM CCM vs. VCM 10132545 10132546 CDIFF vs. VCM (VS = 2.7V) CDIFF vs. VCM (VS = 5V) 10132547 10132548 Open Loop Frequency Response Open Loop Frequency Response 10132512 www.national.com 10132510 8 LMV710, LMV711 and LMV715 Typical Performance Characteristics Unless otherwise specified, VS = +5V, single supply, TA = 25˚C. (Continued) Open Loop Frequency Response Open Loop Frequency Response 10132511 10132507 Open Loop Frequency Response Open Loop Frequency Response 10132509 10132508 Non-Inverting Large Signal Pulse Response Non-Inverting Small Signal Pulse Response 10132503 10132502 9 www.national.com LMV710, LMV711 and LMV715 Typical Performance Characteristics Unless otherwise specified, VS = +5V, single supply, TA = 25˚C. (Continued) Inverting Large Signal Pulse Response Inverting Small Signal Pulse Response 10132504 10132505 VOS vs. VCM VOS vs. VCM 10132549 www.national.com 10132550 10 1.0 SUPPLY BYPASSING The application circuits in this datasheet do not show the power supply connections and the associated bypass capacitors for simplification. When the circuits are built, it is always required to have bypass capacitors. Ceramic disc capacitors (0.1µF) or solid tantalum (1µF) with short leads, and located close to the IC are usually necessary to prevent interstage coupling through the power supply internal impedance. Inadequate bypassing will manifest itself by a low frequency oscillation or by high frequency instabilities. Sometimes, a 10µF (or larger) capacitor is used to absorb low frequency variations and a smaller 0.1µF disc is paralleled across it to prevent any high frequency feedback through the power supply lines. 10132552 FIGURE 1. When the input is a small signal and this small signal falls inside the VOS transition range, the gain, CMRR and some other parameters will be degraded. To resolve this problem, the small signal should be placed such that it avoids the VOS crossover point. To achieve maximum output swing, the output should be biased at mid-supply. This is normally done by biasing the input at mid-supply. But with supply voltage range from 2V to 3.4V, the input of the op amp should not be biased at mid-supply because of the transition of the VOS. Figure 2 shows an example of how to get away from the VOS crossover point and maintain a maximum swing with a 2.7V supply. Figure 3 shows the waveforms of VIN and VOUT. 2.0 SHUTDOWN MODE The LMV711 and LMV715 have a shutdown pin. To conserve battery life in portable applications, they can be disabled when the shutdown pin voltage is pulled low. For LMV711 during shutdown mode, the output stays at about 50mV from the lower rail, and the current drawn from the power supply is 0.2µA (typical). This makes the LMV711 an ideal solution for power sensitive applications. For the LMV715 during shutdown mode, the output will be “Tri-stated”. The shutdown pin should never be left unconnected. In applications where shutdown operation is not needed and the LMV711 or LMV715 is used, the shutdown pin should be connected to V+. Leaving the shutdown pin floating will result in an undefined operation mode and the device may oscillate between shutdown and active modes. 3.0 RAIL-TO-RAIL INPUT The rail-to-rail input is achieved by using paralleled PMOS and NMOS differential input stages. (See Simplified Schematics in this datasheet). When the common mode input voltage changes from ground to the positive rail, the input stage goes through three modes. First, the NMOS pair is cutoff and the PMOS pair is active. At around 1.4V, both PMOS and NMOS pairs operate, and finally the PMOS pair is cutoff and NMOS pair is active. Since both input stages have their own offset voltage (VOS), the offset of the amplifier becomes a function of the common-mode input voltage. See curves for VOS vs. VCM in curve section. As shown in the curve, the VOS has a crossover point at 1.4V above V−. Proper design must be done in both DC and AC coupled applications to avoid problems. For large input signals that include the VOS crossover point in their dynamic range, it will cause distortion in the output signal. One way to avoid such distortion is to keep the signal away from the crossover point. For example, in a unity gain buffer configuration and with VS = 5V, a 3V peak-to-peak signal center at 2.5V will contain input-crossover distortion. To avoid this, the input signal should be centered at 3.5V instead. Another way to avoid large signal distortion is to use a gain of −1 circuit which avoids any voltage excursions at the input terminals of the amplifier. See Figure 1. In this circuit, the common mode DC voltage (VCM) can be set at a level away from the VOS crossover point. 10132517 FIGURE 2. 10132551 FIGURE 3. The inputs can be driven 300mV beyond the supply rails without causing phase reversal at the output. However, the inputs should not be allowed to exceed the maximum ratings. 11 www.national.com LMV710, LMV711 and LMV715 Application Note LMV710, LMV711 and LMV715 Application Note (Continued) 4.0 COMPENSATION OF INPUT CAPACITANCE In the application (Figure 4) where a large feedback resistor is used, the feedback resistor can react with the input capacitance of the op amp and introduce an additional pole to the close loop frequency response. 10132521 FIGURE 5. Indirectly Driving A Capacitive Load using Resistive Isolation In Figure 5, the isolation resistor RISO and the load capacitor CL form a pole to increase stability by adding more phase margin to the overall system. The desired performance depends on the value of RISO. The bigger the RISO resistor value, the more stable VOUT will be. But the DC accuracy is not great when the RISO gets bigger. If there were a load resistor in Figure 5, the output would be voltage divided by RISO and the load resistor. 10132518 The circuit in Figure 6 is an improvement to the one in Figure 5 because it provides DC accuracy as well as AC stability. In this circuit, RF provides the DC accuracy by using feedforward techniques to connect VIN to RL. CF and RISO serve to counteract the loss of phase margin by feeding the high frequency component of the output signal back to the amplifier’s inverting input, thereby preserving phase margin in the overall feedback loop. Increased capacitive drive is possible by increasing the value of CF . This in turn will slow down the pulse response. FIGURE 4. Cancelling the Effect of Input Capacitance This pole occurs at frequency fp , where Any stray capacitance due to external circuit board layout, any source capacitance from transducer or photodiode connected to the summing node will also be added to the input capacitance. If fp is less than or close to the unity-gain bandwidth (5MHz) of the op amp, the phase margin of the loop is reduced and can cause the system to be unstable. To avoid this problem, make sure that fp occurs at least 2 octaves beyond the expected −3dB frequency corner of the close loop frequency response. If not, a feedback capacitor CF can be placed in parallel with RF such that 10132522 The paralleled RF and CF introduce a zero, which cancels the effect from the pole. FIGURE 6. Indirectly Driving A Capacitive A Load with DC Accuracy 5.0 CAPACITIVE LOAD TOLERANCE The LMV710, LMV711 and LMV715 can directly drive 200pF in unity-gain without oscillation. The unity-gain follower is the most sensitive configuration to capacitive loading. Direct capacitive loading reduces the phase margin of amplifiers. The combination of the amplifier’s output impedance and the capacitive load induces phase lag. This results in either an underdamped pulse response or oscillation. To drive a heavier capacitive load, circuit in Figure 5 can be used. www.national.com 6.0 APPLICATION CIRCUITS PEAK DETECTOR Peak detectors are used in many applications, such as test equipment, measurement instrumentation, ultrasonic alarm systems, etc. Figure 7 shows the schematic diagram of a peak detector using LMV710 or LMV711 or LMV715. This peak detector basically consists of a clipper, a parallel RC network, and a voltage follower. 12 The peak detector can be reset by applying a positive pulse to the reset transistor. The charge on the capacitor is dumped into ground, and the detector is ready for another cycle. (Continued) The maximum input voltage to this detector should be less than (V+ - VD), where VD is the forward voltage drop of the diode. Otherwise, the input voltage should be scaled down before applying to the circuit. HIGH SIDE CURRENT SENSING The high side current sensing circuit (Figure 8) is commonly used in a battery charger to monitor charging current to prevent over-charging. A sense resistor Rsense is connected to the battery directly. This system requires an op amp with rail-to-rail input. The LMV710/711/715 are ideal for this application because its common mode input range can go beyond the positive rail. 10132523 FIGURE 7. Peak Detector The capacitor C1 is first discharged by applying a positive pulse to the reset transistor. When a positive voltage VIN is applied to the input, the input voltage is higher than the voltage across C1. The output of the op amp goes high and forward biases the diode D1. The capacitor C1 is charged to VIN. When the input becomes less than the current capacitor voltage, the output of the op amp A1 goes low and the diode D1 is reverse biased. This isolates the C1 and leaves it with the charge equivalent to the peak of the input voltage. The follower prevents unintentional discharging of C1 by loading from the following circuit. R5 and C1 are properly selected so that the capacitor is charged rapidly to VIN. During the holding period, the capacitor slowly discharge through C1, via leakage of the capacitor and the reverse-biased diode, or op amp bias currents. In any cases the discharging time constant is much larger than the charge time constant. And the capacitor can hold its voltage long enough to minimize the output ripple. Resistors R2 and R3 limit the current into the inverting input of A1 and the non-inverting input of A2 when power is disconnected from the circuit. The discharging current from C1 during power off may damage the input circuitry of the op amps. 10132513 FIGURE 8. High Side Current Sensing 13 www.national.com LMV710, LMV711 and LMV715 Application Note LMV710, LMV711 and LMV715 Application Note (Continued) 10132506 FIGURE 9. Typical of GSM P.A. Control Loop GSM POWER AMPLIFIER CONTROL LOOP There are four critical sections in the GSM Power Amplifier Control Loop. The class-C RF power amplifier provides amplification of the RF signal. A directional coupler couples small amount of RF energy from the output of the RF P. A. to an envelope detector diode. The detector diode senses the signal level and rectifies it to a DC level to indicate the signal strength at the antenna. An op-amp is used as an error amplifier to process the diode voltage and ramping voltage. This loop control the power amplifier gain via the op-amp and forces the detector diode voltage and ramping voltage to be equal. Power control is accomplished by changing the ramping voltage. www.national.com The LMV710, LMV711 and LMV715 are well suited as an error amplifier in this application. The LMV711 and LMV715 have an extra shutdown pin to switch the op-amp to shutdown mode. In shutdown mode, the LMV711 and LMV715 consume very low current. The LMV711 provides a ground voltage to the power amplifier control pin VPC. Therefore, the power amplifier can be turned off to save battery life. The LMV715 output will be “tri-stated” when in shutdown. 14 LMV710, LMV711 and LMV715 Simplified Schematic LMV711 10132516 Connection Diagrams 6-Pin SOT23-6 LMV711 and LMV715 5-Pin SOT23-5 LMV710 10132514 10132515 Top View Top View Ordering Information Package 5-Pin SOT23-5 Temperature Range Industrial −40˚C to +85˚C Packaging Marking Transport Media NSC Drawing LMV710M5 A48A 1k Units Tape and Reel MF05A LMV710M5X 6-Pin SOT23-6 LMV711M6 3k Units Tape and Reel A47A LMV711M6X LMV715MF 1k Units Tape and Reel MF06A 3k Units Tape and Reel A75A LMV715MFX 1k Units Tape and Reel 3k Units Tape and Reel 15 www.national.com LMV710, LMV711 and LMV715 SOT-23 Tape and Reel Specification Tape Format Tape Section # Cavities Cavity Status Cover Tape Status Leader (Start End) 0 (min) Empty Sealed 75 (min) Empty Sealed Carrier 3000 Filled Sealed 1000 Filled Sealed 125 (min) Empty Sealed 0 (min) Empty Sealed Trailer (Hub End) Tape Dimensions 10132555 TAPE SIZE DIM A DIM Ao DIM B DIM Bo DIM F DIM Ko DIM P1 DIM T DIM W 8 mm .130 (3.3) .124 (3.15) .130 (3.3) .126 (3.2) .138 ± .002 (3.5 ± 0.05) .055 ± .004 (1.4 ± 0.1) .157 (4) .008 ± .004 (0.2 ± 0.1) .315 ± .012 (8 ± 0.3) Note: UNLESS OTHERWISE SPECIFIED 3. SMALLEST ALLOWABLE TAPE BENDING RADIUS: 1.181 IN/ 30mm. 1. CUMULATIVE PITCH TOLERANCE FOR FEEDING HOLES AND CAVITIES (CHIP POCKETS) NOT TO EXCEED .008 IN / 0.2mm OVER 10 PITCH SPAN. 4. DIMENSIONS WITH ∆ ARE CRITICAL. DIMENSIONS TO BE ABSOLUTELY INSPECTED. 2. THRU HOLE INSIDE CAVITY IS CENTERED WITHIN CAVITY. www.national.com 16 LMV710, LMV711 and LMV715 Reel Dimensions 10132554 TAPE SIZE DIM A DIM B DIM C DIM D DIM N DIM W1 DIM W2 DIM W3 (LSL-USL) 8 mm 7.00 (177.8) .059 (1.5) .512 + .020/−.008 (13 +0.5/−0.2) .795 (20.2) 2.165 (55) .331 + .059/−.000 (8.4 + 1.5/0) .567 (14.4) .311 - .429 (7.9 - 10.9) Note: UNLESS OTHERWISE SPECIFIED 10. ALL GATING FROM THE MOLD MUST BE PROPERLY REMOVED. 1. MATERIAL: 11. NO FLASHES ARE TO BE PRESENT ALONG THE PARTING LINES. POLYSTYRENE/PVC (WITH ANTISTATIC COATING). OR POLYSTYRENE/PVC, ANTISTATIC 12. ALLOWABLE RADIUS FOR CORNERS AND EDGES IS .012 INCHES/0.3 MILLIMETERS MINIMUM. OR POLYSTYRENE/PVC, CONDUCTIVE. 2. CONTROLLING DIMENSION IS MILLIMETER, DIMENSIONS IN INCHES ROUNDED. 13. SINK MARKS THAT WILL CAUSE A CHANGE TO THE SPECIFIED DIMENSIONS OR SHAPE OF THE REELS ARE NOT ALLOWED. 3. SURFACE RESISTIVITY: 1010 OHM/SQ MAXIMUM. 4. ALL OUTPUT REELS SHALL BE UNIFORM IN SHADE. 14. MOLDED REELS SHALL BE FREE OF COSMETIC DEFECTS SUCH AS VOIDS. FLASHING, EXCESSIVE FLOW MARKS, ETC. 5. PACKING OF REELS IN CONTAINERS MUST ENSURE NO DAMAGE TO THE REEL. 15. THERE MUST BE NO MISMATCH BETWEEN MATING PARTS. 6. SURFACE FINISH OF THE FLANGES SHALL BE SMOOTH, MATTE FINISH PREFERRED. 16. MOLDED REELS SHALL BE ANTISTATIC COATED OR BLENDED. 7. ALL EDGES, ESPECIALLY THE TAPE ENTRY EDGES, MUST BE FREE OF BURRS. 17. THE SOT23-5L AND SOT23-6L PACKAGE USE THE 7-INCH REEL. 8. THE REEL SHOULD NOT WARP IN THE STORAGE TEMPERATURE OF 67˚C MAXIMUM. 9. GLASS TRANSITION TEMPERATURE (Tg) OF THE PLASTIC REEL SHALL BE LOWER THAN −20˚C. 17 www.national.com LMV710, LMV711 and LMV715 Physical Dimensions inches (millimeters) unless otherwise noted SOT23-5 NS Package Number MF05A SOT23-6 NS Package Number MF06A www.national.com 18 LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Americas Customer Support Center Email: [email protected] Tel: 1-800-272-9959 www.national.com National Semiconductor Europe Customer Support Center Fax: +49 (0) 180-530 85 86 Email: [email protected] Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Asia Pacific Customer Support Center Fax: 65-6250 4466 Email: [email protected] Tel: 65-6254 4466 National Semiconductor Japan Customer Support Center Fax: 81-3-5639-7507 Email: [email protected] Tel: 81-3-5639-7560 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. LMV710, LMV711 and LMV715 Low Power, RRIO Operational Amplifiers with High Output Current Drive and Shutdown Option Notes