LMX2531LQ1742 Evaluation Board Operating Instructions National Semiconductor Corporation Wireless Communications, RF Products Group 2900 Semiconductor Dr. MS A2-600 Santa Clara, CA, 95052-8090 LMX2531LQ1742FPEB Rev 3.10.2006 L M X 2 5 3 1 L Q 1 7 4 2 E V A L U A T I O N B O A R D O P E R A T I N G I N S T R U C T I O N S TABLE OF CONTENTS GENERAL DESCRIPTION .................................................................................................................. 3 LOOP FILTER .................................................................................................................................. 3 PHASE NOISE ................................................................................................................................. 4 PHASE NOISE WITH NARROW LOOP FILTER (INTERNAL DIVIDE BY 2 DISABLED) .................................. 5 PHASE NOISE WITH NARROW LOOP FILTER (INTERNAL DIVIDE BY 2 ENABLED) ................................... 6 SPURS (INTERNAL DIVIDE BY 2 DISABLED)........................................................................................ 7 SPURS (INTERNAL DIVIDE BY 2 ENABLED) ........................................................................................ 8 CODELOADER SETTINGS ................................................................................................................. 9 SCHEMATIC .................................................................................................................................. 11 TOP LAYER ................................................................................................................................... 13 MID LAYER 2 "POWER".................................................................................................................. 15 BOTTOM LAYER "SIGNAL" .............................................................................................................. 16 TOP BUILD DIAGRAM ..................................................................................................................... 17 2 L M X 2 5 3 1 L Q 1 7 4 2 E V A L U A T I O N B O A R D O P E R A T I N G I N S T R U C T I O N S General Description The LMX2531LQ1742 Evaluation Board simplifies evaluation of the LMX2531LQ1742 PLL/VCO synthesizer system. The board enables all performance measurements with no additional support circuitry. The evaluation board consists of a LMX2531LQ1742 device, and a cable assembly. The cable assembly is bundled with the evaluation board for connecting to a PC through the parallel printer port. By means of MICROWIRETM serial port emulation, the CodeLoader software included can be run on a PC to facilitate the LMX2531LQ1742 internal register programming for the evaluation and measurement. In addition to this cable assembly, there is a microwire buffer board that ensures that the proper voltage levels are provided to the microwire inputs and also this reduces digital noise from computers through the parallel port. Loop Filter Phase Margin 42.4 deg Kφ 90 uA Loop Bandwidth 4.3 kHz Fcomp 2.5 MHz TCXO Frequency 10 MHz Output Frequency 1760 – 1866 MHz (DIV2=0) 880 – 933 MHz (DIV2=1) Supply Voltage 3.0 Volts VCO Gain 5.5 MHz/Volt CPout 40 KΩ 40 KΩ VCO 2.7 nF 100 pF 47 KΩ 47 pF Vtune 3 100 pF Output Frequency = 1813 MHz Internal Divide by 2 Disabled (DIV2=0) Output Frequency = 906.5 MHz Internal Divide by 2 Enabled (DIV2=1) L M X 2 5 3 1 L Q 1 7 4 2 E V A L U A T I O N 4 B O A R D Phase Noise O P E R A T I N G I N S T R U C T I O N S L M X 2 5 3 1 L Q 1 7 4 2 E V A L U A T I O N B O A R D O P E R A T I N G I N S T R U C T I O N S Fout = 1760 MHz Phase Noise with Narrow Loop Filter (Internal Divide by 2 Disabled) The plots to the left show the true phase noise capability of the VCO. In order to take these plots, a 20 Hz loop bandwidth was used with the analyzer. E5052 spectrum This is the most accurate and state of the art equipment. Fout = 1813 MHz At lower offsets, the measurements are more accurate because the impact of the PLL is removed. At higher offsets, the measurements are also more accurate because the E5052 spectrum analyzer has a much lower noise floor than the E4445A spectrum analyzer. Even though the E4445A cancellation has feature, a noise it only cancels out the thermal noise. It Fout = 1866 MHz does not cancel out the phase noise of the LO inside the E4445A. 5 L M X 2 5 3 1 L Q 1 7 4 2 E V A L U A T I O N B O A R D O P E R A T I N G I N S T R U C T I O N S Fout = 880 MHz Phase Noise with Narrow Loop Filter (Internal Divide by 2 Enabled) The plots to the left show the true phase noise capability of the VCO. In order to take these plots, a 20 Hz loop bandwidth was used with the analyzer. E5052 spectrum This is the most accurate and state of the art equipment. Fout = 906.5 MHz At lower offsets, the measurements are more accurate because the impact of the PLL is removed. At higher offsets, the measurements are also more accurate because the E5052 spectrum analyzer has a much lower noise floor than the E4445A spectrum analyzer. Even though the E4445A cancellation has feature, a noise it only cancels out the thermal noise. It Fout = 933 MHz does not cancel out the phase noise of the LO inside the E4445A. 6 L M X 2 5 3 1 L Q 1 7 4 2 E V A L U A T I O N B O A R D O P E R A T I N G I N S T R U C T I O N S Spurs (Internal Divide by 2 Disabled) Spur at 200 kHz offset at a worst case frequency of 1760.2 MHz is -90.6 dBc. Worst case channels occur at exactly one channel spacing above or below a multiple of the crystal frequency. Spur at 200 kHz offset at a worst case frequency of 1810.2 MHz is -91.7 dBc. Spur at 200 kHz offset at a worst case frequency of 1870.2 MHz is -91.5 dBc. 7 L M X 2 5 3 1 L Q 1 7 4 2 E V A L U A T I O N B O A R D O P E R A T I N G I N S T R U C T I O N S Spurs (Internal Divide by 2 Enabled) Spur at 200 kHz offset at a frequency of 880.1 MHz is -96.2 dBc. Since this mode uses the divide by 2 mode, the channel spacing here is actually 100 kHz. The spur at 100 kHz could be eliminated by doubling the channel spacing before the divider. The reason that the spur at 200 kHz is shown is to illustrate the theoretical 6 dB impact of the divider. Spur at 200 kHz offset for a frequency of 905.1 MHz is better than -96.0 dBc. Spur at 200 kHz offset for a frequency of 935.1 MHz is better than -92.7 dBc. 8 L M X 2 5 3 1 L Q 1 7 4 2 E V A L U A T I O N B O A R D O P E R A T I N G I N S T R U C T I O N S CodeLoader Settings For the CodeLoader program, the default reference oscillator used for these instructions was 10 MHz, but there is a mode for a 61.44 MHz oscillator as well. If the bits become scrambled, their original state may be recalled by choosing the appropriate mode. Note that if the internal divide by 2 is enabled, the VCO frequency still reflects the VCO frequency before the divide by 2. 9 L M X 2 5 3 1 L Q 1 7 4 2 E V A L U A T I O N B O A R D O P E R A T I N G I N S T R U C T I O N S CodeLoader is set up to load the registers and initialize the part in the correct way. R5 (INIT1) and R5 (INIT 2) are just the R5 register being used to properly initialize the part. So a single CNT+L should load the part. The port setup tells CodeLoader what information goes where. If this is wrong, the part will not program. Although LPT1 is usually correct, CodeLoader does not autodetect the correct port. On some laptops, it may be LPT3. 10 L M X 2 5 3 1 L Q 1 7 4 2 E V A L U A T I O N B O A R D O P E R A T I N G I N S T R U C T I O N S Schematic 2 3 R2 2 4 6 8 C2 R3 C1 D C3 VccPLL C7 C4 VccDIG C19 36 35 34 33 32 31 30 29 28 C23 C R22 VccPLL Vr egDIG NC GND Test OSCin* OSCin Ftest/LD NC Vr egPLL2 R24 R2pLF C24 C105 R23 C18 VccDIG C10 C100 C11 R17 VccDIG NC GND NC NC VregBUF NC DATA CLK VccPLL VregPLL1 FLout CPout Vtune VccBUF Fout GND GND 27 26 25 24 23 22 21 20 19 LE CE NC NC NC NC VccVCO Vr egVCO Vr ef VCO SLG1 SLG2 SLG3 R9 C8 C102 C15 C101 C14 C13 R18 R10 B C12 R11 Fout R21 10 11 12 13 14 15 16 17 18 37 38 39 R14 R12 C17 R20 VccVCO R13 VccBUF R19 U1 R15 C C16 B R16 C2pLF 1 2 3 4 5 6 7 8 9 C9 C20 C5 C1_LF C21 R5 R7 C103 R4 Ftest/LD R2_LF D R6 VccBUF C2_LF Vcc 1 3 5 7 6 5 OSCin VccVCO C22 Vcc R1 4 C6 POWER C104 1 R8 Vcc 2 4 6 8 10 TRIGGER GND A FRAME A uWIRE Title LMX2531 Evaluation Board 1 3 5 7 9 Size 1 B Note that Any Component with Designator 100 or Higher is on the BottomSide of the Board 2 3 11 4 Date: File: 5 Number Revision LMX2531SLBCBPCB 01-06-2006 6-Jan-2006 Sheet of C:\Documentum\Checkout\LMX2531LQEBPCB.ddb.ddb Drawn By: Dan Chappel l 6 L M X 2 5 3 1 L Q 1 7 4 2 E V A L U A T I O N B O A R D O P E R A T I N G Bill of Materials Item QTY Manufacturer I N S T R U C T I O N S LMX2531EB Part # Size Tol Voltage Material Value Designators Open Capacitors C2pLF, C2, C3, C4, C5, C9, C11, C14, C17, C18, C19, C21, C24, C100, C101, C102, C103, C104, C105 6 Open Resistors R7, R8, R17, R19, R21, R24 1 Open Miscellaneous Ftest/LD C0G 47pF C1_LF 19 0 1 Revision 1/3/2006 n/a 1 Kemet C0603C470J5GAC 603 5% 50V 2 1 Kemet C0603C101J5GAC 603 5% 50V C0G 100pF C16 3 1 Kemet C0805C272J3GAC 805 5% 25V C0G 2.7nF C2_LF 4 2 Kemet C0603C103J5RAC 603 5% 50V X7R 10nF C10, C23 5 4 Kemet C0603C104J3RAC 603 5% 25V X7R 100nF C6, C7, C12, C15 6 2 Kemet C0603C474K4RAC 603 10% 16V X7R 470nF C20, C22 7 1 Kemet C0603C105K4RAC 603 10% 16V X5R 1uF C8 8 1 Kemet C0603C475K9PAC 603 10% 6.3V X5R 4.7uF C13 9 1 Kemet C0805C106K8PAC 805 10% 10V X5R 10uF C1 10 1 Vishay CRCW0603000ZRT1 603 5% 0.1W Thick Film 0Ω R20 11 2 Panasonic P.22AHCT-ND 603 10% 0.1W Thick Film 0.22Ω R22, R23 12 2 Vishay CRCW06033R3JRT1 603 5% 0.1W Thick Film 3.3Ω R1, R18 13 4 Vishay CRCW0603100JRT1 603 5% 0.1W Thick Film 10Ω R2, R3, R4, R5 14 1 Vishay CRCW0603510JRT1 603 5% 0.1W Thick Film 51Ω R6 15 4 Vishay CRCW0603103JRT1 603 5% 0.1W Thick Film 10KΩ R9, R11, R13, R15 16 5 Vishay CRCW0603123JRT1 603 5% 0.1W Thick Film 12KΩ R2pLF, R10, R12, R14, R16 17 1 Vishay CRCW0603473JRT1 603 5% 0.1W Thick Film 47KΩ R2_LF 18 1 Comm Con Connectors HTSM3203-8G2 2X4 n/a n/a Metal/Plastic Header POWER 19 1 FCI Electronics 52601-S10-8 2X5 n/a n/a Metal/Plastic Header uWire 20 3 Johnson Components 142-0701-851 SMA n/a n/a Metal SMA Fout, OSCin, Vcc 21 1 National Semiconductor LMX2531LQEBPCB n/a n/a n/a FR4 62 mil Thick PCB Board 1st Layer 10 mils n/a 22 1 National Semiconductor LMX2531 LLP36 n/a 2.7 Silicon LMX2531 U1 23 4 Com Con Connectors CCIJ255G 2-Pin n/a n/a Metal/Plastic Shunt Place Across: POWER: 1-2, 3-4, 5-6, 7-8 24 4 SPC Technology SPCS-8 0.156" n/a n/a Nylon Nylon Standoffs Place in 4 Holes in Corners of Board 12 L M X 2 5 3 1 L Q 1 7 4 2 E V A L U A T I O N B O A R D O P E R A T I N G Top Layer 13 I N S T R U C T I O N S L M X 2 5 3 1 L Q 1 7 4 2 E V A L U A T I O N B O A R D O P E R A T I N G I N S T R U C T I O N S Mid Layer 1 "Ground Plane" (15 Mils Down FR4) 14 L M X 2 5 3 1 L Q 1 7 4 2 E V A L U A T I O N B O A R D O P E R A T I N G I N S T R U C T I O N S Mid Layer 2 "Power" 15 L M X 2 5 3 1 L Q 1 7 4 2 E V A L U A T I O N B O A R D O P E R A T I N G I N S T R U C T I O N S Bottom Layer "Signal" Note: 16 Total Board Thickness = 61 mils