NSC MM5452N

MM5452/MM5453
Liquid Crystal Display Drivers
General Description
The MM5452 is a monolithic integrated circuit utilizing
CMOS metal gate, low threshold enhancement mode devices. It is available in a 40-pin molded package. The chip
can drive up to 32 segments of LCD and can be paralleled to
increase this number. The chip is capable of driving a
41⁄2-digit 7-segment display with minimal interface between
the display and the data source.
The MM5452 stores display data in latches after it is clocked
in, and holds the data until new display data is received.
Features
n Serial data input
n No load signal required
n
n
n
n
n
n
DATA ENABLE (MM5452)
Wide power supply operation
TTL compatibility
32 or 33 outputs
Alphanumeric and bar graph capability
Cascaded operation capability
Applications
n
n
n
n
n
COPS™ or microprocessor displays
Industrial control indicator
Digital clock, thermometer, counter, voltmeter
Instrumentation readouts
Remote displays
Block Diagram
00613701
FIGURE 1.
© 2001 National Semiconductor Corporation
DS006137
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MM5452/MM5453 Liquid Crystal Display Drivers
December 2001
MM5452/MM5453
Absolute Maximum Ratings
Lead Temperature
10s)
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Voltage at Any Pin, Referenced to
Gnd
Storage Temperature
-65˚C to +150˚C
350mW
Power Dissipation at 70˚C
300mW
Junction Temperature
+150˚C
Electrical Characteristics
300˚C
Recommended Operating
Conditions
-0.3V to +10V
Power Dissipation at 25˚C
(Soldering,
VDD
3V to 10V
Operating Temperature
−40˚C to 85˚C
TA within operating range, VDD = 3.0V to 10V, VSS = 0V unless otherwise speci-
fied.
Parameter
Conditions
Min
Supply Voltage, VDD
Average Supply Current, IDD
Input Logical ’0’ Voltage, VIL
Input Logical ’1’ Voltage, VIH
Typ
3
Max
Units
10
V
All Outputs Open, Clock=Gnd,
Data=Gnd,OSC=Gnd, BP_IN @ 32Hz
VDD= 5V
10
µA
VDD= 10V
40
µA
VDD= 3V
0.4
V
VDD= 5V
0.8
V
VDD= 10V
0.8
V
VDD= 3V
2.0
V
VDD= 5V
2.0
V
VDD= 10V
8.0
Segment Sink Current, IOL
VDD= 3V, VOUT= 0.3V
-20
-40
µA
Segment Source Current, IOH
VDD= 3V, VOUT= 2.7V
20
40
µA
Backplane Out Sink Current,
IOL
VDD= 3V, VOUT= 0.3V
-320
-500
µA
Backplane Out Source
Current, IOH
VDD= 3V, VOUT= 2.7V
320
500
µA
Segment Output Offset
Voltage
Segment Load = 250pF (Note 2)
Backplane Output Offset
Voltage
Backplane Load = 8750pF (Note 2)
Backplane Out Frequency
ROSC_IN= 50kΩ, COSC_IN= 0.01µF
V
+/-50
mV
+/-50
mV
500
kHz
75
Clock Input Frequency, fCLOCK VDD= 3V (Notes 2, 3)
Hz
VDD= 5V (Note 2)
750
kHz
VDD= 10V (Note 2)
1.0
MHz
60
%
Clock Input Duty Cycle
40
Data Input Set-Up Time, tDS
300
ns
Data Input Hold Time, tDH
300
ns
DataEnable Set-up Time, tDES
100
ns
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
Note 2: This parameter is guaranteed (but not production tested) over the operating temperature range and the operating supply voltage range. Not to be used in
Q.A. testing.
Note 3: AC input waveform for test purposes: tr≤ 20ns, tf≤ 20ns, fCLOCK = 500kHz, Duty Cycle = 50% ± 10%
Note 4: Clock input rise time (tr) and fall time (tf) must not exceed 300ns
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2
MM5452/MM5453
Connection Diagrams
Dual-In-Line Package
Dual-In-Line Package
00613702
00613703
Top View
Top View
FIGURE 2.
FIGURE 3.
Plastic Chip Carrier
Plastic Chip Carrier
00613711
00613712
Top View
Top View
Order Number MM5452N, MM5453N, MM5452V or MM5453V
See NS Package Number N40A or V44A
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MM5452/MM5453
Figure 5 shows the input data format. A start bit of logical “1”
precedes the 32 bits of data. At the 36th clock a LOAD signal
is generated synchronously with the high state of the clock,
which loads the 32 bits of the shift registers into the latches.
At the low state of the clock a RESET signal is generated
which clears all the shift registers for the next set of data.
The shift registers are static master-slave configuration.
There is no clear for the master portion of the first shift
register, thus allowing continuous operation.
If the clock is not continuous, there must be a complete set
of 36 clocks otherwise the shift registers will not clear.
Figure 2 shows the pin-out of the MM5452. Bit 1 is the first
bit following the start bit and it will appear on pin 18.
Figure 4 shows the timing relationships between data, clock
and DATA ENABLE.
Functional Description
The MM5452 is specifically designed to operate 41⁄2-digit
7-segment displays with minimal interface with the display
and the data source. Serial data transfer from the data
source to the display driver is accomplished with 2 signals,
serial data and clock. Since the MM5452 does not contain a
character generator, the formatting of the segment information must be done prior to inputting the data to the MM5452.
Using a format of a leading “1” followed by the 32 data bits
allows data transfer without an additional load signal. The 32
data bits are latched after the 36th clock is complete, thus
providing non-multiplexed, direct drive to the display. Outputs change only if the serial data bits differ from the previous time.
A block diagram is shown in Figure 1. For the MM5452 a
DATA ENABLE is used instead of the 33rd output. If the
DATA ENABLE signal is not required, the 33rd output can be
brought out. This is the MM5453 device.
00613704
FIGURE 4.
00613705
FIGURE 5. Input Data Format
Figure 6 shows a typical application. Note how the input data
maps to the output pins and the display. The MM5452 and
MM5453 do not have format restrictions, as all outputs are
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controllable. The application assumes a specific display
pinout. Different display/driver connection patterns will, of
course, yield a different input data format.
4
MM5452/MM5453
Functional Description
(Continued)
00613706
Consult LCD manufacturer’s data sheet for specific pinouts.
FIGURE 6. Typical 41⁄2-Digit Display Application
5
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MM5452/MM5453
Functional Description
(Continued)
00613707
*The minimum recommended value for R for the oscillator input is 9 kΩ. An RC time constant of approximately 4.91 x 10−4 should produce a backplane
frequency between 30 Hz and 150 Hz.
FIGURE 7. Parallel Backplane Outputs
00613708
FIGURE 8. External Backplane Clock
Figure 9 shows a four wire remote display that takes advantage of the device’s serial input to move many bits of display
information on a few wires.
a 50% duty cycle. The oscillator input is grounded to prevent
oscillation and reduce current consumptions in the chips.
The oscillator is not used.
Using an external clock allows synchronizing the display
drive with AC power, internal clocks, or DVM integration time
to reduce interference from the display.
USING AN EXTERNAL CLOCK
The MM5452/MM5453 LCD Drivers can be used with an
externally supplied clock, provided it has a duty cycle of
50%. Deviations from a 50% duty cycle result in an offset
voltage on the LCD. In Figure 8, a flip-flop is used to assure
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Figure 10 is a general block diagram that shows how the
device’s serial input can be used to advantage in an analog
display. The analog voltage input is compared with a staircase voltage generated by a counter and a digital-to-analog
6
not be linear; logarithmic or other non-linear functions can be
displayed by using weighted resistors or special DACs. This
system can be used for status indicators, spectrum analyzers, audio level and power meters, tuning indicators, and
other applications.
(Continued)
converter or resistor array. The result of this comparison is
clocked into the MM5452, MM5453. The next clock pulse
increments the staircase and clocks the new data in.
With a buffer amplifier, the same staircase waveform can be
used for many displays. The digital-to-analog converter need
00613709
FIGURE 9. Four Wire Remote Display
00613710
Data is high until staircase
> input
FIGURE 10. Analog Display
7
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MM5452/MM5453
Functional Description
MM5452/MM5453
Physical Dimensions
Physical Dimensions
inches (millimeters) unless otherwise noted
Molded Dual-In-Line Package (N)
Order Number MM5452N or MM5453N
NS Package Number N40A
Plastic Chip Carrier (V)
Order Number MM5452V or MM5453V
NS Package Number V44A
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MM5452/MM5453 Liquid Crystal Display Drivers
Notes
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