CD4541BM/CD4541BC Programmable Timer Y General Description Y The CD4541B Programmable Timer is designed with a 16-stage binary counter, an integrated oscillator for use with an external capacitor and two resistors, output control logic, and a special power-on reset circuit. The special features of the power-on reset circuit are first, no additional static power consumption and second, the part functions across the full voltage range (3V–15V) whether power-on reset is enabled or disabled. Timing and the counter are initialized by turning on power, if the power-on reset is enabled. When the power is already on, an external reset pulse will also initialize the timing and counter. After either reset is accomplished, the oscillator frequency is determined by the external RC network. The 16-stage counter divides the oscillator frequency by any of 4 digitally controlled division ratios. Y Y Y Y Y Y Y Y Y Features Y Y Y Y Available division ratios 28, 210, 213, or 216 Increments on positive edge clock transitions Built-in low power RC oscillator ( g 2% accuracy over temperature range and g 10% supply and g 3% over processing @ k 10 kHz) Y Y Oscillator frequency range & DC to 100 kHz Oscillator may be bypassed if external clock is available (apply external clock to pin 3) Automatic reset initializes all counters when power turns on External master reset totally independent of automatic reset operation Operates at 2n frequency divider or single transition timer Q/Q select provides output logic level flexibility Reset (auto or master) disables oscillator during resetting to provide no active power dissipation Clock conditioning circuit permits operation with very slow clock rise and fall times Wide supply voltage rangeÐ3.0V to 15V High noise immunityÐ0.45 VDD (typ.) 5V – 10V – 15V parameter ratings Symmetrical output characteristics Maximum input leakage 1 mA at 15V over full temperature range High output drive (pin 8) min. one TTL load Logic Diagram VDD e Pin 14 VSS e Pin 7 TL/F/6001 – 1 Connection Diagram Dual-In-Line Package Order Number CD4541B N.C.ÐNot connected Top View C1995 National Semiconductor Corporation TL/F/6001 TL/F/6001 – 2 RRD-B30M105/Printed in U. S. A. CD4541BM/CD4541BC Programmable Timer February 1988 Absolute Maximum Ratings (Notes 1 & 2) Recommended Operating Conditions (Note 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage (VDD) Input Voltage (VIN) Operating Temperature Range CD4541BM CD4541BC b 0.5V to a 18V Supply Voltage (VDD) b 0.5V to VDD a 0.5V Input Voltage (VIN) b 65§ C to a 150§ C Storage Temperature Range (TS) Power Dissipation (PD) Dual-In-Line 700 mW Small Outline 500 mW Lead Temperature (TL) (soldering, 10 sec.) 260§ C 3V to 15V 0 to VDD b 55§ C to a 125§ C b 40§ C to a 85§ C DC Electrical Characteristics (Note 2)ÐCD4541BM Symbol Parameter b 55§ C Conditions Min IDD Quiescent Device Current VDD e 5V, VIN e VDD or VSS VDD e 10V, VIN e VDD or VSS VDD e 15V, VIN e VDD or VSS VOL Low Level Output Voltage VDD e 5V VDD e 10V VDD e 15V lIOl k 1 mA High Level Output Voltage VDD e 5V VDD e 10V VDD e 15V lIOl k 1 mA VOH a 25§ C Max Max 5 10 20 0.005 0.010 0.015 5 10 20 150 300 600 mA mA mA 0.05 0.05 0.05 0 0 0 0.05 0.05 0.05 0.05 0.05 0.05 V V V 4.95 9.95 14.95 1.5 3.0 4.0 5 10 15 Max 4.95 9.95 14.95 1.5 3.0 4.0 V V V VIL Low Level Input Voltage VDD e 5V, VO e 0.5V or 4.5V VDD e 10V, VO e 1.0V or 9.0V VDD e 15V, VO e 1.5V or 13.5V VIH High Level Input Voltage VDD e 5V, VO e 0.5V or 4.5V VDD e 10V, VO e 1.0V or 9.0V VDD e 15V, VO e 1.5V or 13.5V 3.5 7.0 11.0 3.5 7.0 11.0 3 6 9 3.5 7.0 11.0 V V V IOL Low Level Output Current (Note 3) VDD e 5V, VO e 0.4V VDD e 10V, VO e 0.5V VDD e 15V, VO e 1.5V 2.85 4.96 19.3 2.27 4.0 15.6 3.6 9.0 34.0 1.6 2.8 10.9 mA mA mA IOH High Level Output Current VDD e 5V, VO e 2.5V (Note 3) VDD e 10V, VO e 9.5V VDD e 15V, VO e 3.5V 7.96 4.19 16.3 6.42 3.38 13.2 13.0 8.0 30.0 4.49 2.37 9.24 mA mA mA IIN Input Current VDD e 15V, VIN e 0V VDD e 15V, VIN e 15V 2 4 6 Min Units Typ 4.95 9.95 14.95 Min a 125§ C 1.5 3.0 4.0 b 10 b 5 b 0.10 b 0.10 10b5 0.10 b 1.0 0.10 1.0 V V V mA mA DC Electrical Characteristics (Note 2)ÐCD4541BC Symbol Parameter b 40§ C Conditions Min IDD Quiescent Device Current VDD e 5V, VIN e VDD or VSS VDD e 10V, VIN e VDD or VSS VDD e 15V, VIN e VDD or VSS VOL Low Level Output Voltage VDD e 5V VDD e 10V VDD e 15V lIOl k 1mA VOH High Level Output Voltage VDD e 5V VDD e 10V VDD e 15V lIOl k 1 mA VIL Low Level Input Voltage Max 2 a 85§ C Max 20 40 80 0.005 0.010 0.015 20 40 80 150 300 600 mA mA mA 0.05 0.05 0.05 0 0 0 0.05 0.05 0.05 0.05 0.05 0.05 V V V 4.95 9.95 14.95 1.5 3.0 4.0 5 10 15 2 4 6 Min Units Typ 4.95 9.95 14.95 VDD e 5V, VO e 0.5V or 4.5V VDD e 10V, VO e 1.0V or 9.0V VDD e 15V, VO e 1.5V or 13.5V a 25§ C Min Max 4.95 9.95 14.95 1.5 3.0 4.0 V V V 1.5 3.0 4.0 V V V DC Electrical Characteristics (Note 2)ÐCD4541BC (Continued) Symbol Parameter b 40§ C Conditions Min Max a 25§ C Min Typ a 85§ C Max Min Units Max VIH High Level Input Voltage VDD e 5V, VO e 0.5V or 4.5V 3.5 VDD e 10V, VO e 1.0V or 9.0V 7.0 VDD e 15V, VO e 1.5V or 13.5V 11.0 3.5 7.0 11.0 3 6 9 3.5 7.0 11.0 V V V IOL Low Level Output Current (Note 3) VDD e 5V, VO e 0.4V VDD e 10V, VO e 0.5V VDD e 15V, VO e 1.5V 2.32 3.18 12.4 1.96 2.66 10.4 3.6 9.0 34.0 1.6 2.18 8.50 mA mA mA IOH High Level Output Current VDD e 5V, VO e 2.5V (Note 3) VDD e 10V, VO e 9.5V VDD e 15V, VO e 13.5V 5.1 2.69 10.5 4.27 2.25 8.8 130 8.0 30.0 3.5 1.85 7.22 mA mA mA IIN Input Current VDD e 15V, VIN e 0V VDD e 15V, VIN e 15V b 0.3 b 10 b 5 b 0.3 b 1.0 0.3 10b5 0.3 1.0 mA mA AC Electrical Characteristics* TA e 25§ C, CL e 50 pF (refer to test circuits) Symbol Parameter Conditions Min Typ Max Units 50 30 25 200 100 80 ns ns ns tTLH Output Rise Time VDD e 5V VDD e 10V VDD e 15V tTHL Output Fall Time VDD e 5V VDD e 10V VDD e 15V 50 30 25 200 100 80 ns ns ns tPLH, tPHL Turn-Off, Turn-On Propagation Delay, Clock to Q (28 Output) VDD e 5V VDD e 10V VDD e 15V 1.8 0.6 0.4 4.0 1.5 1.0 ms ms ms tPHL, tPLH Turn-On, Turn-Off Propagation Delay, Clock to Q (216 Output) VDD e 5V VDD e 10V VDD e 15V 3.2 1.5 1.0 8.0 3.0 2.0 ms ms ms tWH(CL) Clock Pulse Width VDD e 5V VDD e 10V VDD e 15V fCL Clock Pulse Frequency VDD e 5V VDD e 10V VDD e 15V tWH(R) MR Pulse Width VDD e 5V VDD e 10V VDD e 15V CI Average Input Capacitance Any Input CPD Power Dissipation Capacitance (Note 4) 400 200 150 200 100 70 2.5 6.0 8.5 400 200 150 ns ns ns 1.0 3.0 4.0 170 75 50 5.0 100 MHz MHz MHz ns ns ns 7.5 pF pF *AC Parameters are guaranteed by DC correlated testing. Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation. Note 2: VSS e 0V unless otherwise specified. Note 3: IOH and IOL are tested one output at a time. Note 4: CPD determines the no load AC power consumption of any CMOS device. For complete explanation, see 54C/74C family characteristics application note AN-90. 3 Truth Table Division Ratio Table 0 1 5 Auto Reset Operating Auto Reset Disabled 6 Timer Operational Master Reset On 9 Output Initially Low after Reset Output Initially High after Reset Recycle Mode 10 A B Number of Counter Stages n Count 2n 0 0 13 8192 0 1 10 1024 1 0 8 256 1 1 16 65536 State Pin Single Cycle Mode Operating Characteristics and RS & 2 Rtc where RS t 10 kX The time select inputs (A and B) provide a two-bit address to output any one of four counter stages (28, 210, 213, and 216). The 2n counts as shown in the Division Ratio Table represent the Q output of the Nth stage of the counter. When A is ‘‘1’’, 216 is selected for both states of B. However, when B is ‘‘0’’, normal counting is interrupted and the 9th counter stage receives its clock directly from the oscillator (i.e., effectively outputting 28). The Q/Q select output control pin provides for a choice of output level. When the counter is in a reset condition and Q/Q select pin is set to a ‘‘0’’ the Q output is a ‘‘0’’. Correspondingly, when Q/Q select pin is set to a ‘‘1’’ the Q output is a ‘‘1’’. When the mode control pin is set to a ‘‘1’’, the selected count is continually transmitted to the output. But, with mode pin ‘‘0’’ and after a reset condition the RS flip-flop resets (see Logic Diagram), counting commences and after 2nb1 counts the RS flip-flop sets which causes the output to change state. Hence, after another 2nb1 counts the output will not change. Thus, a Master Reset pulse must be applied or a change in the mode pin level is required to reset the single cycle operation. Power Dissipation Test Circuit and Waveforms Switching Time Test Circuit and Waveforms With Auto Reset pin set to a ‘‘0’’ the counter circuit is initialized by turning on power. Or with power already on, the counter circuit is reset when the Master Reset pin is set to a ‘‘1’’. Both types of reset will result in synchronously resetting all counter stages independent of counter state. The RC oscillator frequency is determined by the external RC network, i.e.: fe 1 if (1 kHz s f s 100 kHz) 2.3 RtcCtc (Rtc and Ctc outputs are left open) TL/F/6001 – 4 TL/F/6001 – 3 TL/F/6001 – 5 TL/F/6001 – 6 4 Operating Characteristics (Continued) Oscillator Circuit Using RC Configuration TL/F/6001 – 7 Typical RC Oscillator Characteristics RC Oscillator Frequency as a Function of RTC and C TL/F/6001 – 8 Solid Line e RTC e 56 kX, RS e 1 kX and C e 1000 pF f e 10.2 kHz @ VDD e 10V and TA e 25§ C TL/F/6001 – 9 Line A: f as a function of C and (RTC e 56 kX; RS e 120k) Line B: f as a function of RTC and (C e 100 pF; RS e 2 RTC) Dashed Line e RTC e 56 kX, RS e 120 kX and C e 1000 pF f e 7.75 kHz @ VDD e 10V and TA e 25§ C 5 CD4541BM/CD4541BC Programmable Timer Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number CD4541BMJ or CD4541BCJ NS Package Number J14A Molded Dual-In-Line Package (N) Order Number CD4541BMN or CD4541BCN NS Package Number N14A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. 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