IRF1405S IRF1405L AUTOMOTIVE MOSFET Typical Applications ● ● ● ● ● Electric Power Steering (EPS) Anti-lock Braking System (ABS) Wiper Control Climate Control Power Door Benefits ● ● ● ● ● ● Advanced Process Technology Ultra Low On-Resistance Dynamic dv/dt Rating 175°C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax D VDSS = 55V RDS(on) = 5.3mΩ G ID = 131A S Description Stripe Planar design of HEXFET® Power MOSFETs utilizes the lastest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this HEXFET power MOSFET are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating. These benefits combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications. D2Pak IRF1405S TO-262 IRF1405L Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting Torque, 6-32 or M3 screw Max. Units 131 93 680 200 1.3 ± 20 590 See Fig.12a, 12b, 15, 16 5.0 -55 to + 175 A W W/°C V mJ A mJ V/ns °C 300 (1.6mm from case ) 10 lbf•in (1.1N•m) Thermal Resistance Parameter RθJC RθJA www.kersemi.com Junction-to-Case Junction-to-Ambient (PCB mount) Typ. Max. Units ––– ––– 0.75 40 °C/W 1 1/11/01 IRF1405S/L Electrical Characteristics @ TJ = 25°C (unless otherwise specified) RDS(on) VGS(th) gfs Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Qg Qgs Qgd td(on) tr td(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Min. 55 ––– ––– 2.0 69 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– 0.057 4.6 ––– ––– ––– ––– ––– ––– 170 44 62 13 190 130 110 IDSS Drain-to-Source Leakage Current LD Internal Drain Inductance ––– 4.5 LS Internal Source Inductance ––– 7.5 Ciss Coss Crss Coss Coss Coss eff. Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance ––– ––– ––– ––– ––– ––– 5480 1210 280 5210 900 1500 V(BR)DSS ∆V(BR)DSS/∆TJ IGSS Max. Units Conditions ––– V VGS = 0V, ID = 250µA ––– V/°C Reference to 25°C, ID = 1mA 5.3 mΩ VGS = 10V, ID = 101A 4.0 V VDS = 10V, ID = 250µA ––– S VDS = 25V, ID = 110A 20 VDS = 55V, VGS = 0V µA 250 VDS = 44V, VGS = 0V, TJ = 150°C 200 VGS = 20V nA -200 VGS = -20V 260 ID = 101A 66 nC VDS = 44V 93 VGS = 10V ––– VDD = 38V ––– ID = 110A ns ––– RG = 1.1Ω ––– VGS = 10V D Between lead, ––– 6mm (0.25in.) nH G from package ––– and center of die contact S ––– VGS = 0V ––– pF VDS = 25V ––– ƒ = 1.0MHz, See Fig. 5 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 44V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 0V to 44V Source-Drain Ratings and Characteristics IS ISM VSD trr Qrr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol ––– ––– 131 showing the A G integral reverse ––– ––– 680 S p-n junction diode. ––– ––– 1.3 V TJ = 25°C, IS = 101A, VGS = 0V ––– 88 130 ns TJ = 25°C, IF = 101A ––– 250 380 nC di/dt = 100A/µs Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) www.kersemi.com 2 IRF1405S/L 1000 1000 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP I D , Drain-to-Source Current (A) I D , Drain-to-Source Current (A) TOP 100 100 10 4.5V 20µs PULSE WIDTH TJ = 25 °C 1 0.1 1 10 4.5V 100 Fig 1. Typical Output Characteristics 3.0 RDS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) TJ = 25 ° C TJ = 175 ° C 100 10 V DS = 25V 20µs PULSE WIDTH 6 8 10 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.kersemi.com 10 100 Fig 2. Typical Output Characteristics 1000 4 1 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) 1 20µs PULSE WIDTH TJ = 175 °C 10 0.1 12 ID = 169A 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 VGS = 10V 0 20 40 60 80 100 120 140 160 180 TJ , Junction Temperature ( °C) Fig 4. Normalized On-Resistance Vs. Temperature 3 IRF1405S/L 20 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd C, Capacitance(pF) Coss = Cds + Cgd 10000 Ciss Coss 1000 Crss ID = 101A VDS = 44V VDS = 27V VGS , Gate-to-Source Voltage (V) 100000 16 12 8 4 100 FOR TEST CIRCUIT SEE FIGURE 13 0 1 10 0 100 180 240 300 Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 1000 10000 OPERATION IN THIS AREA LIMITED BY RDS(on) TJ = 175 ° C 1000 I D , Drain Current (A) ISD , Reverse Drain Current (A) 120 Q G , Total Gate Charge (nC) VDS , Drain-to-Source Voltage (V) 100 10us 100us 100 TJ = 25 ° C 10 1ms 10ms 10 1 0.0 V GS = 0 V 0.5 1.0 1.5 2.0 2.5 VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 60 3.0 TC = 25 ° C TJ = 175 ° C Single Pulse 1 1 10 100 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area www.kersemi.com IRF1405S/L 160 VGS 120 I D , Drain Current (A) RD VDS LIMITED BY PACKAGE D.U.T. RG + -VDD 10V 80 Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % Fig 10a. Switching Time Test Circuit 40 VDS 90% 0 25 50 75 100 125 150 175 TC , Case Temperature ( ° C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms 1 Thermal Response (Z thJC ) D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 0.01 SINGLE PULSE (THERMAL RESPONSE) P DM t1 t2 0.001 0.00001 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.kersemi.com 5 IRF1405S/L 1400 EAS , Single Pulse Avalanche Energy (mJ) 1 5V ID 41A 71A BOTTOM 101A TOP 1200 D R IV E R L VDS 1000 D .U .T RG + - VD D IA S 20V 0 .0 1 Ω tp Fig 12a. Unclamped Inductive Test Circuit V (B R )D SS tp A 800 600 400 200 0 25 50 75 100 125 150 175 Starting TJ , Junction Temperature ( °C) IAS Fig 12c. Maximum Avalanche Energy Vs. Drain Current Fig 12b. Unclamped Inductive Waveforms QG 10 V QGS QGD 4.0 VG Charge Fig 13a. Basic Gate Charge Waveform Current Regulator Same Type as D.U.T. 50KΩ 12V .2µF VGS(th) , Variace ( V ) 3.5 ID = 250µA 3.0 2.5 2.0 .3µF D.U.T. + V - DS 1.5 VGS -75 3mA -50 -25 0 25 50 75 100 125 150 175 T J , Temperature ( °C ) IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit Fig 14. Threshold Voltage Vs. Temperature 6 www.kersemi.com IRF1405S/L 1000 Duty Cycle = Single Pulse Avalanche Current (A) 100 Allowed avalanche Current vs avalanche pulsewidth, tav assuming ∆ Tj = 25°C due to avalanche losses 0.01 0.05 10 0.10 1 0.1 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 1.0E+00 tav (sec) Fig 15. Typical Avalanche Current Vs.Pulsewidth EAR , Avalanche Energy (mJ) 600 TOP Single Pulse BOTTOM 10% Duty Cycle ID = 101A 500 400 300 200 100 0 25 50 75 100 125 150 Starting T J , Junction Temperature (°C) Fig 16. Maximum Avalanche Energy Vs. Temperature Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 15, 16). tav = Average time in avalanche. 175 D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3·BV·Iav) = ∆T/ ZthJC ∆T/ [1.3·BV·Zth] Iav = 2∆ EAS (AR) = PD (ave)·tav 7 www.kersemi.com IRF1405S/L Peak Diode Recovery dv/dt Test Circuit + D.U.T* Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + - - + • dv/dt controlled by RG • ISD controlled by Duty Factor "D" • D.U.T. - Device Under Test RG VGS * + - VDD Reverse Polarity of D.U.T for P-Channel Driver Gate Drive P.W. D= Period P.W. Period [VGS=10V ] *** D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode [VDD] Forward Drop Inductor Curent Ripple ≤ 5% [ ISD ] *** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 17. For N-channel HEXFET® power MOSFETs 8 www.kersemi.com IRF1405S/L D2Pak Package Outline 1 0.54 (.415 ) 1 0.29 (.405 ) 1.4 0 (.055 ) M AX. -A- 1.3 2 (.05 2) 1.2 2 (.04 8) 2 1.7 8 (.07 0) 1.2 7 (.05 0) 1 10 .1 6 (.4 00 ) R E F. -B- 4 .6 9 (.18 5) 4 .2 0 (.16 5) 6.47 (.2 55 ) 6.18 (.2 43 ) 3 1 5.49 (.6 10) 1 4.73 (.5 80) 2.7 9 (.110 ) 2.2 9 (.090 ) 2.61 (.1 03 ) 2.32 (.0 91 ) 5.28 (.2 08 ) 4.78 (.1 88 ) 3X 1.40 (.0 55) 1.14 (.0 45) 5 .08 (.20 0) 0.55 (.0 22) 0.46 (.0 18) 0.9 3 (.0 37 ) 3X 0.6 9 (.0 27 ) 0.25 (.0 10 ) M 8.8 9 (.3 50 ) R E F. 1.3 9 (.0 55 ) 1.1 4 (.0 45 ) B A M M IN IM U M R EC O M M E ND E D F O O TP R IN T 1 1.43 (.4 50 ) NO TE S: 1 D IM EN S IO N S A FTER SO LD E R D IP . 2 D IM EN S IO N IN G & TO LE R AN C IN G P ER AN S I Y1 4.5M , 19 82 . 3 C O N TRO L LIN G D IM EN S IO N : IN C H. 4 H E ATSINK & L EA D D IM E N SIO N S DO N O T IN C LU D E B U R RS . LE AD AS SIG N M E N TS 1 - G ATE 2 - D RA IN 3 - SO U R C E 8 .89 (.35 0) 17 .78 (.70 0) 3.81 (.1 5 0) 2.0 8 (.08 2) 2X 2.5 4 (.100 ) 2X D2Pak Part Marking Information IN TE R N A TIO N A L R E C T IF IE R LO G O A S S E M B LY LO T C O D E A PART NUM BER F530S 9 24 6 9B 1M DATE CODE (Y YW W ) YY = Y E A R W W = W EEK 9 www.kersemi.com IRF1405S/L TO-262 Package Outline TO-262 Part Marking Information 10 www.kersemi.com IRF1405S/L D2Pak Tape & Reel Information TR R 1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 4 .1 0 ( .1 6 1 ) 3 .9 0 ( .1 5 3 ) F E E D D IR E C TIO N 1 .8 5 ( .0 7 3 ) 1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 0.3 6 8 (.01 4 5 ) 0.3 4 2 (.01 3 5 ) 1 1.6 0 (.4 57 ) 1 1.4 0 (.4 49 ) 1 .6 5 ( .0 6 5 ) 2 4 .3 0 (.9 5 7 ) 2 3 .9 0 (.9 4 1 ) 1 5 .42 (.60 9 ) 1 5 .22 (.60 1 ) TRL 1 .75 (.06 9 ) 1 .25 (.04 9 ) 1 0.9 0 (.4 2 9) 1 0.7 0 (.4 2 1) 4 .7 2 (.1 3 6) 4 .5 2 (.1 7 8) 16 .1 0 (.63 4 ) 15 .9 0 (.62 6 ) F E E D D IR E C T IO N 2 7.4 0 (1.079 ) 2 3.9 0 (.9 41) 13.50 (.532 ) 12.80 (.504 ) 4 3 30 .00 ( 14.1 73 ) MAX. Notes: 6 0.0 0 (2.36 2) M IN . N O TE S : 1 . CO M F OR M S TO E IA -418 . 2 . CO N TR O L LIN G D IM E N SIO N : M IL LIM E T ER . 3 . DIM E NS IO N M EA S UR E D @ H U B. 4 . IN C LU D ES FL AN G E DIST O R T IO N @ O UT E R E D G E. Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11). Starting TJ = 25°C, L = 0.11mH RG = 25Ω, I AS = 101A. (See Figure 12). ISD ≤ 101A, di/dt ≤ 210A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C Pulse width ≤ 400µs; duty cycle ≤ 2%. 26 .40 (1 .03 9) 24 .40 (.9 61 ) 3 30.4 0 (1.19 7) M A X. 4 Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS . Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 75A. Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. This is applied to D2Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. 11 www.kersemi.com