PD - 93919A IRFR9N20D IRFU9N20D SMPS MOSFET HEXFET® Power MOSFET Applications High frequency DC-DC converters l VDSS 200V Benefits Low Gate-to-Drain Charge to Reduce Switching Losses l Fully Characterized Capacitance Including Effective COSS to Simplify Design, (See App. Note AN1001) l Fully Characterized Avalanche Voltage and Current RDS(on) max ID 0.38Ω 9.4A l D-Pak IRFR9N20D I-Pak IRFU9N20D Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Max. 9.4 6.7 38 86 0.57 ± 30 5.0 -55 to + 175 Units A W W/°C V V/ns °C 300 (1.6mm from case ) Typical SMPS Topologies www.kersemi.com 1 6/29/00 IRFR9N20D/IRFU9N20D Static @ TJ = 25°C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage ∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage V(BR)DSS IDSS Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. Typ. Max. Units Conditions 200 ––– ––– V VGS = 0V, ID = 250µA ––– 0.23 ––– V/°C Reference to 25°C, ID = 1mA ––– ––– 0.38 Ω VGS = 10V, ID = 5.6A 3.0 ––– 5.5 V VDS = VGS, ID = 250µA ––– ––– 25 VDS = 200V, VGS = 0V µA ––– ––– 250 VDS = 160V, VGS = 0V, T J = 150°C ––– ––– 100 VGS = 30V nA ––– ––– -100 VGS = -30V Dynamic @ TJ = 25°C (unless otherwise specified) gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 4.3 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– 18 4.7 9.0 7.5 16 13 9.3 560 97 29 670 40 74 Max. Units Conditions ––– S VDS = 50V, ID = 5.6A 27 ID = 5.6A 7.1 nC VDS = 160V 14 VGS = 10V, ––– VDD = 100V ––– ID = 5.6A ns ––– RG = 11Ω ––– VGS = 10V ––– VGS = 0V ––– VDS = 25V ––– pF ƒ = 1.0MHz ––– VGS = 0V, V DS = 1.0V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 160V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 0V to 160V Avalanche Characteristics Parameter EAS IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Typ. Max. Units ––– ––– ––– 100 5.6 8.6 mJ A mJ Typ. Max. Units ––– ––– ––– 1.75 50 110 °C/W Thermal Resistance Parameter RθJC RθJA RθJA Junction-to-Case Junction-to-Ambient (PCB mount)* Junction-to-Ambient Diode Characteristics IS ISM VSD trr Qrr ton 2 Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol ––– ––– 9.4 showing the A G integral reverse 38 ––– ––– S p-n junction diode. ––– ––– 1.3 V TJ = 25°C, IS = 5.6A, VGS = 0V ––– 130 ––– ns TJ = 25°C, I F = 5.6A ––– 560 ––– nC di/dt = 100A/µs Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) www.kersemi.com IRFR9N20D/IRFU9N20D 100 100 VGS 15V 12V 10V 8.0V 7.0V 6.5V 6.0V BOTTOM 5.5V VGS 15V 12V 10V 8.0V 7.0V 6.5V 6.0V BOTTOM 5.5V TOP I D , Drain-to-Source Current (A) I D , Drain-to-Source Current (A) TOP 10 1 5.5V 20µs PULSE WIDTH TJ = 25 °C 0.1 0.1 1 10 10 5.5V 1 100 VDS , Drain-to-Source Voltage (V) 3.0 R DS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) TJ = 175 ° C TJ = 25 ° C 1 V DS = 50V 20µs PULSE WIDTH 4 6 8 10 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.kersemi.com 10 100 Fig 2. Typical Output Characteristics 100 0.1 1 VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 10 20µs PULSE WIDTH TJ = 175 °C 0.1 0.1 12 ID = 9.4A 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 VGS = 10V 0 20 40 60 80 100 120 140 160 180 TJ , Junction Temperature ( °C) Fig 4. Normalized On-Resistance Vs. Temperature 3 IRFR9N20D/IRFU9N20D VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd C, Capacitance(pF) Coss = Cds + Cgd 1000 Ciss 100 Coss Crss VGS , Gate-to-Source Voltage (V) 20 10000 ID = 5.6A VDS = 160V VDS = 100V VDS = 40V 16 12 8 4 FOR TEST CIRCUIT SEE FIGURE 13 10 1 10 100 1000 0 0 VDS , Drain-to-Source Voltage (V) 5 10 15 20 25 30 Q G , Total Gate Charge (nC) Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 1000 100 100 I D , Drain Current (A) ISD , Reverse Drain Current (A) OPERATION IN THIS AREA LIMITED BY RDS(on) 10 TJ = 175 ° C 1 10 100us 1ms 1 10ms TJ = 25 ° C 0.1 0.2 V GS = 0 V 0.4 0.6 0.8 1.0 1.2 VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 10us 1.4 TC = 25 ° C TJ = 175 ° C Single Pulse 0.1 1 10 100 1000 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area www.kersemi.com IRFR9N20D/IRFU9N20D 10.0 VDS VGS I D , Drain Current (A) 8.0 RD D.U.T. RG + -VDD 6.0 VGS Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 4.0 Fig 10a. Switching Time Test Circuit 2.0 VDS 90% 0.0 25 50 75 100 125 TC , Case Temperature 150 175 ( °C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 10 1 D = 0.50 0.20 0.10 P DM 0.05 0.1 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.01 0.00001 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.kersemi.com 5 IRFR9N20D/IRFU9N20D 200 D R IV E R L VDS D .U .T RG + V - DD IA S 20V A 0 .0 1 Ω tp Fig 12a. Unclamped Inductive Test Circuit V (B R )D SS tp EAS , Single Pulse Avalanche Energy (mJ) 1 5V TOP 160 BOTTOM ID 2.3A 4.0A 5.6A 120 80 40 0 25 50 75 100 125 150 175 Starting TJ , Junction Temperature ( °C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current IAS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. QG 50KΩ 12V .2µF .3µF QGS QGD D.U.T. VG + V - DS VGS 3mA Charge Fig 13a. Basic Gate Charge Waveform 6 IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit www.kersemi.com IRFR9N20D/IRFU9N20D Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + - - + • • • • RG dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Driver Gate Drive P.W. D= Period + - VDD P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET® Power MOSFETs www.kersemi.com 7 IRFR9N20D/IRFU9N20D D-Pak (TO-252AA) Package Outline Dimensions are shown in millimeters (inches) 2 .3 8 (.0 9 4 ) 2 .1 9 (.0 8 6 ) 6 .7 3 (.2 6 5 ) 6 .3 5 (.2 5 0 ) -A 1 .2 7 (.0 5 0 ) 0 .8 8 (.0 3 5 ) 5 .4 6 (.2 1 5 ) 5 .2 1 (.2 0 5 ) 1 .1 4 (.0 4 5 ) 0 .8 9 (.0 3 5 ) 0 .5 8 (.0 2 3 ) 0 .4 6 (.0 1 8 ) 4 6 .4 5 (.2 4 5 ) 5 .6 8 (.2 2 4 ) 6 .2 2 (.2 4 5 ) 5 .9 7 (.2 3 5 ) 1.0 2 (.0 4 0 ) 1.6 4 (.0 2 5 ) 1 0 .4 2 (.4 1 0 ) 9 .4 0 (.3 7 0 ) 1 2 1 - GATE 0 .5 1 (.0 2 0 ) M IN . -B 1 .5 2 (.0 6 0 ) 1 .1 5 (.0 4 5 ) 3X 2X 1 .1 4 (.0 4 5 ) 0 .7 6 (.0 3 0 ) L E A D A S S IG N M E N T S 3 0 .8 9 (.0 3 5 ) 0 .6 4 (.0 2 5 ) 0 .2 5 ( .0 1 0 ) 2 - D R A IN 3 - S OU R CE 4 - D R A IN 0 .5 8 (.0 2 3 ) 0 .4 6 (.0 1 8 ) M A M B N O TE S : 2 .2 8 ( .0 9 0 ) 1 D IM E N S IO N IN G & T O L E R A N C IN G P E R A N S I Y 1 4 .5 M , 1 9 8 2 . 4 .5 7 ( .1 8 0 ) 2 C O N T R O L L IN G D IM E N S IO N : IN C H . 3 C O N F O R M S T O J E D E C O U T L IN E T O -2 5 2 A A . 4 D IM E N S IO N S S H O W N A R E B E F O R E S O L D E R D IP , S O L D E R D IP M A X. + 0 .1 6 (.0 0 6 ) . D-Pak (TO-252AA) Part Marking Information 8 www.kersemi.com IRFR9N20D/IRFU9N20D I-Pak (TO-251AA) Package Outline Dimensions are shown in millimeters (inches) 6 .7 3 (.26 5 ) 6 .3 5 (.25 0 ) 2 .3 8 (.0 9 4 ) 2 .1 9 (.0 8 6 ) -A 1 .2 7 ( .0 5 0 ) 0 .8 8 ( .0 3 5 ) 5 .4 6 (.2 1 5 ) 5 .2 1 (.2 0 5 ) 0 .5 8 (.0 2 3 ) 0 .4 6 (.0 1 8 ) 4 6 .4 5 (.2 4 5 ) 5 .6 8 (.2 2 4 ) 6 .2 2 ( .2 4 5 ) 5 .9 7 ( .2 3 5 ) 1 .5 2 (.0 6 0 ) 1 .1 5 (.0 4 5 ) 1 2 L E A D A S S IG N M E N T S 1 - GATE 2 - D R A IN 3 - SOURCE 4 - D R A IN 3 -B - N O TE S : 1 D IM E N S IO N IN G & TO L E R A N C IN G P E R A N S I Y 1 4 .5M , 19 8 2 . 2.2 8 (.0 9 0) 1.9 1 (.0 7 5) 2 C O N T R O L L IN G D IM E N S IO N : IN C H . 3 C O N F O R MS TO J E D E C O U T L IN E TO -2 5 2 A A . 9 .6 5 ( .3 8 0 ) 8 .8 9 ( .3 5 0 ) 4 D IM E N S IO N S S H O W N A R E B E F O R E S O L D E R D IP , S O L D E R D IP M A X. + 0.1 6 (.0 0 6 ). 3X 1 .1 4 (.0 45 ) 0 .7 6 (.0 30 ) 2 .28 (.0 9 0 ) 2X 3X 1 .1 4 ( .0 4 5 ) 0 .8 9 ( .0 3 5 ) 0 .8 9 (.0 35 ) 0 .6 4 (.0 25 ) 0 .2 5 (.0 1 0 ) M A M B 0 .5 8 (.0 2 3 ) 0 .4 6 (.0 1 8 ) I-Pak (TO-251AA) Part Marking Information www.kersemi.com 9 IRFR9N20D/IRFU9N20D D-Pak (TO-252AA) Tape & Reel Information Dimensions are shown in millimeters (inches) TR TRR 16.3 ( .641 ) 15.7 ( .619 ) 12.1 ( .47 6 ) 11.9 ( .46 9 ) F E E D D IR E C T IO N TRL 16 .3 ( .641 ) 15 .7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) FE E D D IR E C T IO N N O T ES : 1 . C O N T R O LLIN G D IME N S IO N : M ILL IM ET E R . 2 . A LL D IM EN S IO N S A R E SH O W N IN M ILLIM ET E R S ( IN C H E S ). 3 . O U TL IN E C O N FO R MS T O E IA -481 & E IA -54 1. 1 3 IN C H 16 m m N O TE S : 1. O U TL IN E C O N F O R M S T O E IA -481 . Notes: Repetitive rating; pulse width limited by max. junction temperature. Starting TJ = 25°C, L = 6.4mH RG = 25Ω, IAS = 5.6A. Pulse width ≤ 300µs; duty cycle ≤ 2%. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS ISD ≤ 5.6A, di/dt ≤ 110A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C * When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994.