PD - 94360 IRFP32N50KS SMPS MOSFET Applications l Switch Mode Power Supply (SMPS) l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits Benefits l Low Gate Charge Qg results in Simple Drive Requirement l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche Voltage and Current l Low RDS(on) HEXFET® Power MOSFET VDSS RDS(on)typ. ID 0.135Ω 32A 500V SMD-247 Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C VGS dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case ) Mounting torque, 6-32 or M3 screw Max. Units 32 20 130 460 3.7 ± 30 13 -55 to + 150 A W W/°C V V/ns 300 °C 10lb*in (1.1N*m) Avalanche Characteristics Symbol EAS IAR EAR Parameter Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Typ. Max. Units ––– ––– ––– 450 32 46 mJ A mJ Typ. Max. Units ––– 0.24 ––– 0.26 ––– 40 °C/W Thermal Resistance Symbol RθJC RθCS RθJA www.irf.com Parameter Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient 1 12/18/01 IRFP32N50KS Static @ TJ = 25°C (unless otherwise specified) Symbol V(BR)DSS RDS(on) VGS(th) Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage IDSS Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage ∆V(BR)DSS/∆TJ Min. Typ. Max. Units Conditions 500 ––– ––– V VGS = 0V, ID = 250µA ––– 0.54 ––– V/°C Reference to 25°C, ID = 1mA ––– 0.135 0.16 Ω VGS = 10V, ID = 32A 3.0 ––– 5.0 V VDS = V GS, ID = 250µA ––– ––– 50 µA VDS = 500V, VGS = 0V ––– ––– 250 µA VDS = 400V, VGS = 0V, TJ = 150°C ––– ––– 100 VGS = 30V nA ––– ––– -100 VGS = -30V Dynamic @ TJ = 25°C (unless otherwise specified) gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 14 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– ––– ––– ––– 28 120 48 54 5280 550 45 5630 155 265 Max. Units Conditions ––– S VDS = 50V, ID = 32A 190 ID = 32A 59 nC VDS = 400V 84 VGS = 10V ––– VDD = 250V ––– ID = 32A ns ––– RG = 4.3Ω ––– VGS = 10V ––– VGS = 0V ––– VDS = 25V ––– pF ƒ = 1.0MHz, See Fig. 5 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 400V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 0V to 400V Diode Characteristics Symbol IS ISM VSD trr Qrr IRRM ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Reverse RecoveryCurrent Forward Turn-On Time Min. Typ. Max. Units ––– ––– 32 ––– 130 A ––– Conditions MOSFET symbol showing the G integral reverse p-n junction diode. TJ = 25°C, IS = 32A, V GS = 0V TJ = 25°C, IF = 32A di/dt = 100A/µs D S ––– ––– 1.5 V ––– 530 800 ns ––– 9.0 13.5 µC ––– 30 ––– A Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes: Repetitive rating; pulse width limited by max. junction temperature. Starting TJ = 25°C, L = 0.87mH, RG = 25Ω, IAS = 32A, Pulse width ≤ 400µs; duty cycle ≤ 2%. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS . ISD ≤ 32A, di/dt ≤ 197A/µs, VDD ≤ V(BR)DSS, TJ ≤ 150°C 2 www.irf.com IRFP32N50KS 100 10 100 VGS TOP 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V TOP I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) 1000 1 5.0V 0.1 10 5.0V 1 20µs PULSE WIDTH Tj = 150°C 20µs PULSE WIDTH Tj = 25°C 0.1 0.01 0.1 1 10 0.1 100 Fig 1. Typical Output Characteristics I D , Drain-to-Source Current (A) TJ = 150° C 10 TJ = 25 ° C 1 V DS = 50V 20µs PULSE WIDTH 4 5 7 8 9 11 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.irf.com 12 RDS(on) , Drain-to-Source On Resistance (Normalized) 3.0 0.1 10 100 Fig 2. Typical Output Characteristics 1000 100 1 VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V) ID = 32A 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 VGS = 10V 0 20 40 60 80 100 120 140 160 TJ , Junction Temperature ( ° C) Fig 4. Normalized On-Resistance Vs. Temperature 3 IRFP32N50KS V GS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds Crss = Cgd SHORTED Coss = Cds + Cgd 10000 C, Capacitance(pF) 20 Ciss 1000 Coss 100 VGS , Gate-to-Source Voltage (V) 100000 ID = 32A V DS = 400V V DS = 250V V DS = 100V 16 12 8 4 Crss 10 0 1 10 100 0 1000 40 80 120 160 200 QG , Total Gate Charge (nC) VDS, Drain-to-Source Voltage (V) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 1000 1000 OPERATION IN THIS AREA LIMITED BY R 100 ID , Drain Current (A) ISD , Reverse Drain Current (A) DS(on) TJ = 150 ° C 100 10 TJ = 25 ° C 10us 100us 10 1 1ms 0.1 0.2 V GS = 0 V 0.6 0.9 1.3 VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 1.6 1 TC = 25 °C TJ = 150 °C Single Pulse 10 10ms 100 1000 10000 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRFP32N50KS 35 VGS 30 ID , Drain Current (A) RD VDS D.U.T. RG + 25 -VDD 10V 20 Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 15 Fig 10a. Switching Time Test Circuit 10 VDS 5 90% 0 25 50 75 100 125 150 TC , Case Temperature ( ° C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 1 D = 0.50 0.1 0.20 0.10 0.05 0.02 0.01 0.01 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 0.001 0.00001 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRFP32N50KS EAS , Single Pulse Avalanche Energy (mJ) 800 TOP 640 BOTTOM ID 14A 20A 32A 1 5V 480 320 D R IV E R L VDS D .U .T RG + V - DD IA S 20V tp 160 A 0 .0 1 Ω Fig 12c. Unclamped Inductive Test Circuit 0 25 50 75 100 125 150 Starting T J , Junction Temperature ( ° C) Fig 12a. Maximum Avalanche Energy Vs. Drain Current V (B R )D SS tp IAS Fig 12d. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. QG 50KΩ 12V VGS .2µF .3µF D.U.T. QGS + V - DS QGD VG VGS 3mA IG ID Current Sampling Resistors Fig 13a. Gate Charge Test Circuit 6 Charge Fig 13b. Basic Gate Charge Waveform www.irf.com IRFP32N50KS Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + - - + • • • • RG dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Driver Gate Drive P.W. Period D= + - VDD P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET® Power MOSFETs www.irf.com 7 IRFP32N50KS SMD-247 Package Outline 0.25 [.010] A 5.30 [.208] 4.70 [.186] 3.65 [.143] Ø 3.55 [.140] 15.90 [.625] 15.30 [.603] B 0.25 [.010] 2.50 [.099] 1.50 [.060] D B 5.70 [.224] 5.30 [.209] 5.50 [.217] 0.95 [.037] 0.35 [.014] 4 2.75 [.108] 2X R 2.25 [.089] 20.30 [.799] 19.70 [.776] D B 13.70 [.539] 13.50 [.532] D 16.20 [.637] 16.00 [.630] 4 3.0 [.118] MAX. C 1 2 3 5.65 [.222] 4.65 [.183] 0.20 [.225] D 5.45 [.215] 2X 0.25 [.010] 1.40 [.055] 1.00 [.040] D C A 2X 2.65 [.104] 2.15 [.085] LEAD AS SIGNMENT S NOT E S: MOSF ET 1. 2. 3. 4. 1 - GAT E 2 - DRAIN 3 - SOURCE 4 - DRAIN DIME NSIONING & T OLERANCING PER AS ME Y14.5M-1994. CONT ROLLING DIME NSION: MILLIME T ER. DIMENS IONS ARE S HOWN IN MILLIMET E RS [INCHES ]. T O-247 S MD IS A MODIF IED T O-247AC. 2X 0.80 [.031] 0.40 [.016] IGBT 1 - GAT E 2 - COLLECT OR 3 - EMIT T ER 4 - COLLECT OR SMD-247 Part Marking Information EXAMPLE: T HIS IS AN IRFP450S WITH AS S EMBLY LOT CODE 3A1Q PART NUMBER INTERNAT IONAL RECT IF IER LOGO IRFP450S 3A1Q 9906 AS S EMBLY LOT CODE DATE CODE (YYWW) YY = YEAR WW = WEEK Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.12/01 8 www.irf.com