IRF IRFB42N20D

PD- 94208
IRFB42N20D
SMPS MOSFET
HEXFET® Power MOSFET
Applications
High frequency DC-DC converters
l Motor Control
l Uninterrutible Power Supplies
l
VDSS
200V
Benefits
l Low Gate-to-Drain Charge to Reduce
Switching Losses
l Fully Characterized Capacitance Including
Effective COSS to Simplify Design, (See
App. Note AN1001)
l Fully Characterized Avalanche Voltage
and Current
RDS(on) max
ID
0.055Ω
44A
TO-220AB
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TA = 25°C
PD @TC = 25°C
VGS
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current 
Power Dissipation
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt ƒ
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torqe, 6-32 or M3 screw
Max.
Units
44
31
180
2.4
330
2.2
± 30
2.5
-55 to + 175
A
W
W/°C
V
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
Notes 
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
through …
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Typ.
Max.
Units
–––
0.50
–––
0.45
–––
62
°C/W
are on page 8
1
5/7/01
IRFB42N20D
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
V(BR)DSS
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min.
200
–––
–––
3.0
–––
–––
–––
–––
Typ.
–––
0.26
–––
–––
–––
–––
–––
–––
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
0.055
Ω
VGS = 10V, ID = 26A „
5.5
V
VDS = VGS, ID = 250µA
25
VDS = 200V, VGS = 0V
µA
250
VDS = 160V, VGS = 0V, TJ = 150°C
100
VGS = 30V
nA
-100
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
gfs
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
Min.
21
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
91
24
43
18
69
29
32
3430
530
100
5310
210
400
Max. Units
Conditions
–––
S
VDS = 50V, ID = 26A
140
ID = 26A
36
nC
VDS = 160V
65
VGS = 10V,
–––
VDD = 100V
–––
ID = 26A
ns
–––
RG = 1.8Ω
–––
VGS = 10V „
–––
VGS = 0V
–––
VDS = 25V
–––
pF
ƒ = 1.0MHz
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 160V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 0V to 160V …
Avalanche Characteristics
Parameter
EAS
IAR
EAR
Single Pulse Avalanche Energy‚
Avalanche Current
Repetitive Avalanche Energy
Typ.
Max.
Units
–––
–––
–––
510
26
33
mJ
A
mJ
Diode Characteristics
IS
ISM
VSD
trr
Qrr
ton
2
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
44
––– –––
showing the
A
G
integral reverse
––– ––– 180
S
p-n junction diode.
––– ––– 1.3
V
TJ = 25°C, IS = 26A, VGS = 0V „
––– 220 330
ns
TJ = 25°C, IF = 26A
––– 1860 2790 nC di/dt = 100A/µs „
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRFB42N20D
1000
1000
VGS
15V
10V
8.0V
7.0V
6.5V
6.0V
5.5V
BOTTOM 5.0V
100
100
10
1
0.1
5.0V
20µs PULSE WIDTH
TJ = 25 °C
0.01
0.1
1
10
10
5.0V
3.5
R DS(on) , Drain-to-Source On Resistance
(Normalized)
TJ = 175 ° C
10
TJ = 25 ° C
V DS = 50V
20µs PULSE WIDTH
0.1
5
6
7
8
9
10
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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10
100
Fig 2. Typical Output Characteristics
1000
1
1
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
100
20µs PULSE WIDTH
TJ = 175 °C
1
0.1
100
VDS , Drain-to-Source Voltage (V)
I D , Drain-to-Source Current (A)
VGS
15V
10V
8.0V
7.0V
6.5V
6.0V
5.5V
BOTTOM 5.0V
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
11
ID = 44A
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VGS = 10V
0
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFB42N20D
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
C, Capacitance(pF)
10000
Ciss
Coss
1000
Crss
100
VGS , Gate-to-Source Voltage (V)
20
100000
10
1
10
100
ID = 26A
VDS = 160V
VDS = 100V
VDS = 40V
16
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
1000
0
20
VDS , Drain-to-Source Voltage (V)
1000
ID, Drain-to-Source Current (A)
ISD , Reverse Drain Current (A)
1000
100
80
100
120
140
OPERATION IN THIS AREA
LIMITED BY R DS (on)
100
TJ = 175 ° C
10
1
TJ = 25 ° C
V GS = 0 V
0.4
0.6
0.8
1.0
1.2
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
60
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
0.1
0.2
40
QG , Total Gate Charge (nC)
100µsec
10
1msec
1
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
1.4
1
10msec
10
100
1000
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFB42N20D
50
VDS
VGS
I D , Drain Current (A)
40
RD
D.U.T.
RG
+
-VDD
30
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
20
Fig 10a. Switching Time Test Circuit
10
VDS
90%
0
25
50
75
100
125
150
175
TC , Case Temperature ( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
1
D = 0.50
0.20
0.1
0.10
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
P DM
0.01
t1
t2
0.001
0.00001
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFB42N20D
D R IV E R
L
VDS
D .U .T
RG
+
- VD D
IA S
2V0GS
V
A
0 .0 1 Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V (B R )D SS
tp
EAS , Single Pulse Avalanche Energy (mJ)
1000
1 5V
TOP
800
BOTTOM
ID
11A
19A
26A
600
400
200
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature ( °C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
QG
10 V
50KΩ
12V
.2µF
.3µF
QGS
QGD
D.U.T.
VG
+
V
- DS
VGS
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
6
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRFB42N20D
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
ƒ
+
‚
-
-
„
+

•
•
•
•
RG
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Driver Gate Drive
P.W.
D=
Period
+
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
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7
IRFB42N20D
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.5 4 (.4 15)
10.2 9 (.4 05)
2.87 (.11 3)
2.62 (.10 3)
-B-
3 .78 (.14 9)
3 .54 (.13 9)
4 .69 (.18 5)
4 .20 (.16 5)
-A-
1.3 2 (.052)
1.2 2 (.048)
6.47 (.2 55)
6.10 (.2 40)
4
15 .24 (.6 00 )
14 .84 (.5 84 )
1.15 (.04 5)
MIN
1
2
14.09 (.5 55 )
13.47 (.5 30 )
4 .06 (.16 0)
3 .55 (.14 0)
3X
3X
LE A D A S S IG N ME N T S
1 - G A TE
2 - D R A IN
3 - SO URCE
4 - D R A IN
3
1.40 (.05 5)
1.15 (.04 5)
0 .93 (.0 37 )
0 .69 (.0 27 )
0.3 6 (.01 4)
3X
M
B A M
2 .92 (.115 )
2 .64 (.104 )
2 .5 4 (.1 00)
2X
N O TE S :
1 D IME N S IO N IN G & TO L E R A N C IN G P E R A N S I Y 14.5 M, 19 82.
2 C O N TR O LLIN G D IM E N S IO N : IN C H
0.55 (.0 22)
0.46 (.0 18)
3 O U TL IN E C O NF O R MS T O JE D E C O U TL IN E T O -2 20 A B .
4 H E A T S IN K & LE A D ME A S U R E ME N T S D O N O T IN C L U D E B U R R S .
TO-220AB Part Marking Information
EXAMPLE: THIS IS AN IRF1010
LOT CODE 1789
AS S EMBLED ON WW 19, 1997
IN T HE AS S EMBLY LINE "C"
INTERNAT IONAL
RECTIFIER
LOGO
AS S EMBLY
LOT CODE
PART NUMBER
DATE CODE
YEAR 7 = 1997
WEEK 19
LINE C
Notes:
 Repetitive rating; pulse width limited by
max. junction temperature.
‚ Starting TJ = 25°C, L = 1.45mH
RG = 25Ω, IAS = 26A, VGS=10V
ƒ ISD ≤ 26A, di/dt ≤ 110A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
„ Pulse width ≤ 400µs; duty cycle ≤ 2%.
… Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.5/01
8
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