MPS MP5000

MP5000
12V, 5A Programmable Current
Limit Switch
DESCRIPTION
FEATURES
The MP5000 is a protection device designed to
protect circuitry on the output (source) from
transients on input (VCC). It also protects VCC from
undesired shorts and transients coming from the
source.






At start up, inrush current is limited by limiting the
slew rate at the source. The slew rate is
controlled by a small capacitor at the dv/dt pin.
The dv/dt pin has an internal circuit that allows
the customer to float this pin (no connect) and
still receive 1.1ms ramp time at the source.
The max load at the output (source) is current
limited. This is accomplished by utilizing a sense
FET topology. The magnitude of the current limit
is controlled by an external resistor from the ILimit pin to the Source pin.
Integrated 44mΩ Power FET
Enable/Fault Pin
Adjustable Slew Rate for Output Voltage
Adjustable Current Limit: 1-5A
Thermal Protection
Over Voltage Limit
APPLICATIONS



Hot Swap
PC Cards
Laptops
For MPS green status, please visit MPS website under Quality Assurance.
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks
of Monolithic Power Systems, Inc.
An internal charge pump drives the gate of the
power device, allowing a very low on-resistance
DMOS power FET of just 44mΩ.
The source is protected from the VCC input being
too low or too high. Under Voltage Lockout
(UVLO) assures that VCC is above the minimum
operating threshold, before the power device is
turned on. If VCC goes above the high output
threshold, the source voltage will be limited.
TYPICAL APPLICATION
MP5000 Rev. 1.41
9/6/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
1
MP5000 – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH
ORDERING INFORMATION
Part Number*
Package
Top Marking
Free Air Temperature (TA)
MP5000DQ
QFN10 (3 x3mm)
V6
-40C to +85C
* For Tape & Reel, add suffix –Z (e.g. MP5000DQ–Z);
For RoHS Compliant Packaging, add suffix –LF (e.g. MP5000DQ–LF–Z)
PACKAGE REFERENCE
ABSOLUTE MAXIMUM RATINGS (1)
VCC, SOURCE, I-LIMIT .................. -0.3V to 22V
dv/dt, ENABLE/FAULT..................... -0.3V to 6V
Storage Temperature ............... -65C to +155C
Continuous Power Dissipation (TA = +25°C) (2)
............................................................2.5W
Operating Junction Temperature . -40C to 150C
Input Voltage Operating Range........ 10V to 18V
Input Voltage Transient (100mS) ......... VIN=25V
MP5000 Rev. 1.41
9/6/2013
Thermal Resistance
(3)
θJA
θJC
QFN10 .................................... 50 ...... 12 ... C/W
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD(MAX)=(TJ(MAX)TA)/ θJA. Exceeding the maximum allowable power dissipation
will cause excessive die temperature, and the regulator will go
into thermal shutdown. Internal thermal shutdown circuitry
protects the device from permanent damage.
3) Measured on JESD51-7 4-layer board.
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
2
MP5000 – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH
ELECTRICAL CHARACTERISTICS
VCC = 12V, RLIMIT=22Ω, Capacitive Load = 100μF, TA=25°C, unless otherwise noted.
Parameters
Power FET
Symbol
Delay Time
tDLY
ON Resistance
(4)
Off State Output Voltage
Continuous Current
Thermal Latch
Shutdown Temperature
Under/Over Voltage Protection
RDSon
VOFF
ID
VCLAMP
Under Voltage Lockout
VUVLO
Intermediate Level Input Voltage
High Level Input Voltage
High State Maximum Voltage
Low Level Input Current (Sink)
Enabling
of
chip
to
ID=100mA with a 1A resistive
load
TJ=25°C
TJ=80°C
VCC=18Vdc, VENABLE=0Vdc,
RL= 500Ω
2
0.5 in pad,
Minimum Copper, TA=80°C
Overvoltage Protection
VCC=17V
Turn on,
Voltage going high
ILIM-SS
ILIM-OL
Typ
Max
Units
0.15
44
95
ms
82
mΩ
120
mV
4.2
2.3
A
175
°C
13.8
15
16.2
V
7.7
8.5
9.3
V
VHYST
0.80
V
RLIM=22Ω
RLIM=22Ω,
2.4
3.7
5.0
5.0
A
A
Tr
Float dv/dt pin, Note 5
0.64
1.1
2.1
ms
VIL
Output Disabled
Thermal
Fault,
Disabled
Output Enabled
0.5
V
1.95
V
-50
V
V
μA
3
Units
VCC
V
VI (INT)
VIH
VI (MAX)
IIL
Maximum Fanout for Fault Signal
Maximum Voltage on Enable/Fault
Pin
Total Device
Min
TSD
Output Clamping Voltage
Under Voltage Lockout (UVLO)
Hysteresis
Current Limit
(4)
Hold Current
Trip Current
dv/dt Circuit
Rise Time
Enable/Fault
Low Level Input Voltage
Condition
Output
VENABLE=0V
Total number of chips that
can be connected for
simultaneous shutdown
VMAX
Note 6
Bias Current
IBIAS
Device Operational
Thermal Shutdown
Minimum Operating Voltage for
UVLO
VMIN
Enable<0.5V
0.82
1.4
2.5
4.8
-28
1.5
0.4
2.0
5
mA
V
Notes:
4) Guaranteed by design.
5) Measured from 10% to 90%.
6) Maximum Input Voltage on Enable pin to be ≤ 6.0V if Vcc ≥ 6.0V, Maximum Input Voltage on Enable pin to be Vcc if Vcc ≤ 6.0V.
MP5000 Rev. 1.41
9/6/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
3
MP5000 – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH
PIN FUNCTIONS
Pin #
Name
Description
1
GND
2
dv/dt
Negative Input Voltage to the Device. This is used as the internal reference for the IC.
The internal dv/dt circuit controls the slew rate of the output voltage at turn on. It has an
internal capacitor that allows it to ramp up over the period of 1.1ms. An external
capacitor can be added to this pin to increase the ramp time. If an additional time delay
is not required, this pin should be left open.
3
Enable/Fault
4
I-Limit
5
6-10
11
The Enable/Fault pin is a tri-state, bi-directional interface. It can be used to enable the
output of the device by floating the pin, or disable the chip by pulling it to ground (using
an open drain or open collector device). If a thermal fault occurs, the voltage on this pin
will go to an intermediate state to signal a monitoring circuit that the device is in thermal
shutdown. See text: “ENABLE/FAULT PIN”.
A resistor between this pin and the Source pin sets the overload and short circuit
current limit levels.
DO NOT CONNECT. Pin must be left floating.
This pin is the source of the internal power FET and the output terminal of the IC.
N/C
SOURCE
VCC
Positive input voltage to the device (exposed pad).
(Exposed Pad)
MP5000 Rev. 1.41
9/6/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
4
MP5000 – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH
TYPICAL PERFORMANCE CHARACTERISTICS
MP5000 Rev. 1.41
9/6/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
5
MP5000 – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VEN=3.3V, RLIMIT=22Ω, COUT=10uF, Cdv/dt=1nF, TA=25°C, unless otherwise noted.
MP5000 Rev. 1.41
9/6/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
6
MP5000 – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VEN=3.3V, RLIMIT=22Ω, COUT=10uF, Cdv/dt=1nF, TA=25°C, unless otherwise noted.
MP5000 Rev. 1.41
9/6/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
7
MP5000 – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH
BLOCK DIAGRAM
Figure 1—Function Block Diagram
MP5000 Rev. 1.41
9/6/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
8
MP5000 – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH
CURRENT LIMIT
The desired current limit is a function of the
external current limit resistor.
RISE TIME
The rise time is a function of the capacitor
(Cdvdt) on the dv/dt pin.
Table 1—Current Limit vs. Current Limit Resistor
(VCC=12V)
Table 2—Rise Time vs. Cdv/dt
Current Limit Resistor (Ω)
Trip Current (A)
Hold Current (A)
22
5
3.7
50
2.7
1.63
100
2.3
1.1
When the part is active, if load reaches trip
current (minimum threshold current triggering
overcurrent protection) or a short is present, the
part switches into to a constant-current (hold
current) mode. Part will be shutdown only if the
overcurrent condition stays long enough to
trigger thermal protection.
Cdvdt
Rise Time
(TYPICAL)
(ms)
none
50pF
500pF
1nF
1.1
2.2
12.3
23.5
* Notes: Rise Time = KRT*(50pF+Cdv/dt), KRT =22E6
The “rise time” is measured by from 10% to 90%
of output voltage.
However, when the part is powered up by VCC or
EN, the load current should be smaller than hold
current. Otherwise, the part can’t be fully turned
on.
In a typical application using a current limit
resistor of 22Ω, the trip current will be 5A and the
hold current will be 3.7A. If the device is in its
normal operating state and passing 2.0A it will
need to dissipate only 176mW with the very low
on resistance of 44mΩ. For the package
dissipation of 50°C/Watt, the temperature rise will
only be + 9°C. Combined with a 25°C ambient,
this is only 34°C total package temperature.
During a short circuit condition, the device now
has 12V across it and the hold current clamps at
3.7A and therefore must dissipate 44W. At
50°C/watt, if uncontrolled, the temperature would
rise above the MP5000 thermal protection
(+175°C) and shutdown the device to cause the
temperature to drop below a hysteresis level.
Proper heat sink must be used if the device is
intended to supply the hold current and not
shutdown. Without a heat sink, hold current
should be maintained below 250mA at + 25°C
and below 150mA at +85°C to prevent the device
from activating the thermal shutdown feature.
Figure 2—Rise Time
ENABLE / FAULT PIN
The Enable/Fault Pin is a Bi-Directional three
levels I/O with a weak pull up current (25uA
typical). The three levels are low, mid and high. It
functions to enable/disable the part and to relay
Fault information.
Enable/Fault pin as an input:
1.
Low and mid disable the part.
2.
Low, in addition to disabling the part,
clears the fault flag.
3.
High enables the part (if the fault flag is
clear).
Enable/Fault pin as an output:
1. The pull up current may (if not over
ridden) allow a “wired nor” pull up to
enable the part.
2.
MP5000 Rev. 1.41
9/6/2013
An under voltage will cause a low on the
Enable/Fault pin, and will clear the fault
flag.
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
9
MP5000 – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH
3.
A thermal fault will cause a mid level on
the Enable/Fault pin, and will set the fault
flag.
The Enable/Fault line must be above the mid
level for the output to be turned on.
The fault flag is an internal flip-flop that can be
set or reset under various conditions:
1.
Thermal Shutdown: set fault flag
2.
Under Voltage: reset fault flag
3.
low voltage on Enable/Fault pin: reset
fault flag
4.
mid voltage on Enable/Fault pin: no effect
Under a fault, the Enable/Fault pin is driven to
the mid level.
There are 4 types of faults, and each fault has a
direct and indirect effect on the Enable/Fault pin
and the internal fault flag.
In a typical application there are one or more of
the MP5000 (or MP5001) chips in a system. The
Enable/Fault lines will typically be connected
together.
Table 3—Fault Function Influence in Application
Fault description
Internal action
Short/over current
Limit current
Under Voltage
Output is turned off
Over Voltage
Limit output voltage
Shutdown part. The
part is latched off
until a UVLO or
externally driven to
ground.
Thermal Shutdown
Effect on Fault
Pin
none
Internally
drives
Enable/Fault pin to
Logic low
None
Internally
drives
Enable/Fault pin
to mid level
UNDER VOLTAGE LOCK OUT OPERATION
If the supply (input) is below the UVLO threshold,
the output is disabled, and the fault line is driven
low.
When the supply goes above the UVLO
threshold, the output is enabled and the fault line
is released. When the fault line is released it will
be pulled high by a 25uA current source. No
external pull up resistor is required. In addition,
the pull up voltage is limited to 5 volts.
MP5000 Rev. 1.41
9/6/2013
Effect on
Flag
none
Flag is reset
None
Flag is set
Effect on secondary Part
none
Secondary part output is
disabled, and fault flag is
reset.
None
Secondary part output is
disabled.
THERMAL PROTECTION
When thermal protection is detected, the output
is disabled and the fault line is driven to the mid
level. The thermal fault condition is latched
(meaning the fault flag is set), and the part will
remain latched off until the fault (enable) line is
brought low. Cycling the power below the UVLO
threshold will also reset the fault flag.
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
10
MP5000 – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH
PCB LAYOUT
PCB layout is very important to achieve stable
operation. Please follow these guidelines and
take below figure for reference. Place Rlimit
close to I_limit pin, Cdv/dt close to dv/dt pin and
VIN
input cap close to VCC pin. Keep the N/C pin float.
Put vias in thermal pad and ensure enough
copper area near VCC and source to achieve
better thermal performance.
VOUT
C2
C3
1
10 SOURCE
dv/dt
2
9 SOURCE
EN/ FAULT
3
I_LIMIT
4
N/C
5
Cdv/dt
GND
EN/ FAULT
8 SOURCE
VIN
6 SOURCE
C4
RLIMIT
7 SOURCE
VIN
GND
Top Layer
Bottom Layer
Figure 3―PCB Layout
MP5000 Rev. 1.41
9/6/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
11
MP5000 – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH
PACKAGE INFORMATION
QFN10 (3 x 3mm)
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP5000 Rev. 1.41
9/6/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
12