MP5011 12V, 5A Switch with Programmable Current Limit DESCRIPTION FEATURES The MP5011 is a device designed to protect circuitry on the output (source) from transients on the input (VCC). It also protects the input from undesirable shorts and transients coming from the source. At start up, the limited slew rate at the source limits the inrush current. A small capacitor at the dv/dt pin controls this slew rate. The dv/dt pin has an internal circuit that allows the customer to float this pin and still achieve a 1.4ms ramp time at the source. The maximum load at the output is currentlimited by using a sense MOSFET topology. An external resistor from the I-LIMIT pin to the source pin controls the magnitude of the current limit. Integrated 44mΩ Power MOSFET Enable/Fault Pin Adjustable Slew Rate for Output Voltage Adjustable Current Limit: 1A-5A Thermal Protection Over-Voltage Protection APPLICATIONS Hot Swap PC Cards Laptops All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. An internal charge pump drives the gate of the power device, allowing for the use of a DMOS power MOSFET with an ON resistance of just 44mΩ. The device also includes protective features to protect the source against an input voltage that is outside the operating range. TYPICAL APPLICATION MP5011 Rev. 1.01 11/8/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 1 MP5011 – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH ORDERING INFORMATION Part Number* MP5011DQ Package QFN10 (3x3mm) Top Marking ACN * For Tape & Reel, add suffix –Z (e.g. MP5011DQ–Z); For RoHS Compliant Packaging, add suffix –LF (e.g. MP5011DQ–LF–Z) PACKAGE REFERENCE ABSOLUTE MAXIMUM RATINGS (1) VCC, SOURCE, I-LIMIT .................. -0.3V to 22V VCC, SOURCE, I-LIMIT Transient (100ms) ...25V dv/dt, ENABLE/FAULT..................... -0.3V to 6V Storage Temperature ............... -65°C to +155°C Continuous Power Dissipation (TA = 25°C) (2) ............................................................2.5W Operating Junction Temperature -40°C to 150°C Recommended Operating Conditions (3) Supply Voltage VIN ............................. 9V to 15V Maximum Junction Temp. (TJ) ............... 125°C MP5011 Rev. 1.01 11/8/2013 Thermal Resistance (4) θJA θJC QFN10 (3x3mm) ..................... 50 ...... 12 ... °C/W Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX)=(TJ(MAX)TA)/ θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7 4-layer board. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 2 MP5011 – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH ELECTRICAL CHARACTERISTICS VCC = 12V, RLIMIT=15.4Ω, Capacitive Load = 100μF, TA=25°C, unless otherwise noted. Parameters Power FET Symbol Delay Time tDLY ON Resistance (5) Off-State Output Voltage Continuous Current Thermal Latch (5) Shutdown Temperature Under/Over-Voltage Protection RDSon VOFF ID Enabling of chip to ID=100mA with a 1A resistive load TJ=25°C TJ=80°C VCC=18Vdc, VENABLE=0Vdc, RL= 500Ω 2 0.5 in pad, Minimum Copper, TA=80°C TSD Output Clamping Voltage VCLAMP Under-Voltage Lockout VUVLO Under-Voltage Lockout Hysteresis Current Limit (5) Hold Current Trip Current dv/dt Circuit (6) Rise Time Enable/Fault Low Level Input Voltage VHYST ILIM-SS ILIM-OL tr VIL Intermediate-Level Input Voltage VI (INT) High-Level Input Voltage High-State Maximum Voltage Low-Level Input Current (Sink) VIH VI (MAX) IIL Maximum Fanout for Fault Signal Maximum Voltage on Enable/Fault (7) Pin Total Device Condition Overvoltage Protection VCC=17V Turn on, Voltage going high Min Typ Max Units 0.1 0.15 0.2 ms 44 52 55 120 4.2 2.3 mΩ mV A 150 175 200 °C 13.8 15 16.2 V 7.7 8.5 9.3 V 0.80 V RLIM=15.4Ω RLIM=15.4Ω, 3.8 4.5 5.3 5.2 A A Float dv/dt pin 0.8 1.4 2.0 ms 0.5 V 1.95 V -50 V V μA 3 Units VCC V Output Disabled Thermal Fault, Output Disabled Output Enabled VENABLE=0V Total number of chips that can be connected for simultaneous shutdown 0.82 1.4 2.5 4.8 -28 VMAX Bias Current IBIAS Device Operational Thermal Shutdown Minimum Operating Voltage for UVLO VMIN Enable<0.5V 1.5 0.4 2.0 5 mA V Notes: 5) Guaranteed by design. 6) Measured from 10% to 90%. 7) Maximum Input Voltage on Enable pin to be ≤ 6.0V if Vcc ≥ 6.0V, Maximum Input Voltage on Enable pin to be Vcc if Vcc ≤ 6.0V. MP5011 Rev. 1.01 11/8/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 3 MP5011 – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH PIN FUNCTIONS Pin # 1 2 3 4 5 6-10 Exposed Pad MP5011 Rev. 1.01 11/8/2013 Name Description Negative Input Voltage to the Device. This is used as the internal reference for the IC. Slew Rate control. The internal dv/dt circuit controls the slew rate of the output voltage at turn-on. An internal capacitor allows the voltage to ramp up over dv/dt 1.4ms. Use an external capacitor to increase the ramp time. If an additional time delay is not required, leave this pin open. The Enable/Fault pin. A tri-state, bi-directional interface. It enables the output of the device when left floating, or disables the device when pulled to ground using Enable/Fault an open-drain or open-collector device. In the event of a thermal fault, the voltage enters an intermediate state to signal a monitoring circuit that the device is in thermal shutdown. See text: “ENABLE/FAULT PIN”. Overload and Short-Circuit Current Set. Use a resistor between this pin and the I-Limit Source pin to set the overload and short-circuit current limit levels. NC DO NOT CONNECT. Pin must be left floating. Output. This pin is the source of the internal power FET and the output terminal SOURCE of the IC. VCC Positive Input Voltage. GND www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 4 MP5011 – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH TYPICAL PERFORMANCE CHARACTERISTICS MP5011 Rev. 1.01 11/8/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 5 MP5011 – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 12V, VEN=3.3V, RLIMIT=15.4Ω, COUT=10μF, Cdv/dt=1nF, TA=25°C, unless otherwise noted. MP5011 Rev. 1.01 11/8/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 6 MP5011 – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 12V, VEN=3.3V, RLIMIT=15.4Ω, COUT=10μF, Cdv/dt=1nF, TA=25°C, unless otherwise noted. MP5011 Rev. 1.01 11/8/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 7 MP5011 – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH BLOCK DIAGRAM VCC 5V 2.5V Enable/ Fault Charge Pump U1 25μA 2V Hys U3 D1 R1 28k U2 RESET Source M1 Latch Control Logic SET Current Limit Thermal Shutdown VCC UVLO Voltage Clamp dv/dt Control I-Limit dv/dt GND Figure 1: Functional Block Diagram MP5011 Rev. 1.01 11/8/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 8 MP5011 – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH OPERATION Current Limit The current limit is a function of the external current limit resistor. Table 1: Current Limit vs. Current Limit Resistor (VCC=12V) Current Limit Resistor (Ω) 15.4 50 100 Trip Current (A) 5.3 3.4 2.8 Hold Current (A) 4.5 2.1 1.2 If a short is present or the load reaches the trip current—the minimum threshold current to trigger over-current protection (OCP)—when the part is active, the part switches into to a constantcurrent (hold) mode (CCM). The device shuts down only if the over-current condition remains for long enough to trigger thermal protection. However, when the part is powered up by VCC or EN, the load current should be smaller than the current. Otherwise, the part will not completely turn on. Figure 2 Rise Time The rise time is a function of the capacitor (Cdv/dt) on the dv/dt pin. Table 2: Rise Time vs. Cdv/dt Cdv/dt None 33pF Rise Time 1.4 2.0 (Typ) (ms) MP5011 Rev. 1.01 11/8/2013 1nF 11.6 22.5 * Notes: Rise Time = KRT*(50pF+Cdv/dt), KRT =22E6 The rise time is measured by from 10% to 90% of output voltage. In a typical application using a current limit resistor of 15.4Ω, the trip current is 5.3A and the hold current is 4.5A. If the device is in its normal operating state and passing 2.0A it will need to dissipate only 176mW with a very low ON resistance of 44mΩ. For a package dissipation of 50°C/Watt, the temperature rise will only be +9°C; with 25°C ambient temperature, this amounts to a total package temperature of 34°C. In the case of a short-circuit condition, the device now has 12V across it and the hold current clamps at 4.5A and therefore must dissipate 44W. At 50°C/watt, the temperature rises above the MP5011 thermal protection (175°C) if left unchecked and device shutdown allows the temperature to drop below a hysteresis level. Use an appropriate heat sink if the device is intended to supply the hold current and not shutdown. Without a heat sink, maintain the hold current below 250mA at 25°C and below 150mA at 85°C to prevent the device from activating the thermal shutdown feature. 470pF Figure 3 Enable / Fault Pin The Enable/Fault pin is a bi-directional, threelevel I/O with a weak pull-up current (typically 25µA). There are three levels: low, mid, and high. It enables/disables the part and relays fault information. When the Enable/Fault pin is an input: 1. Low and mid levels disable the part. 2. Low clears the fault flag in addition to disabling the part. 3. High enables the part (if the fault flag is clear). www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 9 MP5011 – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH When the Enable/Fault pin is an output: 1. The pull-up current (if not overridden) allows for a “wired NOR” pull up to enable the part. 2. An under-voltage causes a low on the Enable/Fault pin, and clears the fault flag. A thermal fault causes a mid level on the Enable/Fault pin, and sets the fault flag. The Enable/Fault line must be above the mid level for the output to be turned on. The fault flag is an internal flip-flop that can be set or reset under various conditions: 1. Thermal Shutdown: set fault flag 2. Under-Voltage: reset fault flag 3. Low Voltage on Enable/Fault Pin: reset fault flag 4. Mid Voltage on Enable/Fault Pin: no effect Under a fault, the Enable/Fault pin goes to the mid level. There are four types of faults, and each fault has a direct and indirect effect on the Enable/Fault pin and the internal fault flag. In a typical application there are one or more MP5011 chips in a system. Typically, tie the Enable/Fault lines together. Table 3: Fault Function Influence in Application Effect on Fault Fault description Internal action Pin Short/Over Current Limit current none Internally drives Under-Voltage Output turns off Enable/Fault pin to Logic low Over-Voltage Limit output voltage None Shutdown part. The Internally drives part is latched off until Thermal Shutdown Enable/Fault pin a UVLO or externally to mid level driven to ground. Under-Voltage Lockout Operation If the supply (input) is below the UVLO threshold, the output is disabled, and the fault line is driven low. When the supply goes above the UVLO threshold, the output is enabled and the fault line releases. When the fault line releases, a 25µA current source pulls it high without the need for an external pull up resistor. The pull-up voltage has a 5V limit. MP5011 Rev. 1.01 11/8/2013 Effect on Flag None Flag resets None Flag sets Effect on secondary Part none Secondary part output disabled, and fault flag resets. None Secondary-part output disabled. Thermal Protection In the presence of a thermal protection fault, the output is disabled and the fault line is driven to the mid level. The thermal fault condition latches—the fault flag is set—and the part remains latched off until the fault (enable) line goes low. Cycling the power below the UVLO threshold also resets the fault flag. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 10 MP5011 – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH PCB LAYOUT Please follow these guidelines use Figure 4 below figure reference to design for stable operation: Place Rlimit close to the I_Limit pin, Cdv/dt close to the dv/dt pin and the input capacitor close to the VCC pin. VIN Float the NC pin. Add vias for the thermal pad and use alarge copper surfaces for VCC and source to achieve better thermal performance. VOUT C2 C3 1 10 SOURCE dv/dt 2 9 SOURCE EN/ FAULT 3 I_LIMIT 4 N/C 5 Cdv/dt GND EN/ FAULT 8 SOURCE VIN 6 SOURCE C4 RLIMIT 7 SOURCE VIN GND Top Layer Bottom Layer Figure 4: PCB Layout MP5011 Rev. 1.01 11/8/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 11 MP5011 – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH PACKAGE INFORMATION QFN10 (3 x 3mm) NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP5011 Rev. 1.01 11/8/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 12