MP6211/MP6212 3.3V/5V, Single-Channel 1A Current-Limited Power Distribution Switches The Future of Analog IC Technology DESCRIPTION FEATURES The MP6211/MP6212 single-channel Power Distribution Switch features internal current limiting to prevent damage to host devices due to faulty load conditions. The MP6211/MP6212 Analog switch has 90mΩ on-resistance and operates from 2.7V to 5.5V input. It is available with guaranteed current limits, making it ideal for load switching applications. The MP6211/MP6212 has built-in protection for both over current and increased thermal stress. For over current, the device will limit the current by changing to a constant current mode. • • • • • • • • • • • • • As the temperature increases as a result of short circuit, the device will shut off. The device will recover once the device temperature reduces to approx 120°C. 1A Continuous Current Accurate Current Limit 2.7V to 5.5V Supply Range 90uA Quiescent Current 90mΩ MOSFET Thermal-Shutdown Protection Under-Voltage Lockout 8ms FLAG Deglitch Time No FLAG Glitch During Power Up Reverse Current Blocking Active High & Active Low Options MSOP8E and SOIC8E package UL Recognized: E322138 APPLICATIONS • • • • • • The MP6211/MP6212 is available in an 8-PIN MSOP and SOIC package with exposed pad. Smartphone and PDA Portable GPS Device Notebook PC Set-top-box Telecom and Network Systems USB Power Distribution “MPS” and “The Future of Analog IC Technology” are Trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION +5V 1 GND MP6212 2, 3 IN 4 EN OUT 6, 7 To VBUS USB Ports FLAG 5 SINGLE-CHANNEL UL Recognized Component MP6211_MP6212 Rev. 1.1 9/18/2009 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2009 MPS. All Rights Reserved. 1 MP6211/MP6212 –CURRENT-LIMITED POWER DISTRIBUTION SWITCHES ORDERING INFORMATION Part Number* MP6211DN MP6211DH MP6212DN MP6212DH Enable Active High Active High Active Low Active Low Switch Single Maximum Typical ShortContinuous Circuit Current Load Current @ TA=25C 1.0A 1.5A Package Top Marking Temperature SOIC8E 6211D Single 1.0A 1.5A MSOP8E Single 1.0A 1.5A SOIC8E –40°C to +85°C 6212D Single 1.0A 1.5A MSOP8E * For Tape & Reel, add suffix –Z (eg. MP6211_MP6212DN–Z). For RoHS Compliant Packaging, add suffix –LF. (eg. MP6211_MP6212DN–LF–Z) PACKAGE REFERENCE TOP VIEW GND 1 8 NC IN 2 7 OUT IN 3 6 OUT EN* 4 5 FLAG EXPOSED PAD ON BACKSIDE MP6211_MP6212 Single-Channel (* EN is active high for MP6211) ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance IN .................................................-0.3V to +6.0V EN, FLAG, OUT to GND ..............-0.3V to +6.0V Continuous Power Dissipation. (TA = +25°C) (2) SOIC8E...................................................... 2.5W MSOP8E .................................................... 2.3W Junction Temperature ...............................150°C Lead Temperature ....................................260°C Storage Temperature............... –65°C to +150°C Operating Temperature.............. –40°C to +85°C SOIC8E .................................. 50 ...... 10... °C/W MSOP8E................................. 55 ...... 12... °C/W MP6211_MP6212 Rev. 1.1 9/18/2009 (3) θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) Measured on JESD51-7 4-layer PCB. www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2009 MPS. All Rights Reserved. 2 MP6211/MP6212 –CURRENT-LIMITED POWER DISTRIBUTION SWITCHES ELECTRICAL CHARACTERISTICS (4) VIN=5V, TA=+25°C, unless otherwise noted. Parameter Condition IN Voltage Range Supply Current Shutdown Current Off Switch Leakage Min Typ Max Units 5.5 120 V μA μA μA 1.5 2.2 A 1.7 2.4 A 2.65 0.8 0.4 V mV mΩ V V V 1 μA 0.5 0.5 3 °C °C ms ms ms ms ms 10 ms 15 ms μA μA 2.7 Single Channel Device Disable, VOUT=float, VIN=5.5V Device Disable, VIN=5.5V Current Limit 90 1 1 1.1 Trip Current Under-voltage Lockout Under-voltage Hysteresis FET On Resistance EN Input Logic High Voltage EN Input Logic Low Voltage FLAG Output Logic Low Voltage FLAG Output High Leakage Current Thermal Shutdown Thermal Shutdown Hysteresis Current Ramp (slew rate≤100A/s) on Output Rising Edge ISINK=5mA VIN=VFLAG=5.5V Turn Off Time, Toff (8) CL=100μF, RL=5.5Ω FLAG Deglitch Time ENx Input Leakage Reverse Leakage Current 130 2 Turn On Time, Ton (7) VOUT Falling Time, Tf (6) 250 90 IOUT=100mA (-40°C≤TA≤85°C) VIN=5.5V, CL=1uF, RL=5.5Ω VIN=2.7V, CL=1uF, RL=5.5Ω VIN=5.5V, CL=1uF, RL=5.5Ω VIN=2.7V, CL=1uF, RL=5.5Ω CL=100μF, RL=5.5Ω VOUT Rising Time, Tr (5) 1.95 140 20 0.9 1.7 4 OUT=5.5V, IN=GND 8 1 0.2 NOTES: 4) Production test at +25°C. Specifications over the temperature range are guaranteed by design and characterization. 5) Measured from 10% to 90%. 6) Measured from 90% to 10% 7) Measured from (50%) EN signal to (90%) output signal. 8) Measured from (50%) EN signal to (10%) output signal. MP6211_MP6212 Rev. 1.1 9/18/2009 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2009 MPS. All Rights Reserved. 3 MP6211/MP6212 –CURRENT-LIMITED POWER DISTRIBUTION SWITCHES PIN FUNCTIONS SOIC8 MSOP8E Name 1 GND Expose Pad 2, 3 IN Input Voltage. Accepts 2.7V to 5.5V input. 4 EN Enable Input, Active Low: (MP6212), Active High: (MP6211) 5 FLAG IN-to-OUT Over-current, active-low output flag. Open-Drain. 6, 7 OUT Power-Distribution Switch Output. 8 N/C No Connect. Not internally connected. Description Ground. Connect exposed pad to GND plane for optimal thermal performance. TYPICAL PERFORMANCE CHARACTERISTICS TA = +25ºC, unless otherwise noted. OUTX RL tf tr CL VO(OUTX) 90% 10% 90% 10% TEST CIRCUIT 50% 50% 50% VI(ENX) 50% VI(ENX) toff ton VO(OUTX) 90% ton VO(OUTX) 10% toff 90% 10% VOLTAGE WAVEFORMS Figure 1—Test Circuit and Voltage Waveforms MP6211_MP6212 Rev. 1.1 9/18/2009 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2009 MPS. All Rights Reserved. 4 MP6211/MP6212 –CURRENT-LIMITED POWER DISTRIBUTION SWITCHES TYPICAL PERFORMANCE CHARACTERISTICS VIN=5.5V, CL=2.2uF, TA = +25ºC, unless otherwise noted. Supply Current, Output Enabled vs. Input Voltage VEN=5V 2.5 3.5 4.5 5.5 INPUT VOTAGE (V) 0.7 0.6 0.5 0.4 2.5 6.5 30 25 20 15 10 5 0 -5 -10 -15 -20 -25 -30 -45 -30 -15 0 15 30 45 60 75 90 STATIC DRAIN-SOURCE ON-STATE Static Drain-Source On-State Resistance Variation vs. Ambient Temperature VIN=5V, IO=0.1A SUPPLY CURRENT (uA) 1.5 0.8 3 3.5 4 4.5 5 INPUT VOTAGE (V) 5.5 95 90 85 80 75 70 6 2.5 3 3.5 4 4.5 5 5.5 INPUT VOTAGE (V) 6 Static Drain-Source On-State Resistance vs. Input Voltage Input to Output Voltage vs. Load Current VEN=5V, IOUT=1A VEN=5V INPUT TO OUTPUT VOLTAGE (mV) TURN OFF DELAY (ms) 120 110 100 90 80 70 2.5 3 3.5 4 4.5 5 5.5 INPUT VOLTAGE (V) 6 140 Vin=5.5V 120 Vin=5V Vin=4V 100 Vin=3.3V 80 Vin=2.7V 60 40 20 0 0 0.2 0.4 0.6 0.8 1 OUTPUT CURRENT (A) 1.2 Short Circuit Output Current vs. Input Voltage Threshold Trip Current vs. Input Voltage Current Limit Response Time vs. Peak Current VEN=5V, VIN=5V VEN=5V VEN=5V 2 1.75 TRIP CURRENT (A) 1.7 1.65 1.6 1.55 1.5 CURRENT LIMIT RESPONSE (us) TURN ON DELAY (ms) 2 1 SHORT CIRCUIT OUTPUT CURRENT (A) 100 0.9 2.5 1.9 1.8 1.7 1.6 1.45 1.4 2.5 3 3.5 4 4.5 5 INPUT VOLTAGE (V) MP6211_MP6212 Rev. 1.1 9/18/2009 5.5 6 1.5 2.5 3 3.5 4 4.5 5 5.5 6 50 45 40 35 30 25 20 15 10 5 0 0 2 INPUT VOLTAGE (V) www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2009 MPS. All Rights Reserved. 4 6 8 10 12 PEAK CURRENT (A) 5 MP6211/MP6212 –CURRENT-LIMITED POWER DISTRIBUTION SWITCHES TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN=5.5V, TA = +25ºC, unless otherwise noted. VOUT 2V/div VOUT 2V/div EN 2V/div EN 2V/div 1s/div Inrush Current with Different Load Capacitance 1ms/div 2ms/div Threshold Trip Current with Ramped Load on Enabled Device Ramped Load on Enabled Device Short Circuit Current, Device Enabled into Short IO 500mA/div 4ms/div MP6211_MP6212 Rev. 1.1 9/18/2009 2ms/div www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2009 MPS. All Rights Reserved. 2ms/div 6 MP6211/MP6212 –CURRENT-LIMITED POWER DISTRIBUTION SWITCHES FUNCTION BLOCK DIAGRAM + UVLO Vref -- -- -- Current Sense -- -- -- -- OUT -- IN Charge Pump -Logic -- - -- FLAG -- EN AMP + Deglitch -- -- Thermal Sense GND Figure 2—Functional Block Diagram MP6211_MP6212 Rev. 1.1 9/18/2009 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2009 MPS. All Rights Reserved. 7 MP6211/MP6212 –CURRENT-LIMITED POWER DISTRIBUTION SWITCHES DETAILED DESCRIPTION Over Current When the load exceeds trip current (minimum threshold current triggering constant-current mode) or a short is present, MP6211/MP6212 switches into to a constant-current mode (current limit value). MP6211/MP6212 will be shutdown only if the overcurrent condition stays long enough to trigger thermal protection. Trigger overcurrent protection for different overload conditions occurring in applications: 1) The output has been shorted or overloaded before the device is enabled or input applied. MP MP6211/MP6212 detects the short or overload and immediately switches into a constant-current mode. 2) A short or an overload occurs after the device is enabled. After the current-limit circuit has been tripped (reached the trip current threshold), the device switches into constantcurrent mode. However, high current may flow for a short period of time before the current-limit circuit can react. Thermal Protection The purpose of thermal protection is to prevent damage in the IC by allowing exceptive current to flow and heating the junction. The die temp. is internally monitored until the thermal limit is reached. Once this temp. is reached, the switch will turn off and allow the chip to cool. The switch has a built-in hysteresis. Under-voltage Lockout (UVLO) This circuit is used to monitor the input voltage to ensure that the MP6211/6212 is operating correctly. This UVLO circuit also ensures that there is no operation until the input voltage reaches the minimum spec. Enable The logic pin disables the chip to reduce the supply current. The device will operate once the enable signal reaches the appropriate level. The input is compatible with both COMS and TTL. 3) Output current has been gradually increased beyond the recommended operating current. The load current rises until the trip current threshold is reached or until the thermal limit of the device is exceeded. The MP6211/ MP6212 is capable of delivering current up to the trip current threshold without damaging the device. Once the trip threshold has been reached, the device switches into its constant-current mode. Flag Response The FLAG pin is an open drain configuration. This FAULT will report a fail mode after an 8ms deglitch timeout. This is used to ensure that no false fault signals are reported. This internal deglitch circuit eliminates the need for extend components. The FLAG pin is not deglitched during an over temp. or a voltage lockout. MP6211_MP6212 Rev. 1.1 9/18/2009 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2009 MPS. All Rights Reserved. 8 MP6211/MP6212 –CURRENT-LIMITED POWER DISTRIBUTION SWITCHES APPLICATION INFORMATION In order to achieve smaller output load transient ripple, placing a high-value electrolytic capacitor on the output pin(s) is recommended when the load is heavy. Power-Supply Considerations Over 10μF capacitor between IN and GND is recommended. This precaution reduces powersupply transients that may cause ringing on the input and improves the immunity of the device to short-circuit transients. +5V 1 GND MP6212 2, 3 IN 4 EN OUT 6, 7 To VBUS USB Ports FLAG 5 SINGLE-CHANNEL Figure 3—Application Circuit MP6211_MP6212 Rev. 1.1 9/18/2009 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2009 MPS. All Rights Reserved. 9 MP6211/MP6212 –CURRENT-LIMITED POWER DISTRIBUTION SWITCHES PACKAGE INFORMATION MSOP8E (EXPOSED PAD) 0.087(2.20) 0.099(2.50) 0.114(2.90) 0.122(3.10) 5 8 0.114(2.90) 0.122(3.10) PIN 1 ID (NOTE 5) 0.187(4.75) 0.199(5.05) 0.062(1.58) 0.074(1.88) Exposed Pad 0.010(0.25) 0.014(0.35) 4 1 0.0256(0.65)BSC BOTTOM VIEW TOP VIEW GAUGE PLANE 0.010(0.25) 0.030(0.75) 0.037(0.95) 0.043(1.10)MAX SEATING PLANE 0.002(0.05) 0.006(0.15) FRONT VIEW NOTE: 0.181(4.60) 0.040(1.00) 0.016(0.40) 0.004(0.10) 0.008(0.20) SIDE VIEW 0.100(2.54) 0.075(1.90) 0o-6o 0.016(0.40) 0.026(0.65) 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GATE BURR. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) PIN 1 IDENTIFICATION HAS HALF OR FULL CIRCLE OPTION. 6) DRAWING MEETS JEDEC MO-187, VARIATION AA-T. 7) DRAWING IS NOT TO SCALE. 0.0256(0.65)BSC RECOMMENDED LAND PATTERN MP6211_MP6212 Rev. 1.1 9/18/2009 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2009 MPS. All Rights Reserved. 10 MP6211/MP6212 –CURRENT-LIMITED POWER DISTRIBUTION SWITCHES SOIC8E (EXPOSED PAD) 0.189(4.80) 0.197(5.00) 0.124(3.15) 0.136(3.45) 8 5 0.150(3.80) 0.157(4.00) PIN 1 ID 1 0.228(5.80) 0.244(6.20) 0.089(2.26) 0.101(2.56) 4 TOP VIEW BOTTOM VIEW SEE DETAIL "A" 0.051(1.30) 0.067(1.70) SEATING PLANE 0.000(0.00) 0.006(0.15) 0.013(0.33) 0.020(0.51) 0.0075(0.19) 0.0098(0.25) SIDE VIEW 0.050(1.27) BSC FRONT VIEW 0.010(0.25) x 45o 0.020(0.50) GAUGE PLANE 0.010(0.25) BSC 0.050(1.27) 0.024(0.61) 0o-8o 0.016(0.41) 0.050(1.27) 0.063(1.60) DETAIL "A" 0.103(2.62) 0.213(5.40) NOTE: 0.138(3.51) RECOMMENDED LAND PATTERN 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION BA. 6) DRAWING IS NOT TO SCALE. NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP6211_MP6212 Rev. 1.1 9/18/2009 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2009 MPS. All Rights Reserved. 11