ORISTER RS7212

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RS7212 300mA CMOS LDO Linear Regulator with Enable and Fast Discharge Function General Description The RS7212 is a 4‐Low (Low‐dropout, Low‐quiescent Current, Low‐noise, Low‐cost) linear regulator with ON/OFF control. The device operates in the input voltage range from +2.2V to +7.0V and delivers 300mA output current. The high‐accuracy output voltage is preset at an internally trimmed voltage 1.2V, 1.5V, 1.8V, 2.5V, 2.8V, 3.0V or 3.3V. Other output voltages can be mask‐optioned from 1.2V to 5.0V with 100mV increment. The RS7212 consists of a 1.0V reference compare amplifier, a P‐channel pass transistor, and an enable/disable logic circuit. Other features include short‐circuit protection, and thermal shutdown protection. The RS7212 is also compatible with low ESR ceramic capacitors which give added output stability. This stability can be maintained even during load fluctuations due to the excellent transient response of the chip. The RS7212 devices are available in SOT‐25 and VSON‐6 (2x2) packages. Features Applications ●
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Operating Voltages Range:+2.5V to +9.0V RS7212 With Fast Discharge Operating Voltage Range:+2.2V to +7.0V Output Voltages:+1.2V to +5.0V with 100mV Dropout Voltage:160mV@150mA Low Current Consumption 15μA (Typ.) Shutdown Current:0.1μA (Typ.) ±2% Output Voltage Accuracy (special ±1% highly accurate) Low ESR Capacitor Compatible High Ripple Rejection:70dB Output Current Limit Protection (450mA) Short Circuit Protection (150mA) Thermal Overload Shutdown Protection Control Output ON/OFF Function SOT‐25 and VSON‐6 (2x2) Packages RoHS Compliant and 100% Lead (Pb)‐Free and Green (Halogen Free with Commercial Standard) Battery‐powered equipment Voltage regulator for microprocessor Voltage regulator for LAN cards Wireless Communication equipment Audio/Video equipment Post Regulator for Switching Power Home Electric/Electronic Appliance CDMA/GSM Cellular Handsets Laptop, Palmtops, Notebook Computers Portable Information Application Application Circuits This integrated circuit can be damaged by ESD. Orister Corporation recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. DS‐RS7212‐02 September, 2009 www.Orister.com
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Pin Assignment SOT‐25 VSON‐6 (2x2) PACKAGE SOT‐25 PIN 1 2 3 4 5 SYMBOL VIN GND EN NC VOUT DESCRIPTION Regulator Input Pin Ground Pin Chip Enable Pin No Connection Regulator Output Pin PIN 1 2, 5 3, EP 4 6 SYMBOL VOUT NC GND EN VIN DESCRIPTION Regulator Output Pin No Connection Ground Pin Chip Enable Pin Regulator Input Pin PACKAGE VSON‐6 (2x2) Ordering Information DEVICE RS7212‐XX YY Z DEVICE CODE XX is nominal output voltage (for example, 15 = 1.5V, 33 = 3.3V, 285 = 2.85V). YY is package designator : NE : SOT‐25 VF : VSON‐6 (2x2) Z is Lead Free designator : P: Commercial Standard, Lead (Pb) Free and Phosphorous (P) Free Package G: Green (Halogen Free with Commercial Standard) Block Diagram DS‐RS7212‐02 September, 2009 www.Orister.com
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Absolute Maximum Ratings Parameter Input Voltage VIN to GND Output Current Limit, I(LIMIT) Junction Temperature Thermal Resistance Symbol VIN ILIMIT TJ θJA SOT‐25 SOT‐25 Power Dissipation VSON‐6 (2x2) Operating Ambient Temperature Storage Temperature Lead Temperature (soldering, 10sec) PD TOPR TSTG ‐ Ratings 7.0 0.5 +155 250 400 500 ‐40 ~ +125 ‐55~+150 +260 Units
V A o
C o
C/W
mW o
C C o
C o
NOTES: 1
The power dissipation values are based on the condition that junction temperature TJ and ambient temperature TA difference is 100°C. 2
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and function operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute‐maximum –rated conditions for extended periods may affect device reliability. 3
The power dissipation of VSON‐6 (2x2) would be 500mW normally with the 0.5X0.5 square inches cooper area connected to the bottom pad. However, it could be up to 1000mW with larger cooper area. Electrical Characteristics (VIN=5V, TA=25°C, unless otherwise specified) Symbol VIN VOUT IMAX VDROP Parameter Input Voltage Output Voltage Output Current (see NOTE 1) Dropout Voltage ΔVLINE Line Regulation ΔVLOAD Load Regulation IQ Ground Pin Current ISD VIH VIL IEN ISC Shutdown Current EN Pin Input Voltage “H” EN Pin Input Voltage “L” EN Pin Leakage Current Short Circuit Current PSRR Ripple Rejection Conditions ‐ VIN = VOUT+0.8V VOUT+0.8V≦VIN≦7.0V, 2.2V≦VIN IOUT=150mA, 2.8V≦VIN VOUT+0.5V≦VIN≦7V, IOUT=1mA VOUT+0.15V≦VIN≦5V,IOUT=1mA, VIN≧2.8V VIN=VOUT+1V, 1mA≦IOUT≦100mA VIN=5V, EN=5V, No Load VIN=5V, EN=5V, IOUT=150mA VIN=VOUT+1V, EN=0V, No Load (see NOTE 2,3) (see NOTE 2) VIN=(VOUT+0.15) to 5V, VEN > VIH ‐ IOUT=30mA, F=1KHz IOUT=30mA, F=10KHz IOUT=100mA , F=1KHz, COUT=10uF ‐ ‐ Min. 2.2 ‐2% 300 ‐ ‐ ‐ ‐ ‐ ‐ ‐ 2.0 ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ Typ. ‐ VOUT ‐ 160 0.2 ‐ 0.01 15 30 0.1 ‐ ‐ 0.1 150 70 65 40 150 20 Max.
7.0 +2% ‐ 180 0.3 0.2 0.02 30 60 1.0 ‐ 0.3 0.15 ‐ ‐ ‐ ‐ ‐ ‐ Unit V V mA mV %/V %/mA
uA uA V V uA mA dB eN Output Noise uV(rms)
o
TSD Thermal Shutdown Temperature C o
THYS Thermal Shutdown Hysteresis C NOTES: 1
Measured using a double sided board with 1” x 2” square inches of copper area connected to the GND pins for “heat spreading”. 2
EN pin input voltage must be always less than or equal to input voltage. 3
EN Pin with internal pull high resistor is about several hundreds of KΩ for RS7212 only. DS‐RS7212‐02 September, 2009 www.Orister.com
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Detail Description The RS7212 is a low‐dropout linear regulator. The device provides preset 2.5V, 2.85V and 3.3V output voltages for output current up to 150mA. Other mask options for special output voltages from 1.2V to 5.0V with 100mV increment are also available. As illustrated in function block diagram, it consists of a 1.0V reference, error amplifier, a P‐channel pass transistor, an ON/OFF control logic and an internal feedback voltage divider. The 1.0V band gap reference is connected to the error amplifier, which compares this reference with the feedback voltage and amplifies the voltage difference. If the feedback voltage is lower than the reference voltage, the pass‐transistor gate is pulled lower, which allows more current to pass to the output pin and increases the output voltage. If the feedback voltage is too high, the pass transistor gate is pulled up to decrease the output voltage. The output voltage is feed back through an internal resistive divider connected to VOUT pin. Additional blocks include an output current limiter, thermal sensor, and shutdown logic. Internal P‐channel Pass Transistor The RS7212 features a P‐channel MOSFET pass transistor. Unlike similar designs using PNP pass transistors, P‐channel MOSFETs require no base drive, which reduces quiescent current. PNP based regulators also waste considerable current in dropout when the pass transistor saturates, and use high base‐drive currents under large loads. The RS7212 does not suffer from these problems and consumes only 15μA (Typ.) of current consumption under heavy loads as well as in dropout conditions. Enable Function EN pin starts and stops the regulator. When the EN pin is switched to the power off level, the operation of all internal circuit stops, the build‐in P‐channel MOSFET output transistor between pins VIN and VOUT is switched off, allowing current consumption to be drastically reduced. The VOUT pin enters the GND level through the internal discharge path between VOUT and GND pins. Output Voltage Selection The RS7212 output voltage is preset at an internally trimmed voltage 2.5V, 2.85V or 3.3V. The output voltage also can be mask‐optioned from 1.2V to 5.0V with 100mV increment by special order. The first two digits of part number suffix identify the output voltage (see Ordering Information). For example, the RS7212‐33 has a preset 3.3V output voltage. Current Limit The RS7212 also includes a fold back current limiter. It monitors and controls the pass transistor’s gate voltage, estimates the output current, and limits the output current within 0.5A. Thermal Overload Protection Thermal overload protection limits total power dissipation in the RS7212. When the junction temperature exceeds TJ=+150°C, a thermal sensor turns off the pass transistor, allowing the IC to cool down. The thermal sensor turns the pass transistor on again after the junction temperature cools down by 20°C, resulting in a pulsed output during continuous thermal overload conditions. Thermal overload protection is designed to protect the RS7212 in the event of fault conditions. For continuous operation, the absolute maximum operating junction temperature rating of TJ=+125°C should not be exceeded. Operating Region and Power Dissipation Maximum power dissipation of the RS7212 depends on the thermal resistance of the case and circuit board, the temperature difference between the die junction and ambient air, and the rate of airflow. The power dissipation across the devices is P = IOUT x (VIN‐VOUT). The resulting maximum power dissipation is: PMAX =
DS‐RS7212‐02 September, 2009 (TJ − TA ) (TJ − TA )
=
θJC + θCA
θJA
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Where (TJ‐TA) is the temperature difference between the RS7212 die junction and the surrounding air, θJC is the thermal resistance of the package chosen, and θCA is the thermal resistance through the printed circuit board, copper traces and other materials to the surrounding air. For better heat‐sinking, the copper area should be equally shared between the VIN, VOUT, and GND pins. The thermal resistance θJA of SOT‐25 package of RS7212 is 250°C/W. Based on a maximum operating junction temperature 125°C with an ambient of 25°C, the maximum power dissipation will be: PMAX =
(TJ − TA ) (125 − 25 )
=
= 0.40W 250
θJC + θCA
Thermal characteristics were measured using a double sided board with 1”x2” square inches of copper area connected to the GND pin for “heat spreading”. Dropout Voltage A regulator’s minimum input‐output voltage differential, or dropout voltage, determines the lowest usable supply voltage. In battery‐powered systems, this will determine the useful end‐of‐life battery voltage. The RS7212 use a P‐ channel MOSFET pass transistor, its dropout voltage is a function of drain‐to‐source on‐resistance RDS(ON) multiplied by the load current. VDROPOUT = VIN −VOUT = RDS (ON ) × IOUT
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Typical Operating Characteristics (1) Output Voltage vs. Output Current DS‐RS7212‐02 September, 2009 www.Orister.com
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(1) Output Voltage vs. Output Current (Continued) DS‐RS7212‐02 September, 2009 www.Orister.com
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(2) Dropout Voltage vs. Output Current DS‐RS7212‐02 September, 2009 www.Orister.com
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(3) Supply Current vs. Input Voltage DS‐RS7212‐02 September, 2009 www.Orister.com
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(4) Supply Current vs. Ambient Temperature DS‐RS7212‐02 September, 2009 www.Orister.com
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(5) Output Voltage vs. Ambient Temperature (6) Supply Current vs. Output Current DS‐RS7212‐02 September, 2009 www.Orister.com
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(7) Output Voltage vs. Input Voltage DS‐RS7212‐02 September, 2009 www.Orister.com
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SOT‐25 Dimension NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion. D. Falls within JEDEC MO‐193 variation AB (5 pin). DS‐RS7212‐02 September, 2009 www.Orister.com
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VSON‐6 (2x2) Dimension NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Small Outline No‐Lead (SON) package configuration. D. The package thermal pad must be soldered to the board for thermal and mechanical performance. DS‐RS7212‐02 September, 2009 www.Orister.com
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Soldering Methods for Orister’s Products 1. Storage environment: Temperature=10oC~35oC Humidity=65%±15% 2. Reflow soldering of surface‐mount devices Figure 1: Temperature profile tP
Critical Zone
TL to TP
TP
Ramp-up
TL
tL
Temperature
Tsmax
Tsmin
tS
Preheat
25
Ramp-down
t 25oC to Peak
Time
Profile Feature Average ramp‐up rate (TL to TP) Sn‐Pb Eutectic Assembly o
<3 C/sec Preheat Pb‐Free Assembly <3oC/sec ‐ Temperature Min (Tsmin) 100oC 150oC ‐ Temperature Max (Tsmax) 150oC 200oC 60~120 sec 60~180 sec ‐ Time (min to max) (ts) Tsmax to TL ‐ Ramp‐up Rate o
<3 C/sec <3 C/sec Time maintained above: ‐ Temperature (TL) ‐ Time (tL) o
217oC 183 C 60~150 sec Peak Temperature (TP) Time within 5oC of actual Peak Temperature (tP) Ramp‐down Rate Time 25oC to Peak Temperature o
o
o
60~150 sec 240 C +0/‐5 C 260oC +0/‐5oC 10~30 sec 20~40 sec <6oC/sec <6oC/sec <6 minutes <8 minutes Peak temperature Dipping time 3. Flow (wave) soldering (solder dipping) Products Pb devices. Pb‐Free devices. o
o
245 C ±5 C o
o
260 C +0/‐5 C 5sec ±1sec 5sec ±1sec DS‐RS7212‐02 September, 2009 www.Orister.com
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Important Notice: © Orister Corporation Orister cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an Orister product. No circuit patent licenses, copyrights, mask work rights, or other intellectual property rights are implied. Orister reserves the right to make changes to their products or specifications or to discontinue any product or service without notice. Except as provided in Orister’s terms and conditions of sale, Orister assumes no liability whatsoever, and Orister disclaims any express or implied warranty relating to the sale and/or use of Orister products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. Testing and other quality control techniques are utilized to the extent Orister deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed. Orister and the Orister logo are trademarks of Orister Corporation. All other brand and product names appearing in this document are registered trademarks or trademarks of their respective holders. DS‐RS7212‐02 September, 2009 www.Orister.com