RT8078A 4A, 1MHz, Synchronous Step-Down Converter General Description Features The RT8078A is a high efficiency synchronous, step-down DC/DC converter. It's input voltage range from 2.7V to 5.5V that provides an adjustable regulated output voltage from 0.6V to VIN while delivering up to 4A of output current. The internal synchronous low on-resistance power switches increase efficiency and eliminate the need for an external Schottky diode. The switching frequency is fixed internally at 1MHz. The 100% duty cycle provides low dropout operation, hence extending battery life in portable systems. Current mode operation with internal compensation allows the transient response to be optimized over a wide range of loads and output capacitors. The RT8078A is operated in PWM mode to achieve high efficiency for a wide load range. The RT8078A is available in WDFN-10L 3x3 and SOP-8 (Exposed Pad) packages. z High Efficiency : Up to 95% z Fixed Frequency : 1MHz No Schottky Diode Required Internal Compensation 0.6V Reference Allows Low Output Voltage PWM Mode Operation Low Dropout Operation : 100% Duty Cycle OCP, UVP, OVP, OTP RoHS Compliant and Halogen Free z z z z z z z Applications z z z z z Ordering Information z Portable Instruments Battery Powered Equipment Notebook Computers Distributed Power Systems IP Phones Digital Cameras RT8078A Lead Plating System G : Green (Halogen Free and Pb Free) Z : ECO (Ecological Element with Halogen Free and Pb free) Pin Configurations (TOP VIEW) LX LX LX PGOOD EN Note : 1 2 3 4 5 GND Package Type QW : WDFN-10L 3x3 (W-Type) SP : SOP-8 (Exposed Pad-Option 2) 11 10 9 8 7 6 PVIN PVIN SVIN NC FB WDFN-10L 3x3 Richtek products are : RoHS compliant and compatible with the current require- LX ments of IPC/JEDEC J-STD-020. LX 2 PGOOD 3 Suitable for use in SnPb or Pb-free soldering processes. EN 8 7 GND 6 9 4 5 PVIN PVIN SVIN FB SOP-8 (Exposed Pad) DS8078A-01 June 2011 www.richtek.com 1 RT8078A Marking Information RT8078AGQW RT8078AGSP 42= : Product Code RT8078AGSP : Product Number RT8078A GSPYMDNN YMDNN : Date Code 42=YM DNN RT8078AZQW YMDNN : Date Code RT8078AZSP RT8078AZSP : Product Number 42 : Product Code 42 YM DNN RT8078A ZSPYMDNN YMDNN : Date Code YMDNN : Date Code Typical Application Circuit LOUT RT8078A PGOOD PGOOD LX VOUT COUT R1 R1 PVIN VIN CIN SVIN CFF FB C1 R2 Chip Enable GND EN Table 1. Recommended Component Selection VOUT (V) R1 (kΩ) R2 (kΩ) CFF (pF) L (μH) COUT (μF) 3.3 229.5 51 22 2 22 x 2 2.5 161.5 51 22 2 22 x 2 1.8 102 51 22 1.5 22 x 2 1.5 76.5 51 22 1.5 22 x 2 1.2 51 51 22 1.5 22 x 2 1.0 34 51 22 1.5 22 x 2 www.richtek.com 2 DS8078A-01 June 2011 RT8078A Functional Pin Description Pin No. WDFN-10L 3x3 1, 2, 3 Pin SOP-8 Name (Exposed Pad) 1, 2 LX Pin Function Switch Node. Connect this pin to the inductor. 4 3 PGOOD Power Good Indicator. This pin is an open drain logic output that is pulled to ground when the output voltage is less than 90% of the target output voltage. Hysteresis = 5%. 5 4 EN Enable Control. Pull high to turn on. Do not float. 6 5 FB Feedback Pin. This pin receives the feedback voltage from a resistive voltage divider connected across the output. 7 -- NC 8 6 SVIN 9,10 7,8 PVIN No Internal Connection. Signal Input Pin. Decouple this pin to GND with at least 1μF ceramic cap. Power Input Pin. Decouple this pin to GND with at least 4.7μF ceramic cap. Ground. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. 11 9 GND (Exposed Pad) (Exposed Pad) Function Block Diagram EN EN PVIN ISEN PGOOD 0.6V FB EA Slope Com OSC PGOOD OC Limit Output Clamp Driver Int-SS LX 0.72V 0.54V POR 0.2V Control Logic OV PG NISEN Zero Current UV VREF OTP SVIN DS8078A-01 June 2011 www.richtek.com 3 RT8078A Absolute Maximum Ratings (Note 1) Supply Input Voltage, PVIN, SVIN ----------------------------------------------------------------------------LX Pin Voltages ---------------------------------------------------------------------------------------------------z Other I/O Pin Voltage --------------------------------------------------------------------------------------------z Power Dissipation, PD @ TA = 25°C WDFN-10L 3x3 ----------------------------------------------------------------------------------------------------SOP-8 (Exposed Pad) -------------------------------------------------------------------------------------------z Package Thermal Resistance (Note 2) WDFN-10L 3x3, θJA -----------------------------------------------------------------------------------------------WDFN-10L 3x3, θJC ----------------------------------------------------------------------------------------------SOP-8 (Exposed Pad), θJA -------------------------------------------------------------------------------------SOP-8 (Exposed Pad), θJC -------------------------------------------------------------------------------------z Lead Temperature (Soldering, 10 sec.) ----------------------------------------------------------------------z Junction Temperature --------------------------------------------------------------------------------------------z Storage Temperature Range ------------------------------------------------------------------------------------z ESD Susceptibility (Note 3) HBM (Human Body Mode) --------------------------------------------------------------------------------------MM (Machine Mode) ---------------------------------------------------------------------------------------------z z Recommended Operating Conditions z z z −0.3V to 6.5V −0.3V to (VIN + 0.3V) −0.3V to 6.5V 1.429W 1.333W 70°C/W 8.2°C/W 75°C/W 15°C/W 260°C 150°C −65°C to 150°C 2kV 200V (Note 4) Supply Input Voltage, PVIN, SVIN ----------------------------------------------------------------------------- 2.7V to 5.5V Junction Temperature Range ------------------------------------------------------------------------------------ −40°C to 125°C Ambient Temperature Range ------------------------------------------------------------------------------------ −40°C to 85°C Electrical Characteristics (VIN = 3.3V, TA = 25°C, unless otherwise specified) Parameter Symbol Feedback Reference Voltage V REF Feedback Leakage Current IFB Test Conditions Active , VFB = 0.58V, Not Switching DC Bias Current Shutdown V IN = 2.7V to 5.5V IOUT = 0A IOUT = 0A to 4A Output Voltage Line Regulation Output Voltage Load Regulation Switch Leakage Current Switching Frequency Min Typ Max Unit 0.594 0.6 0.606 V -- 0.1 0.4 μA -- 110 -- μA -- -- 1 -- 0.3 -- %/V −2 -- 2 % -0.8 -1 1 1.2 μA MHz Switch On Resistance, High R DS(ON)_P V IN = 5V -- 69 -- mΩ Switch On Resistance, Low R DS(ON)_N V IN = 5V -- 49 -- mΩ P-MOSFET Current Limit ILIM Under Voltage Lockout Threshold EN Input Threshold Voltage V UVLO Logic-High V IH Logic-Low V IL V IN Rising V IN Falling 4.4 -- -- A --- 2.4 2.2 --- V 1.6 -- --- -0.4 V To be continued www.richtek.com 4 DS8078A-01 June 2011 RT8078A Parameter Symbol Test Conditions EN Pull Low Resistance Min Typ Max Unit -- 500 -- kΩ Over Temperature Protection TSD -- 150 -- °C Over Temperature Protection Hysteresis Soft-Start Time ΔT SD -- 20 -- °C 500 -- -- μs -- 100 -- Ω -- 120 -- % -- 33 -- % -- 90 -- % -- 5 -- % tSS VOUT Discharge Resistance VOUT Over Voltage Protection (Latch-Off, Delay Time = 10μs) VOUT Under Voltage Lock Out (Latch-Off) Power Good Measured FB, With Respect to VREF Power Good Hysteresis Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. θJA is measured in natural convection at TA = 25°C on a high effective thermal conductivity four-layer test board of JEDEC 51-7 thermal measurement standard. The measurement case position of θJC is on the exposed pad of the packages. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. DS8078A-01 June 2011 www.richtek.com 5 RT8078A Typical Operating Characteristics Efficiency vs. Output Current Output Voltage vs. Output Current 100 1.23 90 1.22 Output Voltage (V) Efficiency (%) 80 70 60 50 40 30 20 1.21 1.20 1.19 1.18 10 VIN = 5V, VOUT = 1.2V, IOUT = 0A to 4A VIN = 5V, VOUT = 1.2V, IOUT = 0A to 4A 0 1.17 0 0.5 1 1.5 2 2.5 3 3.5 4 0 0.5 1 1.5 1.5 0.65 1.4 0.64 1.3 0.63 Reference Voltage (V) Switching Frequency (MHz)1 2.5 3 3.5 4 Reference Voltage vs. Temperature Switching Frequency vs. Temperature 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.62 0.61 0.60 0.59 0.58 0.57 0.56 IOUT = 0.6A 0.5 0.55 -50 -25 0 25 50 75 100 125 -50 -25 0 Temperature (°C) 2.7 1.5 2.6 1.4 Enable Voltage (V) 1.6 Rising 2.4 2.3 2.2 Falling 2.1 1.0 1.8 0.6 50 Temperature (°C) www.richtek.com 6 75 100 125 Falling 0.9 0.7 25 125 1.1 1.9 0 100 Rising 1.2 0.8 -25 75 1.3 2.0 -50 50 Enable Voltage vs. Temperature 2.8 2.5 25 Temperature (°C) VIN UVLO Threshold vs. Temperature VIN UVLO Threshold (V) 2 Output Current (A) Output Current (A) -50 -25 0 25 50 75 100 125 Temperature (°C) DS8078A-01 June 2011 RT8078A Load Transient Response Switching VOUT (50mV/Div) VLX (5V/Div) IOUT (5A/Div) VOUT (5mV/Div) VIN = 5V, VOUT = 1.2V, IOUT = 1A to 4A VIN = 5V, VOUT = 1.2V, IOUT = 4A Time (100μs/Div) Time (500ns/Div) Power On from VIN Power Off from VIN VIN (5V/Div) VIN (5V/Div) VOUT (1V/Div) VPGOOD (10V/Div) VOUT (1V/Div) VPGOOD (10V/Div) IOUT (5A/Div) IOUT (5A/Div) VIN = 5V, VOUT = 1.2V, IOUT = 4A VIN = 5V, VOUT = 1.2V, IOUT = 4A Time (2.5ms/Div) Time (5ms/Div) Power On from EN Power Off from EN VEN (5V/Div) VEN (5V/Div) VOUT (1V/Div) VOUT (1V/Div) VPGOOD (5V/Div) IOUT (5A/Div) VPGOOD (5V/Div) VIN = 5V, VOUT = 1.2V, IOUT = 4A Time (500μs/Div) DS8078A-01 June 2011 IOUT (5A/Div) VIN = 5V, VOUT = 1.2V, IOUT = 4A Time (250μs/Div) www.richtek.com 7 RT8078A Application Information The RT8078A is a single-phase buck PWM converter. It provides single feedback loop, current mode control with fast transient response. An internal 0.6V reference allows the output voltage to be precisely regulated for low output voltage applications. A fixed switching frequency (1MHz) oscillator and internal compensation are integrated to minimize external component count. Main Control Loop During normal operation, the internal high side power switch (P-MOSFET) is turned on at the beginning of each clock cycle. Current in the inductor increases until the peak inductor current reaches the value defined by the output voltage (VCOMP) of the error amplifier. The error amplifier adjusts its output voltage by comparing the feedback signal from a resistive voltage divider on the FB pin with an internal 0.6V reference. When the load current increases, it causes a reduction in the feedback voltage relative to the reference. The error amplifier raises its output voltage until the average inductor current matches the new load current. Once the high side power MOSFET shuts off, the synchronous power switch (N-MOSFET) turns on until the beginning of the next clock cycle. Soft-Start The IC contains an internal soft-start function to prevent large inrush current and output voltage overshoot when the converter starts up. Soft-start automatically begins once the chip is enabled. During soft-start, the internal soft-start capacitor becomes charged and generates a linear ramping up voltage across the capacitor. This voltage clamps the voltage at the FB pin, causing the duty pulse width to increase slowly and in turn reduce the output surge current. Finally, the internal 0.6V reference takes over the loop control once the internal ramping-up voltage becomes higher than 0.6V. The minimum soft-start time for this IC is set at 500μs. Power Good Output The power good output is an open-drain output and requires a pull up resistor. When the output voltage is 85% below its set voltage, PGOOD will be pulled low. It is held low until the output voltage returns to within the allowed tolerances once more. During soft-start, PGOOD is actively held low and only allowed to transition high after soft-start is over and the output voltage has reached 90% of its set voltage. Output Voltage Setting Inductor Selection The output voltage is set by an external resistive voltage divider according to the following equation : R1 ⎞ ⎛ VOUT = VREF × ⎜ 1 + ⎟ R2 ⎠ ⎝ where VREF equals 0.6V (typ.). For a given input and output voltage, the inductor value and operating frequency determine the ripple current. The ripple current ΔIL increases with higher VIN and decreases with higher inductance. The resistive voltage divider allows the FB pin to sense a fraction of the output voltage as shown in Figure 1. VOUT R1 FB RT8078A R2 GND Figure 1. Setting the Output Voltage www.richtek.com 8 ⎤ V ⎡V ⎤ ⎡ ΔIL = ⎢ OUT ⎥ × ⎢1 − OUT ⎥ VIN ⎦ ⎣ f ×L ⎦ ⎣ Having a lower ripple current reduces not only the ESR losses in the output capacitors but also the output voltage ripple. Highest efficiency operation is achieved by reducing ripple current at low frequency, but a large inductor is required to attain this goal. For ripple current selection, the value of ΔIL = 0.4(IMAX) is a reasonable starting point. The largest ripple current occurs at the highest VIN. To guarantee that the ripple current stays below a specified maximum value, the inductor should be chosen according to the following equation : ⎡ VOUT ⎤ ⎡ VOUT ⎤ L= ⎢ ⎥ × ⎢1− ⎥ VIN(MAX) ⎦⎥ ⎣⎢ f × ΔIL(MAX) ⎦⎥ ⎣⎢ DS8078A-01 June 2011 RT8078A Using Ceramic Input and Output Capacitors Thermal Shutdown Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. However, care must be taken when these capacitors are used at the input and output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN large enough to damage the part. The device implements an internal thermal shutdown function when the junction temperature exceeds 150°C. The thermal shutdown disables the device until the junction temperature drops below the hysteresis (20°C typ.). Then, the device is re-enabled and automatically reinstates the power up sequence. Slope Compensation and Inductor Peak Current Slope compensation provides stability in constant frequency architectures by preventing sub-harmonic oscillations at duty cycles greater than 50%. It is accomplished internally by adding a compensating ramp to the inductor current signal. Normally, the maximum inductor peak current is reduced when slope compensation is added. In this IC, however, separated inductor current signal is used to monitor over current condition and this keeps the maximum output current relatively constant regardless of duty cycle. Over Voltage Protection The IC provides over voltage protection once the output voltage exceeds 120% of VOUT, The OVP function latches off the switching operation and can only be released by toggling EN threshold or cycling VIN. There is a 10μs delay built into the over voltage protection circuit to prevent false transition. Under Voltage Lockout Threshold The IC includes an input Under Voltage Lockout Protection (UVLO). If the input voltage exceeds the UVLO rising threshold voltage, the converter resets and prepares the PWM for operation. If the input voltage falls below the UVLO falling threshold voltage during normal operation, the device stops switching. The UVLO rising and falling threshold voltage includes a hysteresis to prevent noisecaused reset. DS8078A-01 June 2011 Thermal Considerations For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : PD(MAX) = (TJ(MAX) − TA) / θJA where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction to ambient thermal resistance. For recommended operating condition specifications of the RT8078A, the maximum junction temperature is 125°C and TA is the ambient temperature. The junction to ambient thermal resistance, θJA, is layout dependent. For SOP-8 (Exposed Pad) packages, the thermal resistance, θJA, is 75°C/W on a standard JEDEC 51-7 four-layer thermal test board. For WDFN-10L 3x3 packages, the thermal resistance, θJA, is 70° C/W on a standard JEDEC 51-7 four-layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by the following formulas : PD(MAX) = (125°C − 25°C) / (75°C/W) = 1.333W for SOP-8 (Exposed Pad) package PD(MAX) = (125°C − 25°C) / (70°C/W) = 1.429W for WDFN-10L 3x3 package The maximum power dissipation depends on the operating ambient temperature for fixed T J(MAX) and thermal resistance, θJA. For the RT8078A package, the derating curves in Figure 2 allow the designer to see the effect of rising ambient temperature on the maximum power dissipation. www.richtek.com 9 Maximum Power Dissipation (W)1 RT8078A 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 Layout Considerations Four-Layer PCB Follow the PCB layout guidelines for optimal performance of the IC. WDFN 10L 3x3 Place the terminal of the input capacitor(s), CIN, as close as possible to the VIN pin. This capacitor provides the AC current into the internal power MOSFETs. SOP-8 (Exposed Pad) LX node experiences high frequency voltage swing and should be kept within a small area. Keep all sensitive small-signal nodes away from the LX node to prevent stray capacitive noise pick up. 0 25 50 75 100 125 Connect the FB pin directly to the feedback resistors. The resistive voltage divider must be connected between VOUT and GND. Ambient Temperature (°C) Figure 2. Derating Curves for the RT8078A Packages Place the input and output capacitors as close to the IC as possible L1 LX should be connected LX to inductor by wide and LX short trace, and keep LX sensitive components PGOOD away from this trace EN COUT CIN 1 2 3 GND VOUT 4 5 11 10 9 8 7 6 PVIN PVIN SVIN VIN NC R1 FB VOUT R2 Place the feedback as close to the IC as possible Figure 3. PCB Layout Guide for WDFN-10L 3x3 Place the input and output capacitors as close to the IC as possible VOUT LX should be connected to inductor by wide and short trace, and keep sensitive components away from this trace COUT L1 CIN LX LX PGOOD EN 8 PVIN 7 GND 3 6 9 4 5 PVIN 2 SVIN FB VIN R1 VOUT R2 Place the feedback as close to the IC as possible Figure 4. PCB Layout Guide for SOP-8 (Exposed Pad) www.richtek.com 10 DS8078A-01 June 2011 RT8078A Outline Dimension D2 D L E E2 1 e SEE DETAIL A b 2 1 2 1 A A1 A3 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.180 0.300 0.007 0.012 D 2.950 3.050 0.116 0.120 D2 2.300 2.650 0.091 0.104 E 2.950 3.050 0.116 0.120 E2 1.500 1.750 0.059 0.069 e L 0.500 0.350 0.020 0.450 0.014 0.018 W-Type 10L DFN 3x3 Package DS8078A-01 June 2011 www.richtek.com 11 RT8078A H A M EXPOSED THERMAL PAD (Bottom of Package) Y J X B F C I D Dimensions In Millimeters Symbol Dimensions In Inches Min Max Min Max A 4.801 5.004 0.189 0.197 B 3.810 4.000 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.510 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.170 0.254 0.007 0.010 I 0.000 0.152 0.000 0.006 J 5.791 6.200 0.228 0.244 M 0.406 1.270 0.016 0.050 X 2.000 2.300 0.079 0.091 Y 2.000 2.300 0.079 0.091 X 2.100 2.500 0.083 0.098 Y 3.000 3.500 0.118 0.138 Option 1 Option 2 8-Lead SOP (Exposed Pad) Plastic Package Richtek Technology Corporation Richtek Technology Corporation Headquarter Taipei Office (Marketing) 5F, No. 20, Taiyuen Street, Chupei City 5F, No. 95, Minchiuan Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Tel: (8862)86672399 Fax: (8862)86672377 Email: [email protected] Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek. www.richtek.com 12 DS8078A-01 June 2011