RT9361A/B Tiny Package, High Performance, Regulated Charge Pump General Description Features The RT9361A/B is a high performance charge pump DC/DC converter that produces a regulated 4.5V and 5V output. No external inductor is required for operation. The operating voltage range is 2.8V to VOUT. Internal soft-start z circuitry effectively reduces the in-rush current both while start-up and mode change. z The RT9361A/B features very low quiescent current, over current protection and short circuit protection. The RT9361A/B is available in WDFN-6L 2x2, SOT-23-6 and TSOT-23-6 package. Ordering Information z z z z Input Voltage Range : 2.8V to VOUT Internal Soft Start Function 5V/4.5V Fixed Output Voltage Over Current Protection Function Short Circuit Protection Function RoHS Compliant and 100% Lead (Pb)-Free Applications z z z Mobile phone, Smart Phone LED Backlight Camera Flash White LED LCD Display Supply Pin Configurations RT9361A/B (TOP VIEW) Package Type E : SOT-23-6 J6 : TSOT-23-6 QW : WDFN-6L 2x2 (W-Type) Lead Plating System P : Pb Free G : Green (Halogen Free and Pb Free) Output Voltage A : 5V B : 4.5V Note : Richtek products are : ` RoHS compliant and compatible with the current require- CP VIN CN 6 5 4 2 3 VOUT GND EN SOT-23-6/TSOT-23-6 CP VIN CN 1 6 2 5 3 7 4 VOUT GND EN WDFN-6L 2x2 ments of IPC/JEDEC J-STD-020. ` Suitable for use in SnPb or Pb-free soldering processes. Marking Information For marking information, contact our sales representative directly or through a Richtek distributor located in your area. DS9361A/B-13 April 2011 www.richtek.com 1 RT9361A/B Typical Application Circuit CPUMP 6 CP 5 VIN VIN 3 EN 2.8V to VOUT VOUT 1 RT9361A/B CIN + 4 CN COUT RT9361A RT9361B R R GND LED 2 Part No. R Application Configuration LED LED CIN (μF) CPUMP (μF) COUT (μF) IOUT < 60mA @ V IN > 3.2V, 1 or 2.2 0.22 1 or 2.2 IOUT < 110mA @ V IN > 3.2V, 10 1 10 IOUT < 80mA @ V IN > 3.2V, 1 or 2.2 0.22 1 or 2.2 IOUT < 150mA @ V IN > 3.2V, 10 1 10 Functional Pin Description Pin Number T/SOT-23-6 1 2 WDFN-6L 2x2 6 Pin Name VOUT Pin Function Output Voltage 5, GND Exposed Pad (7) Ground. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. 3 4 EN Chip Enable (Active High) 4 3 CN Flying Capacitor Negative Terminal 5 2 VIN Power Input Voltage 6 1 CP Flying Capacitor Positive Terminal Function Block Diagram CP CN VIN VOUT + EN 1MHz OSC - GND Load Disconnect Voltage Reference www.richtek.com 2 VREF Current Bias Short Circuit Protection DS9361A/B-13 April 2011 RT9361A/B Absolute Maximum Ratings z z z z z z z z (Note 1) Supply Input Voltage -----------------------------------------------------------------------------------------------------Other I/O Pin Voltages --------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C T/SOT-23-6 -----------------------------------------------------------------------------------------------------------------WDFN-6L 2x2 -------------------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2) T/SOT-23-6, θJA -----------------------------------------------------------------------------------------------------------WDFN-6L 2x2, θJA --------------------------------------------------------------------------------------------------------Junction Temperature ----------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------------ESD Susceptibility (Note 3) HBM (Human Body Mode) ---------------------------------------------------------------------------------------------MM (Machine Mode) ------------------------------------------------------------------------------------------------------ Recommended Operating Conditions z z −0.3V to 6V −0.3V to 6V 0.4W 0.606W 250°C/W 265°C/W 150°C 260°C −65°C to 150°C 2kV 200V (Note 4) Ambient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C Electrical Characteristics (VIN = 3.7V, TA = 25°C, unless otherwise specified) Parameter Symbol Operation Voltage Range VIN Output Voltage VOUT Quiescent Current IQ Maximum Output Current IOUT OCP IOCP Test Conditions Min Typ Max Unit VOUT = 5V 2.8 -- V OUT V RT9361A , VIN>3.2V, IOUT<110mA 4.8 5 5.2 V RT9361B , VIN>3.2V ,IOUT<150mA 4.32 4.5 4.68 V -- 2 4 mA RT9361A , VIN>3.2V, CPUMP = 1μF 110 -- -- RT9361B , VIN>3.2V, CPUMP = 1μF 150 -- -- 250 350 500 mA -- 60 90 mA IOUT = 60mA, COUT = 2.2μF -- 30 -- mV VIN = 4.5V, VEN<0.4V -- 0.1 1 μA IOUT = 0, Short Circuit Current Output Ripple mA Shut Down Current ISHDN Operation Frequency FOSC 0.8 1 1.3 MHz Digital Input High Level VIH 1.5 -- -- V Digital Input Low Level VIL -- -- 0.4 V DS9361A/B-13 April 2011 www.richtek.com 3 RT9361A/B Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. θJA is measured in the natural convection at TA = 25°C on the single layer low effective thermal conductivity test board of JEDEC 51-3 thermal measurement standard. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. www.richtek.com 4 DS9361A/B-13 April 2011 RT9361A/B Typical Operating Characteristics (For RT9361A, CIN = COUT = 2.2μF, CPUMP = 0.22μF, TA = 25°C, unless otherwise specified ) Quiescent Current vs. Input Voltage Output Voltage vs. Output Current 1.7 5.1 VIN VIN VIN VIN 4.9 4.8 = 3.2V = 3.7V = 4.3V = 5V Quiescent Current (mA) Output Voltage (V) 5 4.7 4.6 4.5 1.6 TA = 85°C 1.5 TA = 25°C 1.4 TA = -20°C 1.3 1.2 TA = -40°C 1.1 1 4.4 10 20 30 40 50 60 70 2.8 80 3 3.2 3.4 3.6 3.8 Output Current (mA) 4 4.2 4.4 4.6 4.8 5 Input Voltage (V) Output Voltage vs. Input Voltage Output Voltage vs. Input Voltage 5.08 5.1 TA = 85°C 5 5 Output Voltage (V) Output Voltage (V) 5.04 TA = 25°C 4.96 TA = -40°C 4.92 4.88 IOUT = 10mA IOUT = 20mA IOUT = 30mA IOUT = 40mA IOUT = 50mA IOUT = 60mA IOUT = 70mA IOUT = 80mA 4.9 4.8 4.7 4.6 4.84 IOUT = 60mA 4.8 2.75 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 4.5 2.75 Input Voltage (V) Operation Frequency (MHz) Output Voltage (V) 3.75 4 4.25 4.5 4.75 5 1.4 IOUT = 0mA 5.065 5.06 5.055 3.5 Operation Frequency vs. Temperature Output Voltage vs. Temperature 5.07 3.25 Input Voltage (V) 5.08 5.075 3 IOUT = 60mA 5.05 5.045 5.04 5.035 1.3 IOUT = 60mA 1.2 1.1 IOUT = 0mA 1 0.9 0.8 5.03 -40 -30 -20 -10 0 10 20 30 40 Temperature (°C) DS9361A/B-13 April 2011 50 60 70 80 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 Temperature (°C) www.richtek.com 5 RT9361A/B Efficiency vs. Input Voltage Efficiency vs. Output Curent 0.85 85 1001 VIN = 3V 0.8 80 0.9 90 VIN = 3.4V 0.7 70 0.65 65 0.6 60 VIN = 4.2V 0.55 55 0.8 80 Efficiency (%) Efficiency (%) 0.75 75 0.7 70 0.6 60 0.5 50 50 0.5 0.45 45 IOUT IOUT IOUT IOUT IOUT IOUT = = = = = = 10mA 20mA 30mA 40mA 50mA 60mA 40 0.4 0.4 40 10 15 20 25 30 35 40 45 50 55 60 2.75 3 3.25 3.5 Output Curent (mA) 4.75 5 4.75 5 1.3 1.3 1.2 TA = -40°C 1.2 VIL (V) VIH (V) 4.5 1.4 1.4 TA = 25°C 1.1 TA = -40°C 1.1 1 TA = 85°C 1 TA = 25°C TA = 85°C 0.9 0.9 0.8 2.75 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 0.8 2.75 3 3.25 3.5 3.75 4 4.25 Input Voltage (V) Input Voltage (V) Inrush Current Inrush Current VIN (2V/Div) (2V/Div) 4.5 (2V/Div) (2V/Div) VOUT I IN 4.25 VIL vs. Input Voltage VIH vs. Input Voltage EN 4 Input Voltage (V) 1.5 VIN 3.75 VOUT (2V/Div) (2V/Div) EN (500mA/Div) (500mA/Div) I IN VIN = 2.8V, IOUT = 60mA Time (40μs/Div) www.richtek.com 6 VIN = 5V, IOUT = 60mA Time (40μs/Div) DS9361A/B-13 April 2011 RT9361A/B Normal Operation VIN Normal Operation VIN (1V/Div) VOUT VOUT (2V/Div) (2V/Div) (2V/Div) (2V/Div) (2V/Div) CN CN IOUT (50mA/Div) (50mA/Div) VIN = 2.8V, IOU T = 60mA VOUT Time (400ns/Div) Time (400ns/Div) Dimming Operation Dimming Operation (2V/Div) (2V/Div) (2V/Div) PWM I IN (50mA/Div) VIN = 3.7V Time (40μs/Div) Refer to Application Informatiom “Figure 1” VIN VIN = 5V, IOUT = 60mA (2V/Div) VIN (2V/Div) VOUT (2V/Div) PWM I IN (50mA/Div) VIN = 3.7V Time (10ms/Div) Maximum Output Current (mA) Maximum Output Current vs. Input Voltage 160 150 140 130 120 110 100 90 80 70 60 50 40 30 20 10 0 TA = -40°C TA = -20°C TA = 25°C TA = 85°C 2.8 3 3.2 3.4 3.6 3.8 4 4.2 4.4 4.6 4.8 5 Input Voltage (V) DS9361A/B-13 April 2011 www.richtek.com 7 Refer to Application Informatiom “Figure 1” IOUT RT9361A/B Application Information Capacitor Selection CPUMP 0.22µF Careful selection of the three external capacitors CIN, COUT and CPUMP is very important because they will affect rampup time, output ripple and transient performance. Optimum performance will be obtained when low ESR (<100mΩ) ceramic capacitors are used for CIN and COUT and CPUMP. In general, low ESR may be defined as less than 100mΩ. In all cases, X7R or X5R dielectric are recommended. For particular application, low ESR Tantalum capacitors may be substituted; however optimum output ripple performance may not be realized. Aluminum electrolytic capacitors are not recommended for using with the RT9361A/B due the their inherent high ESR characteristic. In general, lower values for CIN, COUT and CPUMP may be utilized for light load current applications (<60mA). Drawing a load current of 60mA or less may use a CIN and COUT capacitor value as low as 2.2μF and a CPUMP value of 0.22μF. CIN and COUT may range from 1μF for light loads to 10μF for heavy output load conditions (<110mA). CPUMP may range from 0.22μF for light loads to 1μF for heavy output load conditions. If CPUMP is increased, COUT should also be increased by the same ratio to minimize output ripple. As a basic rule, the ratio between CIN, COUT and CPUMP should be approximately 10 to 1. Lowering the CIN, COUT and CPUMP value can decrease the ramp-up time of VOUT, but it will increase the output ripple oppositely. CPUMP 0.22µF CIN 2.2µF VIN + CP CN VIN VOUT RT9361A/B EN CIN 2.2µF VIN R 100 R 100 R 100 LED 20mA LED 20mA LED 20mA CN VIN VOUT COUT 2.2µF VOUT 4.5V/150mA RT9361A/B + EN R R R LED LED LED GND Figure 2. Application Circuits for Flash LEDs CPUMP 1µF CIN 10µF VIN CP CN VIN VOUT EN VOUT 5V/110mA L 1µH RT9361A/B + COUT 10µF GND 1µF Figure 3. Application Circuits for Constant Load CPUMP 0.22µF CIN 10µF VIN + 3.3V COUT 2.2µF CP CP CN VIN VOUT RT9361A/B EN GND VOUT 5V/180mA COUT 10µF CPUMP 0.22µF GND CP CN VIN VOUT RT9361A/B Figure 1. Application Circuits for Backlight Dimming EN GND Figure 4. Application Circuits for Doubling the Output Current www.richtek.com 8 DS9361A/B-13 April 2011 RT9361A/B Efficiency The approximate efficiency is given by : Efficiency (%) = = VOUT × IOUT POUT × 100 = × 100 PIN VIN × 2IOUT VOUT × 100 − − − (×2 Charge Pump Operating Mode) 2VIN For a charge pump with an output of 5 volts and a nominal input of 3 volts, the theoretical efficiency is 83.33%. Due to internal switching losses and IC quiescent current consumption, the actual efficiency can be measured as 82.72%. Thermal Considerations The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula : PD(MAX) = ( TJ(MAX) - TA ) / θJA Where T J(MAX) is the maximum operation junction temperature 125°C, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. 0.8 Single Layer PCB 0.7 Power Dissipation (W) The efficiency of the charge pump regulator varies with the output voltage version, the applied input voltage, the load current, and the internal operation mode of the device. T/SOT-23-6 0.6 0.5 0.4 WDFN-6L 2x2 0.3 0.2 0.1 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 5. Derating Curves for RT9361 Packages PCB Board Layout The RT9361A/B is a high-frequency switched-capacitor converter, and therefore large transient currents will flow in VIN and VOUT. For best performance and to minimize ripple, place all of the components as close to IC as possible. Besides a solid ground plane is recommended on the bottom layer of the PCB. The ground of CIN and COUT should be connected together and as close to the IC as possible. Figure 6 and Figure 7 shows the typical PCB layout of RT9361A/B EVB board. For recommended operating conditions specification of RT9361, where T J(MAX) is the maximum junction temperature of the die (125°C) and TA is the operated ambient temperature. The junction to ambient thermal resistance θJA for T/SOT-23-6 is 250°C/W and WDFN-6L 2x2 is 165°C/W on the standard JEDEC 51-3 single layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by following formula : P D(MAX) = (125°C − 25°C) / 250°C/W = 0.4W for T/SOT-23-6 packages Figure 6 PD(MAX) = (125°C − 25°C) / 165°C/W = 0.606W for WDFN-6L 2x2 packages The maximum power dissipation depends on operating ambient temperature for fixed T J(MAX) and thermal resistance θJA. For RT9361 packages, the Figure 5 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed. Figure 7 DS9361A/B-13 April 2011 www.richtek.com 9 RT9361A/B Outline Dimension H D L C B b A A1 e Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.889 1.295 0.031 0.051 A1 0.000 0.152 0.000 0.006 B 1.397 1.803 0.055 0.071 b 0.250 0.560 0.010 0.022 C 2.591 2.997 0.102 0.118 D 2.692 3.099 0.106 0.122 e 0.838 1.041 0.033 0.041 H 0.080 0.254 0.003 0.010 L 0.300 0.610 0.012 0.024 SOT-23-6 Surface Mount Package www.richtek.com 10 DS9361A/B-13 April 2011 RT9361A/B H D L C B b A A1 e Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.700 1.000 0.028 0.039 A1 0.000 0.100 0.000 0.004 B 1.397 1.803 0.055 0.071 b 0.300 0.559 0.012 0.022 C 2.591 3.000 0.102 0.118 D 2.692 3.099 0.106 0.122 e 0.838 1.041 0.033 0.041 H 0.080 0.254 0.003 0.010 L 0.300 0.610 0.012 0.024 TSOT-23-6 Surface Mount Package DS9361A/B-13 April 2011 www.richtek.com 11 RT9361A/B D2 D L E E2 1 SEE DETAIL A 2 e 2 1 b A A1 1 DETAIL A Pin #1 ID and Tie Bar Mark Options A3 Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.200 0.350 0.008 0.014 D 1.950 2.050 0.077 0.081 D2 1.000 1.450 0.039 0.057 E 1.950 2.050 0.077 0.081 E2 0.500 0.850 0.020 0.033 e L 0.650 0.300 0.026 0.400 0.012 0.016 W-Type 6L DFN 2x2 Package Richtek Technology Corporation Richtek Technology Corporation Headquarter Taipei Office (Marketing) 5F, No. 20, Taiyuen Street, Chupei City 5F, No. 95, Minchiuan Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Tel: (8862)86672399 Fax: (8862)86672377 Email: [email protected] Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek. www.richtek.com 12 DS9361A/B-13 April 2011