TD9944 Dual N-Channel Enhancement-Mode Vertical DMOS FET Features General Description ► ► ► ► ► ► ► ► This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Dual N-channel devices Low threshold – 2.0V max. High input impedance Low input capacitance – 125pF max. Fast switching speeds Low on-resistance Free from secondary breakdown Low input and output leakage Applications ► ► ► ► ► ► ► Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Logic level interfaces – ideal for TTL and CMOS Solid state relays Battery operated systems Photo voltaic drives Analog switches General purpose line drivers Telecom switches Ordering Information Package Option Device TD9944 RDS(ON) ID(ON) VGS(th) (V) (max) (Ω) (min) (A) (max) (V) 240 6.0 1.0 2.0 8-Lead SOIC BVDSS/BVDGS TD9944TG-G 4.90x3.90mm body 1.75mm height (max) 1.27mm pitch -G indicates package is RoHS compliant (‘Green’) Pin Configuration D1 D1 D2 D2 Absolute Maximum Ratings Parameter Value Drain-to-source voltage BVDSS Drain-to-gate voltage BVDGS Gate-to-source voltage ±20V Operating and storage temperature Soldering temperature* -55 C to +150OC O 300OC Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. * S1 G1 S2 G2 8-Lead SOIC (TG) Product Marking TD99 44TG YYWW YY = Year Sealed WW = Week Sealed = “Green” Packaging Package may or may not include the following marks: Si or 8-Lead SOIC (TG) Distance of 1.6mm from case for 10 seconds. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com TD9944 Electrical Characteristics (T A = 25OC unless otherwise specified) Sym Parameter Min Typ Max Units BVDSS Drain-to-source breakdown voltage 240 - - V VGS = 0V, ID = 2.0mA VGS(th) Gate threshold voltage 0.6 - 2.0 V VGS = VDS, ID= 1.0mA Change in VGS(th) with temperature - - -5.0 IGSS Gate body leakage - - 100 nA VGS = ± 20V, VDS = 0V - - 10 µA IDSS Zero gate voltage drain current VGS = 0V, VDS = Max Rating - - 1.0 mA VDS = 0.8Max Rating, VGS = 0V, TA = 125°C ID(ON) ON-state drain current 0.5 1.9 - 1.0 2.8 - - 4.0 6.0 - 4.0 6.0 - - 1.4 300 600 - ΔVGS(th) RDS(ON) ΔRDS(ON) Static drain-to-source on-state resistance Change in RDS(ON) with temperature Conditions mV/OC VGS = VDS, ID= 1.0mA A Ω %/ C O VGS = 4.5V, VDS = 25V VGS = 10V, VDS = 25V VGS = 4.5V, ID = 250mA VGS = 10V, ID = 0.5A VGS = 10V, ID = 0.5A GFS Forward transductance CISS Input capacitance - 65 125 COSS Common source output capacitance - 35 70 CRSS Reverse transfer capacitance - 10 25 td(ON) Turn-on delay time - - 10 Rise time - - 10 Turn-off delay time - - 20 Fall time - - 20 Diode forward voltage drop - - 1.8 V VGS = 0V, ISD = 1.0A Reverse recovery time - 300 - ns VGS = 0V, ISD = 1.0A tr td(OFF) tf VSD trr mmho VDS = 20V, ID = 0.5A pF ns VGS = 0V, VDS = 25V, f = 1.0MHz VDD = 25V, ID = 1.0A, RGEN = 25Ω Notes: 1. All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.) 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit VDD 10V 90% INPUT 0V PULSE GENERATOR 10% t(ON) td(ON) VDD t(OFF) tr 10% td(OFF) RL OUTPUT RGEN tF D.U.T. 10% INPUT OUTPUT 0V 90% 90% ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com 2 TD9944 Typical Performance Curves Output Characteristics Saturation Characteristics 4.0 2.5 3.2 2.0 VGS = 10V 8V 6V 8V 2.4 I D ( a mpe re s ) I D ( a mpe re s ) VGS = 10V 6V 1.6 4V 0.8 1.5 4V 1.0 3V 0.5 3V 2V 0 0 10 20 30 40 2V 0 0 50 2 4 V DS (volts) 6 8 10 V DS (volts) BV DSS Variation with Temperature On-Resistance vs. Drain Current 10 1.1 V GS = 4.5V R D S ( O N ) ( ohms ) B V D S S ( norma liz e d) 8 1.0 V GS = 10V 6 4 2 0.9 0 -50 0 50 100 150 0 1 2 T j (° C) 3 4 5 I D (amperes) Transfer Characteristics V(th) and R DS Variation with Temperature 2.4 3.0 T A = -55 °C 2.0 R DS(ON) @ 10V, 0.5A 150 °C V G S ( th) ( norma liz e d) I D ( a mpe re s ) 1.4 25°C 2.0 1.5 1.0 1.2 V (th)@ 1mA 1.6 1.0 1.2 0.8 0.8 0.5 0.6 0.4 0 0 2 4 6 8 10 -50 0 50 100 150 T j (° C) V GS (volts) ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com 3 R D S ( O N ) ( norma liz e d) V DS = 25V 2.5 TD9944 Typical Performance Curves (cont.) Capacitance vs. Drain-to-Source Voltage Gate Drive Dynamic Characteristics 10 200 f = 1MHz V DS = 10V 8 V G S ( volts ) C ( pic ofa ra ds ) 150 100 C ISS 6 V DS = 40V 150 pF 4 50 2 C OSS C RSS 0 10 20 30 63pF 0 0 40 0 0.4 0.8 1.2 1.6 Q G (nanocoulombs) V DS (volts) Transconductance vs. Drain Current 1.0 V DS = 25V T A = -55 °C G F S ( s ie me ns ) 0.8 T A = 25 °C 0.6 T A = 150 °C 0.4 0.2 0 0 0.8 1.6 2.4 3.2 4.0 I D (amperes) ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com 4 2.0 TD9944 8-Lead SOIC (Narrow Body) Package Outline (TG) 4.90x3.90mm body, 1.75mm height (max), 1.27mm pitch D θ1 8 E E1 L2 Note 1 (Index Area D/2 x E1/2) L 1 θ L1 Top View Gauge Plane Seating Plane View B A View B Note 1 h h A A2 Seating Plane b e A1 A Side View View A-A Note: 1. This chamfer feature is optional. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. Symbol Dimension (mm) A A1 A2 b MIN 1.35* 0.10 1.25 0.31 NOM - - - - MAX 1.75 0.25 1.65* 0.51 D E E1 4.80* 5.80* 3.80* 4.90 6.00 3.90 5.00* 6.20* 4.00* e 1.27 BSC h L 0.25 0.40 - - 0.50 1.27 L1 1.04 REF L2 0.25 BSC θ θ1 0O 5O - - 8O 15O JEDEC Registration MS-012, Variation AA, Issue E, Sept. 2005. * This dimension is not specified in the JEDEC drawing. Drawings are not to scale. Supertex Doc. #: DSPD-8SOLGTG, Version I041309. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. website: http//www.supertex.com. ©2009 All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP-TD9944 A041309 5 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Supertex: TD9944TG TD9944TG-G