DS0025C Two Phase MOS Clock Driver General Description Features The DS0025C is a monolithic, low cost, two phase MOS clock driver that is designed to be driven by TTL line drivers or buffers such as the DS8830 or DM7440. Two input coupling capacitors are used to perform the level shift from TTL to MOS logic levels. Optimum performance in turn-off delay and fall time are obtained when the output pulse is logically controlled by the input. However, output pulse width may be set by selection of the input capacitor eliminating the need for tight input pulse control. Y Y Y Y Y Y 8-lead TO-5 or 8-lead or 14-lead dual-in-line package High Output Voltage SwingsÐup to 25V High Output Current Drive CapabilityÐup to 1.5A Rep. Rate: 1.0 MHz into l 1000 pF Driven by DS8830, DM7440 ‘‘Zero’’ Quiescent Power Connection Diagrams Dual-In-Line Package Metal Can Package TL/F/5852 – 1 Note: Pin 4 connected to case. Top View Order Number DS0025CH See NS Package Number H08C TL/F/5852 – 2 Top View Order Number DS0025CJ-8 or DS0025CN See NS Package Number J08A or N08E Dual-In-Line Package TL/F/5852 – 3 Top View Order Number DS0025CJ See NS Package Number J14A C1995 National Semiconductor Corporation TL/F/5852 RRD-B30M105/Printed in U. S. A. DS0025C Two Phase MOS Clock Driver June 1992 Absolute Maximum Ratings (Note 1) Recommended Operating Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. (V a b Vb)Voltage Differential Input Current Peak Output Current Storage Temperature Operating Temperature Lead Temperature (Soldering, 10 sec) V a Vb Differential Voltage 20V Min Max Temperature 0 70 Maximum Power Dissipation* at 25§ C 8-Pin Cavity Package 1150 mW 14-Pin Cavity Package 1410 mW Molded Package 1080 mW Metal Can (TO-5) Package 670 mW * Derate 8-pin cavity package 7.8 mW/§ C above 25§ C; derate 14-pin cavity package 9.5 mW/§ C above 25§ C; derate molded package 8.7 mW/§ C above 25§ C; derate metal can (TO-5) package 4.5 mW/§ C above 25§ C. 25V 100 mA 1.5A b 65§ C to a 150§ C 0§ C to a 85§ C 300§ C Electrical Characteristics (Notes 2 and 3) See test circuit. Symbol Typ Max Units Turn-On Delay Time CIN e 0.001 mF, RIN e 0X, CL e 0.001 mF 15 30 ns tRISE Rise Time CIN e 0.001 mF, RIN e 0X, CL e 0.001 mF 25 50 ns td OFF Turn-Off Delay Time CIN e 0.001 mF, RIN e 0X, CL e 0.001 mF (Note 4) 30 60 ns tFALL Fall Time CIN e 0.001 mF, RIN e 0X, CL e 0.001 mF 90 120 ns 150 250 PW Pulse Width (50% to 50%) CIN e 0.001 mF, RIN e 0X, CL e 0.001 mF (Note 5) VO a Positive Output Voltage Swing VIN e 0V, IOUT e b1 mA VOb Negative Output Voltage Swing IIN e 10 mA, IOUT e 1 mA td ON Parameter Conditions Min (Note 4) 60 (Note 5) 100 500 ns ns V a b1.0 V a b0.7V V Vb a 0.7V Vb a 1.5V V Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation. Note 2: Unless otherwise specified min/max limits apply across the 0§ C to 70§ C range for the DS0025C. Note 3: All currents into device pins shown as positive, out of device pins as negative, all voltages referenced to ground unless otherwise noted. All values shown as max or min on absolute value basis. Note 4: Parameter values apply for clock pulse width determined by input pulse width. Note 5: Parameter values for input width greater than output clock pulse width. Timing Diagram Input waveform: PRR e 0.5 MHz VP-P e 5.0V tr e tf s 10 ns Pulse width: A. 1.0 ms B. 200 ns TL/F/5852 – 5 2 Typical Application TL/F/5852 – 4 AC Test Circuit TL/F/5852 – 6 *Q1 is selected high speed NPN switching transistor. Typical Performance Transient Power vs Rep. Rate DC Power (PDC) vs Duty Cycle TL/F/5852 – 8 DUTY CYCLE (%) TL/F/5852 – 7 PAC e (V a –Vb)2fCL PDC e Maximum Load Capacitance V a –Vb)2 (DC) 1k Output PW Controlled by CIN TL/F/5852 – 10 TL/F/5852 – 9 CL k IMAX e Peak Current delivered by driver (PMAX) (1k)–(V a b Vb)2 (DC) (Ipk) (tr) k (f) (1k) (V a b Vb)2 V a b Vb IMIN 3 VBE 0.6 e R1 1k Applications Information Circuit Operation Transient Output Power Input current forced into the base of Q1 through the coupling capacitor CIN causes Q1 to be driven into saturation, swinging the output to V b a VCE(sat) a VDiode. The average transient power (Pac) dissipated, is equal to the energy needed to charge and discharge the output capacitive load (CL) multiplied by the frequency of operation (f). PAC e CL x (V a –Vb)2 x f (2) When the input current has decayed, or has been switched, such that Q1 turns off, Q2 receives base drive through R2, turning Q2 on. This supplies current to the load and the output swings positive to V a – VBE. For V a b Vb e 20V, f e 1.0 MHz, CL e 1000 pF, PAC e 400 mW. Internal Power ‘‘0’’ State Negligible (k3 mW) ‘‘1’’ State Pint e (V a –Vb)2 x Duty Cycle R2 (3) e 80 mW for V a –V b e 20V, DC e 20% Package Power Dissipation Total average power e transient output power a internal power. Example Calculation How many MM506 shift registers can be driven by a DS0025CN driver at 1 MHz using a clock pulse width of 200 ns, rise time 30 – 50 ns and 16V amplitude over the temperature range 0§ –70§ C? Power Dissipation: At 70§ C the DS0025CN can dissipate 870 mW when soldered into printed circuit board. Transient Peak Current Limitation: From equation (1), it can be seen that at 16V and 30 ns, the maximum load that can be driven is limited to 2800 pF. Average Internal Power: Equation (3), gives an average power of 50 mW at 16V and a 20% duty cycle. For one-half of the DS0025C, 870 mW d 2 can be dissipated. 435 mW e 50 mW a transient output power. TL/F/5852 – 11 FIGURE 1. DS0025 Schematic (One-Half Circuit) It may be noted that Q1 must switch off before Q2 begins to supply current, hence high internal transients currents from Vb to V a cannot occur. Fan-Out Calculation The drive capability of the DS0025 is a function of system requirements, i.e. speed, ambient temperature, voltage swing, drive circuitry, and stray wiring capacity. The following equations cover the necessary calculations to enable the fan-out to be calculated for any system condition. Transient Current The maximum peak output current of the DS0025 is given as 1.5A. Average transient current required from the driver can be calculated from: Ie CL (V a – Vb) tr 385 mW e transient output power. Using equation (2) at 16V, 1 MHz and 350 mW, each half of the DS0025CN can drive a 1367 pF load. This is less than the load imposed by the transient current limitation of equation (1) and so a maximum load of 1367 pF would prevail. From the data sheet for the MM506, the average clock pulse load is 80 pF. Therefore the number of devices driven is 1367/80 or 17 registers. For further information please refer to National Semiconductors Application Note AN-76. (1) Typical rise times into 1000 pF load is 25 ns. For V a b Vb e 20V, I e 0.8A. 4 Physical Dimensions inches (millimeters) Order Number DS0025CH NS Package Number H08C Order Number DS0025CJ NS Package Number J08A 5 DS0025C Two Phase MOS Clock Driver Physical Dimensions inches (millimeters) (Continued) Order Number DS0025CJ NS Package Number J14A Order Number DS0025CN NS Package Number N08E LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. 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