AMG-DF102 Full Bridge MOSFET/IGBT Driver up to 600V 1. Functional Description of the AMG-DF102 The AMG-DF102 is a high voltage MOSFET and IGBT driver with two dependent high and low side output channels for Full-Bridge applications. The IC AMG-DF102 has an additional driver in high side configuration to drive a buck converter. CMOS and TTL compatible input levels. Logic inputs are CMOS Schmitt-triggered with pulldown resistors. The floating high side outputs are designed for bootstrap operation so to drive an N-channel power MOSFET or IGBT in high side configuration. During start up the input ENQ need to be tied to VCC to pull the driver outputs low. With ENQ being pulled low, the device is enabled. This protects against unwanted behaviour of the power stage during the start up process, when the supply voltage is rising. 2. Features Logic supply range from 12 to 15V CMOS Schmitt-triggered input logic with pull-down Internally inserted dead time High side output follows corresponding input Floating high side outputs designed for bootstrap operation Enable input turns off all outputs Under-voltage detection for all outputs Temperature range –25°C to 85°C Package SOP24 3. Application The AMG-DF102 is suitable for High Voltage Power Supplies, Motor Controls, Inverters, Battery Chargers and Lamp Ballasts. AMG-DF102 Revision: AB 30. Nov. 2010 © All rights reserved Page 1 of 12 AMG-DF102 Full Bridge MOSFET/IGBT Driver up to 600V 3.1. Example Application Drawing 400V (PFC) VS VBH INB IH HOH IN1 IN1 VSH IN2 IN2 VB1 H01 VS1 LOAD L01 VB2 H02 VS2 GND GND L02 Figure 1: Please insert a clear example application drawing here. 3.2. Application Notes Transistors, bootstrap diodes and caps physically need to be placed as close as possible to the IC. Via's and 90º trace curves should be avoided. For best performance the distance between the transistors, bootstrap diodes and caps - and the IC should be kept under 1cm, traces to the transistors should be straight and min. 1mm wide, if needed only 45º trace curves. Bootstrap diodes need to be fast switching diodes. Bootstrap capacitors need to have low ESR. Traces to/from the bootstrap diodes and caps should be min. 1mm wide, as short as possible and only 45º curves used. Additional information may be found in Application Note: AMG-AN-DF102 AMG-DF102 Revision: AB 30. Nov. 2010 © All rights reserved Page 2 of 12 AMG-DF102 Full Bridge MOSFET/IGBT Driver up to 600V Table of Contents 1.Functional Description of the AMG-DF102............................................................................. 1 2.Features................................................................................................................................. 1 3.Application............................................................................................................................. 1 3.1.Example Application Drawing................................................................................................... 2 3.2.Application Notes..................................................................................................................... 2 4.Block Diagram....................................................................................................................... 4 5.Block Descriptions................................................................................................................. 5 5.1.Voltage Divider VCC................................................................................................................. 5 5.2.Input Enable............................................................................................................................. 5 5.3.Trigger input ............................................................................................................................ 5 5.4.UV Detection on VCC............................................................................................................... 5 5.5.Logic and dead time................................................................................................................. 5 5.6.Pulse-Generator....................................................................................................................... 5 5.7.HV-Level-Shifter....................................................................................................................... 5 5.8.Filter.......................................................................................................................................... 5 5.9.R-S........................................................................................................................................... 5 5.10.UV Detection for the High Side.............................................................................................. 6 5.11.DRV........................................................................................................................................ 6 6.Pinning................................................................................................................................... 6 7.Pin description....................................................................................................................... 7 8.Absolute Maximum Ratings................................................................................................... 8 9.Electrical Characteristics........................................................................................................ 8 9.1.Operational Range................................................................................................................... 8 9.2.DC Characteristics................................................................................................................... 9 9.3.Logic Characteristics................................................................................................................ 9 9.4.AC Characteristics.................................................................................................................. 10 10.IC-Package........................................................................................................................ 10 11.IC-Marking.......................................................................................................................... 11 12.Ordering Information.......................................................................................................... 11 13.Notes and Cautions............................................................................................................ 11 13.1.ESD Protection..................................................................................................................... 11 13.2.Storage conditions................................................................................................................ 11 14.Disclaimer.......................................................................................................................... 12 15.Contact Information............................................................................................................ 12 AMG-DF102 Revision: AB 30. Nov. 2010 © All rights reserved Page 3 of 12 AMG-DF102 Full Bridge MOSFET/IGBT Driver up to 600V 4. Block Diagram VDD VBH VDD UV HV LEVEL SHIFTER VCC INB + S Q FILTER _ R Q DRV OHB PULSE GENERATOR Logic - VSH VB1 UV HV LEVEL SHIFTER IN1 + Logic and dead time - S Q FILTER _ R Q DRV OH1 PULSE GENERATOR VS1 VDD VCC OL1 DRV Vref VB2 UV HV LEVEL SHIFTER IN2 + Logic and - dead time S Q FILTER _ R Q PULSE GENERATOR DRV OH2 VS2 VCC VDD ENQ ENABLE UV Detect DRV OL2 GND PGND Figure 2: Block Diagram AMG-DF102 Revision: AB 30. Nov. 2010 © All rights reserved Page 4 of 12 AMG-DF102 Full Bridge MOSFET/IGBT Driver up to 600V 5. Block Descriptions 5.1. Voltage Divider VCC • Internal reference voltage for logic inputs (connection to INB, IN1, IN2). 5.2. Input Enable • Enables the digital inputs and the UV-Detection for VCC. The ENQ is a CMOS input equipped with a pull-up resistor. The enable input needs be pulled low to enable device operation. If the enable pin is left unconnected or pulled high, all outputs are pulled low. 5.3. Trigger input • CMOS differential amplifier with hysteresis. The negative input is attached to the internal reference while the positive input is connected to the corresponding input pins. Inputs are equipped with a pull-down resistor. 5.4. UV Detection on VCC • CMOS comparator with a hysteresis to detect under voltage supply conditions on VCC. 5.5. Logic and dead time • Input logic and dead time insertion. The dead time is set internally by an RC-combination. 5.6. Pulse-Generator • Pulse generation from falling and rising edges of the input signal. These pulses are transmitted to the floating high side gate driver stages. This leads to lower power consumption. 5.7. HV-Level-Shifter • Level shifting the pulses of the pulse generators to the floating high side driver output stages. 5.8. Filter • Filtering noise and transients. 5.9. R-S • Latch for storing the current output state. AMG-DF102 Revision: AB 30. Nov. 2010 © All rights reserved Page 5 of 12 AMG-DF102 Full Bridge MOSFET/IGBT Driver up to 600V 5.10. UV Detection for the High Side • Detecting under voltage conditions during power up and during operation. Pulling the high side drivers low in case of too low a supply. 5.11. DRV • CMOS gate driver output stage for low and high side. 6. Pinning PIN# Symbol Description 1 INB Logic input for high side gate driver output OHB 2 ENQ Input to enable device operation (active low) 3 GND Ground 4 PGND Power Ground 5 OL1 Low side gate driver output, inverted to IN1 6 n.c. 7 VB1 High side gate driver supply 8 OH1 High side gate driver output, in phase with IN1 9 VS1 High side gate driver supply return 10 n.c. 11 VBH High side buck driver supply 12 OHB High side gate driver output, in phase with INB 13 VSH High side buck driver supply return 14 n.c. 15 n.c. 16 VS2 High side gate driver supply return 17 OH2 High side gate driver output, in phase with IN2 18 VB2 High side gate driver supply 19 n.c. 20 VDD Low side driver supply 21 OL2 Low side gate driver output, inverted to IN2 22 VCC Logic supply 23 IN2 Input for high and low side gate drive outputs OH2 + OL2 24 IN1 Input for high and low side gate drive outputs OH1 + OL1 AMG-DF102 Revision: AB 30. Nov. 2010 © All rights reserved Page 6 of 12 AMG-DF102 Full Bridge MOSFET/IGBT Driver up to 600V 24 1 IN1 ENQ IN2 ɑDF102 YYWW LLxxyy.z INB GND PGND VCC OL2 OL1 VDD VB1 VB2 OH1 OH2 VS1 VS2 VBH OHB 13 12 VSH Top View 7. Pin description VCC Logic supply VDD Low side driver supply GND Signal and logic GND PGND Power ground, supply return for low side gate drivers (bridge) IN1 Signal input for the first half bridge IN2 Signal input for the second half bridge INB Signal input for the buck converter high side driver ENQ Enable input, enables the inputs, low active VBH High side supply for the buck converter high side driver OHB High side buck converter gate driver output VSH High side supply return for the buck converter gate drive OHB VB1,2 High side supply for high side gate drivers (bridge) OH1,2 High side gate driver outputs (bridge) VS1,2 High side supply return for gate drivers OH1,2 (bridge) OL1,2 Low side driver outputs (bridge) AMG-DF102 Revision: AB 30. Nov. 2010 © All rights reserved Page 7 of 12 AMG-DF102 Full Bridge MOSFET/IGBT Driver up to 600V 8. Absolute Maximum Ratings The maximum ratings may not under any circumstances be exceeded, TA = -25°C bis 85°C # Symbol Parameter Min Max Unit 1 VCC Logic supply voltage -0.3 18 V 2 VDD Low side driver supply voltage -0.3 18 V 3 VBx High side floating supply voltage -0.3 4 VSx 5 618 V High side floating supply offset voltage VBX - 18 1 VBX + 0.3 V VOH High side floating output voltage VSX –0.3 VBX + 0.3 V 6 VINX Logic input voltage (IN1, IN2, INB) -0.3 VCC+0.3 V 7 VENQ Input voltage Enable (ENQ) -0.3 VCC+0.3 V 8 TJ Junction Temperature -25 150 °C 9 Tstg Storage temperature range -55 150 °C 10 Rthja Thermal resistance junction to ambient 80 K/W 11 VESD3 ESD (acc. HMB), pins IN1, IN2, INB and ENQ -500 500 V 12 VESD ESD (according to HMB), all other pins -1000 1000 V 2 4 9. Electrical Characteristics 9.1. Operational Range # Symbol Parameter Min Max Unit VSX +12 VSX +15 V 400 V 1 VBx Absolute high side supply voltage 2 VSx High side floating supply offset voltage 3 VDD Low side driver supply voltage 12 15 V 4 VCC Logic supply voltage 12 15 V 5 fs Switching frequency 120 KHz 6 VINX Logic input voltage ( INB, IN1, IN2, pull-down) VGND VGND + VCC V 7 VENQ Enable input voltage (ENQ, pull-up) VGND VGND + VCC V 8 tpw High side pulse width (PWM) 9 TA Ambient temperature 1 -25 µs 85 °C 1 The suffix x is a replacement for a respective 1, 2 or B 2 TJ = Rthja * Ptot + TA 3 HBM for Inputs only 4 HBM for Inputs only AMG-DF102 Revision: AB 30. Nov. 2010 © All rights reserved Page 8 of 12 AMG-DF102 Full Bridge MOSFET/IGBT Driver up to 600V 9.2. DC Characteristics DC characteristics contain the spread of values guaranteed within the specified supply voltage and temperature range and the technology process parameter range unless otherwise specified. Typical values are valid at VCC = VDD =15V, VBX-VSX =15V, ENQ=Low, TJ = 25°C unless stated. # Symbol Parameter Conditions Min Typ Max Unit 1 IQCC Quiescent VCC supply current INX=open 0.8 1.4 mA 2 IQDD Quiescent VDD supply current INX=open 2 2.5 mA 3 IQBH Quiescent VBH supply current INX=open 0.4 0.6 mA 4 IQBX Quiescent VBX supply current INX=open 0.9 1.6 mA 5 VCCUV+ Rising VCC supply undervoltage threshold INX=open tbd 11.6 tbd V 6 VCCUV- Falling VCC supply undervoltage threshold INX=open tbd 10. 8 tbd V 7 IO- Output Low short circuit pulsed current VO=12V 200 tbd - mA 150 tbd - mA Min Typ Max Unit tPW<1µs, TJ =25°C 8 IO+ Output High short circuit pulsed current VO=0V tPW<1µs, TJ =25°C 9.3. Logic Characteristics # Symbol Parameter Conditions 1 VINL Low input voltage (INB, IN1, IN2) - 4.5 5.5 V 2 VINH High input voltage (INB, IN1, IN2,) 9.0 10.0 - V 3 IINH High input bias current (pull-down) - 20 60 µA 4 IINL Low input bias current (pull-down) - - 1 µA AMG-DF102 Revision: AB 30. Nov. 2010 VIN=0.1V © All rights reserved Page 9 of 12 AMG-DF102 Full Bridge MOSFET/IGBT Driver up to 600V 9.4. AC Characteristics AC characteristics contain the spread of values guarantee within the specified supply voltage and temperature range and the technology process parameter range unless otherwise specified. All values are valid at VCC = VDD =15V, VBX-VSX =15V, CLoad=1000pF, TJ= 25°C unless stated. # Symbol Parameter Typ Max Unit 1 tonINX5 Turn-on propagation delay 1200 ns 2 toffINX4 Turn-off propagation delay 50 ns 3 tr Turn on rise time 100 ns 4 tf Turn off fall time 50 ns 10. IC-Package 24-pin Plastic SOP A1 w b L Small Outline Package (SOP) SOP24 H D E e A JEDEC MS-012 300 mil Dimensions (mm) D E H A A1 e b L w nom 15.3 7.5 10.31 2.54 0.20 1.27 0.41 0.76 4° 5 The suffix x is a replacement for a respective 1, 2 AMG-DF102 Revision: AB 30. Nov. 2010 © All rights reserved Page 10 of 12 AMG-DF102 Full Bridge MOSFET/IGBT Driver up to 600V 11. IC-Marking ɑDF102 4 digits date code = 2 digits year + 2 digits work week 8 digits lot number = 2 digits fab process + 4 digits lot number + 1 digit sub lot 12. Ordering Information AMG-DF102-ISP24U shipment in tubes AMG-DF102-ISP24R shipment in Tape & Reel 13. Notes and Cautions 13.1. ESD Protection The Requirements for Handling Electrostatic Discharge Sensitive Devices are described in the JEDEC standard JESD625-A. Please note the following recommendations: When handling the device, operators must be grounded by wearing a for the purpose designed grounded wrist strap with at least 1MΩ resistance and direct skin contact. Operators must at all times wear ESD protective shoes or the area should be surrounded by for ESD protection intended floor mats. Opening of the protective ESD package that the device is delivered in must only occur at a properly equipped ESD workbench. The tape with which the package is held together must be cut with a sharp cutting tool, never pulled or ripped off. Any unnecessary contact with the device or any unprotected conductive points should be avoided. Work only with qualified and grounded tools, measuring equipment, casing and workbenches. Outside properly protected ESD-areas the device or any electronic assembly that it may be part of should always be transported in EGB/ESD shielded packaging. 13.2. Storage conditions The AMG-DF102 corresponds to moisture sensitivity classification ML2, according to JEDEC standard J-STD-020, and should be handled and stored according to J-STD-033. AMG-DF102 Revision: AB 30. Nov. 2010 © All rights reserved Page 11 of 12 AMG-DF102 Full Bridge MOSFET/IGBT Driver up to 600V 14. Disclaimer Information given in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed for the consequences of its use nor for any infringement of patents or other rights of third parties that may result from its use. The values stated in Absolute Maximum Ratings may under no circumstances be exceeded. No warranty is given for use in life support systems or medical equipment without the specific written consent of alpha microelectronics gmbh. For questions regarding the application please contact the publisher. The declared data are only a description of the product. They are not guaranteed properties as defined by law. Examples are given without obligations and cannot give rise to any liability. Reprinting of this data sheet – or any part of it – is not allowed without the license of the publisher. Data sheets are subject to change without any notice. 15. Contact Information This data sheet is published by alpha microelectronics gmbh. To order samples or inquire information please contact: alpha microelectronics gmbh Im Technologiepark 1 15236 Frankfurt (Oder) Germany [email protected] www.alpha-microelectronics.de +49-335-557-1750 (telephone) +49-335-557-1759 (fax) © All rights reserved. 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