TLV716 TLV716P www.ti.com SBVS217A – JUNE 2013 – REVISED SEPTEMBER 2013 Capacitor-Free, Dual, 150-mA, Low-Dropout Voltage Regulator (LDO) in 1,2-mm × 1,2-mm SON Package FEATURES DESCRIPTION • • • • • • The TLV716 is a family of dual-channel, capacitorfree,150-mA, low-dropout (LDO) voltage regulators with multiple fixed-output options available from 1.0 V to 3.3 V. These devices provide an initial 1% accuracy and 1.5% accuracy over temperature. 1 2 • • No Input or Output Capacitors Required Inrush Current Control Low Crosstalk Accuracy: 1% Input Voltage Range: 1.4 V to 5.5 V Multiple Fixed-Output Voltage Combinations Possible from 1.0 V to 3.3 V Foldback Current-Limit Protection Package: 1,2-mm × 1,2-mm SON-6 (DPQ) The TLV716 family is designed to be stable with or without an input or output capacitor. Eliminating the output capacitor allows for a very small solution size. The TLV716P series provides an active pull-down circuit to quickly discharge the output voltage if the application requires an output capacitor. The device provides inrush current control during device power-up and enabling. Inrush control provides constant-current charging of the output load during startup, thereby reducing the risk of an undesired overcurrent fault from the input supply or battery. APPLICATIONS • • • Wireless Handsets, Smart Phones, Tablets Set-Top Boxes (STBs), Cameras, Modems Portable Battery-Powered Products DPQ PACKAGE 1,2-mm x 1,2-mm SON (TOP VIEW) OUT1 1 6 EN1 OUT2 2 5 IN GND 3 4 EN2 The TLV716 family is available in a 1,2-mm × 1,2-mm SON-6 package and is ideal for space-constrained applications. Typical Application Circuit VIN 1.0 V to 3.3 V 1.4 V to 5.5 V OUT1 IN 1.0 V to 3.3 V EN1 On Off TLV716 OUT2 VOUT1 VOUT2 EN2 On GND Off 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2013, Texas Instruments Incorporated TLV716 TLV716P SBVS217A – JUNE 2013 – REVISED SEPTEMBER 2013 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) (2) PRODUCT VOUT TLV716XX(X)YY(Y) PWWWZ XX(X) is the nominal output voltage of channel 1. For output voltages with a resolution of 100 mV, two digits are used in the ordering number; otherwise, three digits are used (for example, 18 = 1.8 V and 185 = 1.85 V). YY(Y) is the nominal output voltage of channel 2. For output voltages with a resolution of 100 mV, two digits are used in the ordering number; otherwise, three digits are used (for example, 18 = 1.8 V and 185 = 1.85 V). P is optional. Use P for devices with an active output discharge. WWW is the package designator. Z is the package quantity. Use R for reel (3000 pieces), and T for tape (250 pieces). (1) (2) For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the device product folder on www.ti.com. Output voltages from 1.0 V to 3.3 V in 50-mV increments are available through the use of innovative factory OTP programming; minimum order quantities may apply. Contact the factory for details and availability. ABSOLUTE MAXIMUM RATINGS (1) At TJ = –40°C to +125°C, unless otherwise noted. VALUE Voltage (2) Current MIN MAX UNIT IN –0.3 +6.0 V EN1, EN2 –0.3 VIN + 0.3 V OUT1, OUT2 –0.3 +3.6 or VIN + 0.3 (whichever is smaller) V OUT1, OUT2 -30 Output short-circuit duration Temperature Internally limited Indefinite s Operating junction, TJ –55 +150 °C Storage, Tstg –55 +150 °C 2 kV 500 V Human body model (HBM) Electrostatic discharge (ESD) QSS 009-105 (JESD22-A114A) rating Charged device model (CDM) QSS 009-147 (JESD22-C101B.01) (1) (2) mA Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated is not implied. Exposure to absolutemaximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to ground. THERMAL INFORMATION (1) TLV716, TLV716P THERMAL METRIC (2) (1) DPQ (SON) UNITS 6 PINS θJA Junction-to-ambient thermal resistance θJCtop Junction-to-case (top) thermal resistance 93.0 θJB Junction-to-board thermal resistance 110.1 ψJT Junction-to-top characterization parameter ψJB Junction-to-board characterization parameter 114.9 θJCbot Junction-to-case (bottom) thermal resistance 91.0 (1) (2) 2 149.3 3.4 °C/W See the Power Dissipation section for more details. For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated TLV716 TLV716P www.ti.com SBVS217A – JUNE 2013 – REVISED SEPTEMBER 2013 ELECTRICAL CHARACTERISTICS Over operating temperature range of TA = –40°C to +85°C, VIN = VOUT(TYP) + 0.5 V or 2.0 V (whichever is greater), IOUT = 1 mA, VEN1 = VEN2 = 0.9 V, and CIN = COUT1 = COUT2 = 1 μF, unless otherwise noted. Typical values are at TJ = +25°C PARAMETER VIN TEST CONDITIONS Input voltage range MIN TYP 1.4 TJ = +25°C, VOUT > 1.2 V TJ = +25°C, VOUT ≤ 1.2 V –1% MAX UNIT 5.5 0.33% V 1% –20 20 TJ = –40°C to +85°C, VOUT > 1.2 V –1.5% 1.5% mV TJ = –40°C to +85°C, VOUT ≤ 1.2 V –50 50 mV Each channel 150 0.2 %/V 0.07 0.2 mV/mA 0.005 0.066 mV/mA VOUT Output voltage accuracy IOUT Output current ΔVOUT / ΔVIN Line regulation VOUT + 0.5 V < VIN ≤ 5.5 V ΔVOUT / ΔIOUT Load regulation 1 mA < IOUT < 150 mA ΔVOUT / ΔIOUT Cross load regulation 1 mA < IOUT < 150 mA IOUT = 150 mA, 1.0 V ≤ VOUT < 1.2 V 0.78 1 V IOUT = 150 mA, 1.2 V ≤ VOUT < 1.8 V 0.6 0.9 V IOUT = 150 mA, 1.8 V ≤ VOUT < 2.1 V 0.35 0.575 V IOUT = 150 mA, 2.1 V ≤ VOUT < 2.5 V 0.29 0.48 V IOUT = 150 mA, 2.5 V ≤ VOUT < 3.0 V 0.23 0.45 V IOUT = 150 mA, 3.0 V ≤ VOUT < 3.3 V 0.21 0.42 V 0.9 VIN V 0 0.4 VDO Dropout voltage mA 0.02 VHI Enable high voltage VLO Enable low voltage RPD Output pull-down resistance TLV716P only ICL Output current limit VIN = VOUT(TYP) + 0.5 V or 2.1 V (whichever is greater) ISC Output short current limit VOUT = 0 V 40 IGND Ground pin current Per channel, IOUT = 0 mA, VIN = 5.5 V 50 75 µA ISHUTDOWN Shutdown current Per channel, VIN = 5.5 V, TJ = +25°C 0.1 1 μA f = 100 Hz, VOUT = 2.8 V, IOUT = 30 mA 80 dB f = 10 kHz, VOUT = 2.8 V, IOUT = 30 mA 46 dB BW = 10 Hz to 100 kHz, VOUT = 1.8 V, VIN = 2.3 V, IOUT = 10 mA 70 μVRMS VOUT = 1.0 V, IOUT = 150 mA 170 μs VOUT = 3.3 V, IOUT = 150 mA 900 μs +158 °C PSRR Power-supply rejection ratio VN Output noise voltage tSTR Startup time (1) TSD Thermal shutdown temperature TJ Operating Junction Temperature (1) V Ω 120 160 Shutdown, temperature increasing Reset, temperature decreasing 500 mA mA +140 –40 °C +125 °C Startup time = time from EN assertion to 0.98 × VOUT(NOM). Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 3 TLV716 TLV716P SBVS217A – JUNE 2013 – REVISED SEPTEMBER 2013 www.ti.com PIN CONFIGURATION DPQ PACKAGE 1,2-mm × 1,2-mm SON-6 (TOP VIEW) OUT1 1 6 EN1 OUT2 2 5 IN GND 3 4 EN2 PIN DESCRIPTIONS NAME 4 PIN NO. DESCRIPTION OUT1 1 Regulated output voltage pin. See the Input and Output Capacitor Requirements section in the Application Information for more details. OUT2 2 Regulated output voltage pin. See the Input and Output Capacitor Requirements section in the Application Information for more details. GND 3 Ground pin. EN2 4 Enable pin for regulator 2. Driving EN2 over 0.9 V turns on regulator 2. Driving EN2 below 0.4 V places regulator 2 into shutdown mode. IN 5 Input pin. See the Input and Output Capacitor Requirements section in the Application Information for more details. EN1 6 Enable pin for regulator 1. Driving EN1 over 0.9 V turns on regulator 1. Driving EN1 below 0.4 V places regulator 1 into shutdown mode. — PAD Connecting the thermal pad to the ground plane improves the thermal performance. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated TLV716 TLV716P www.ti.com SBVS217A – JUNE 2013 – REVISED SEPTEMBER 2013 FUNCTIONAL BLOCK DIAGRAM 120 W IN Bandgap and Reference 0.8 V UVLO Current Limit OUT1 EN1 EN2 Enable and Power Control Logic Thermal Shutdown Thermal Shutdown OUT2 Current Limit Bandgap and Reference 0.8 V UVLO 120 W NOTE: Dashed lines are for the TLV716P only. Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 5 TLV716 TLV716P SBVS217A – JUNE 2013 – REVISED SEPTEMBER 2013 www.ti.com TYPICAL CHARACTERISTICS Over operating temperature range of TJ = –40°C to +125°C, VIN = VOUT(TYP) + 0.5 V or 2.0 V (whichever is greater), VEN1 = VEN2 = VIN, IOUT1 = IOUT2 = 10 mA, CIN = 1 μF, COUT1 = 1 μF, and COUT2 = 1 μF, unless otherwise noted. Output current plots show typical performance with a single output current sweep. Typical values are at TJ = +25°C. 1 0.6 0.4 ±40C 0°C 25°C 85°C 125°C 0.3 Output Voltage û (% VOUT) 0.8 Output Voltage û (% VOUT) 0.4 ±40C 0°C 25°C 85°C 125°C 0.2 0 -0.2 -0.4 -0.6 0.2 0.1 0 -0.1 -0.2 -0.3 -0.8 -1 -0.4 1.5 2.5 3.5 4.5 3.5 5.5 Input Voltage (V) 1.006 1 5.5 C001 3.306 Output Voltage (V) Output Voltage (V) 1.002 5 Figure 2. LINE REGULATION %VOUT DEVIATION vs VIN (VOUT = 3.3 V) ±40C 0°C 25°C 85°C 125°C 1.004 0.998 0.996 0.994 ±40C 3.304 0°C 3.302 25°C 85°C 3.3 125°C 3.298 3.296 3.294 3.292 0.992 3.29 0.99 3.288 0 25 50 75 100 125 Output Current (mA) 0 150 3000.0 75 100 125 C004 120 110 1500.0 1000.0 500.0 100 90 80 70 ±40C 0°C 25°C 85°C 125°C 60 50 0.0 40 1 2 150 Output Current (mA) Ground Pin Current (µA) 2000.0 50 Figure 4. LOAD REGULATION VOUT vs IOUT (VOUT = 3.3 V) ±40C 0°C 25°C 85°C 125°C 2500.0 25 C003 Figure 3. LOAD REGULATION VOUT vs IOUT (VOUT = 1.0 V) Shutdown Current (nA) 4.5 Input Voltage (V) Figure 1. LINE REGULATION %VOUT DEVIATION vs VIN (VOUT = 1.0 V) 3 4 5 Input Voltage (V) Figure 5. SHUTDOWN CURRENT vs VIN 6 4 C001 Submit Documentation Feedback 6 C005 1 2 3 4 5 Input Voltage (V) 6 C006 Figure 6. GROUND PIN CURRENT vs VIN Copyright © 2013, Texas Instruments Incorporated TLV716 TLV716P www.ti.com SBVS217A – JUNE 2013 – REVISED SEPTEMBER 2013 TYPICAL CHARACTERISTICS (continued) Over operating temperature range of TJ = –40°C to +125°C, VIN = VOUT(TYP) + 0.5 V or 2.0 V (whichever is greater), VEN1 = VEN2 = VIN, IOUT1 = IOUT2 = 10 mA, CIN = 1 μF, COUT1 = 1 μF, and COUT2 = 1 μF, unless otherwise noted. Output current plots show typical performance with a single output current sweep. Typical values are at TJ = +25°C. 400 ±40C 0°C 25°C 85°C 125°C 150 ±40C 0°C 25°C 85°C 125°C 350 300 Dropout Voltage (mV) Ground Pin Current (µA) 175 125 100 250 200 150 100 75 50 50 0 0 25 50 75 100 125 150 Output Current ( mA) 0 75 100 1 3 Output Voltage (V) 3.5 0.8 0.6 ±40C 0°C 2.5 2 1.5 ±40C 0°C 1 25°C 0.5 85°C 0 0.05 0.1 0.15 0.2 0.25 85°C 125°C 125°C 0 150 C008 25°C 0.2 0 0.3 Output Current (A) 0 0.05 0.1 0.15 0.2 0.25 0.3 Output Current (A) C010 Figure 9. OUTPUT VOLTAGE vs OUTPUT CURRENT (VOUT = 1.0 V) (Foldback Current Limit) C011 Figure 10. OUTPUT VOLTAGE vs OUTPUT CURRENT (VOUT = 3.3 V) (Foldback Current Limit) 90 10 VOUT = 3.3 V 80 70 VOUT = 1.0 V 1 1RLVH9¥+] 60 PSRR (dB) 125 Figure 8. DROPOUT VOLTAGE vs IOUT (VOUT = 3.3 V) 1.2 0.4 50 Output Current (mA) Figure 7. GROUND PIN CURRENT vs IOUT Output Voltage (V) 25 C007 50 40 30 IOUT = 10 mA 0.1 0.01 20 IOUT = 50 mA 10 IOUT = 150 mA 0 0.001 10 100 1k 10k 100k 1M 10M Frequency (Hz) Figure 11. POWER-SUPPLY REJECTION RATIO vs FREQUENCY (VOUT = 3.3 V) Copyright © 2013, Texas Instruments Incorporated C012 10 100 1k 10k 100k 1M Frequency (Hz) 10M C013 Figure 12. OUTPUT SPECTRAL NOISE DENSITY Submit Documentation Feedback 7 TLV716 TLV716P SBVS217A – JUNE 2013 – REVISED SEPTEMBER 2013 www.ti.com TYPICAL CHARACTERISTICS (continued) Over operating temperature range of TJ = –40°C to +125°C, VIN = VOUT(TYP) + 0.5 V or 2.0 V (whichever is greater), VEN1 = VEN2 = VIN, IOUT1 = IOUT2 = 10 mA, CIN = 1 μF, COUT1 = 1 μF, and COUT2 = 1 μF, unless otherwise noted. Output current plots show typical performance with a single output current sweep. Typical values are at TJ = +25°C. VIN = 2 V to 3 V in 5 μs VOUT = 1 V I OUT = 30 mA C IN = none COUT = none VIN (1 V/div) VIN = 2 V to 3 V in 5 μs VOUT = 1 V I OUT = 30 mA C IN = none COUT = 1 μF VIN (1 V/div) VOUT1 (20 mV/div) VOUT1 (20 mV/div) VOUT2 (20 mV/div) VOUT2 (20 mV/div) Time (20 μs/div) Time (20 μs/div) Figure 13. LINE TRANSIENT Figure 14. LINE TRANSIENT VIN (1 V/div) IOUT1 (100 mA/div) VOUT1 (20 mV/div) VOUT1 (100 mV/div) VIN = 3.5 V to 4.5 V in 5 μs VOUT = 3.3 V I OUT = 30 mA C IN = none COUT = 1 μF VOUT2 (100 mV/div) Time (50 μs/div) I OUT1 = 0 mA ® 150 mA ® 0 mA I OUT2 = 30 mA VIN = 2 V, VOUT = 1 V C IN = 0.22 μF, COUT = 0.22 μF Time (200 μs/div) Figure 15. LINE TRANSIENT Figure 16. LOAD TRANSIENT VIN = 3.8 V short VOUT to GND COUT = none VIN (2 V/div) IOUT1 (100 mA/div) VOUT1 (2 V/div) VOUT1 (100 mV/div) VOUT2 (100 mV/div) I OUT1 = 0.1 mA ® 150 mA ® 0.1 mA I OUT2 = 30 mA VIN = 4.3 V, VOUT = 3.3 V C IN = 0.22 μF, COUT = 0.22 μF Time (100 μs/div) Figure 17. LOAD TRANSIENT 8 Submit Documentation Feedback IOUT1 (100 mA/div) Time (20 μs/div) Figure 18. FOLDBACK CURRENT LIMIT Copyright © 2013, Texas Instruments Incorporated TLV716 TLV716P www.ti.com SBVS217A – JUNE 2013 – REVISED SEPTEMBER 2013 TYPICAL CHARACTERISTICS (continued) Over operating temperature range of TJ = –40°C to +125°C, VIN = VOUT(TYP) + 0.5 V or 2.0 V (whichever is greater), VEN1 = VEN2 = VIN, IOUT1 = IOUT2 = 10 mA, CIN = 1 μF, COUT1 = 1 μF, and COUT2 = 1 μF, unless otherwise noted. Output current plots show typical performance with a single output current sweep. Typical values are at TJ = +25°C. VOUT1 (500 mV/div) VOUT2 (500 mV/div) VOUT1 (500 mV/div) VOUT2 (500 mV/div) VIN = 0 V to 2.3 V VOUT = 1.8 V COUT = 1 μF I OUT1 = 0 mA VIN (500 mV/div) VIN = 0 V to 2.3 V VOUT = 1.8 V COUT = 1 μF I OUT1 = 150 mA VIN (500 mV/div) Time (200 μs/div) Time (200 μs/div) Figure 19. STARTUP Figure 20. STARTUP VOUT2 (1 V/div) VOUT1 (1 V/div) EN = 0 V to 1 V VIN = 3.8 V VOUT = 3.3 V COUT = none I OUT = no load VOUT1 (1 V/div) VOUT2 (1 V/div) EN (1 V/div) EN (1 V/div) EN = 0 V to 1 V VIN = 3.8 V VOUT = 3.3 V COUT = none I OUT = no load Time (500 ns/div) Time (200 μs/div) Figure 21. STARTUP WITH EN Figure 22. SHUTDOWN WITH EN VOUT1 (1 V/div) VOUT2 (1 V/div) EN (1 V/div) EN = 0 V to 1 V VIN = 3.8 V VOUT = 3.3 V COUT = none I OUT = 150 mA Time (200 μs/div) Figure 23. STARTUP WITH EN Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 9 TLV716 TLV716P SBVS217A – JUNE 2013 – REVISED SEPTEMBER 2013 www.ti.com APPLICATION INFORMATION The TLV716 and TLV716P belong to a family of dual-channel, capacitor-free, 150-mA, low-dropout voltage (LDO) regulators. These devices can be used with or without external capacitors and are available in a 1,2-mm × 1,2-mm package, making these devices a very small solution size for dual-channel, low-dropout (LDO) regulators. This family of LDO regulators offers current-limit and thermal protection, and is specified from –40°C to +85°C. Figure 24 shows an application circuit for this family of devices. VIN CIN IN OUT1 EN1 OUT2 ON (1) OFF ON VOUT1 VOUT2 (1) EN2 GND COUT2 1mF Ceramic (1) COUT1 1mF Ceramic OFF (1) Optional. Figure 24. Typical Application Circuit CAPACITOR-FREE OPERATION The TLV716 is stable without the use of input or output capacitors. This functionality results in a reduction of component count, cost, and solution size. In addition, without the need of external capacitors, the TLV716 ultrasmall, 1,2-mm × 1,2-mm DPQ package optimizes the solution size for board space-constrained applications. To optimize device ac performance, an input and output capacitor is recommended, as described in the Input and Output Capacitor Requirements section. INPUT AND OUTPUT CAPACITOR REQUIREMENTS The TLV716 uses an advanced internal control loop to obtain stable operation both with or without the use of input or output capacitors as high as 100-µF. The dynamic performance of the device is improved with the use of an output capacitor. An output capacitance of 0.1 μF or larger generally provides good dynamic response. X5Rand X7R-type ceramic capacitors are recommended because these capacitors have minimal variation in value and equivalent series resistance (ESR) over temperature. Although an input capacitor is not required for stability, good analog design practice is to connect a 0.1-µF to 1-µF capacitor from IN to GND. This capacitor counteracts input source impedance and improves supply transient response, input ripple, and PSRR. A higher value capacitor may be necessary if large, fast, rise-time load transients are anticipated or if the device is located several inches from the input power source. BOARD LAYOUT RECOMMENDATIONS TO IMPROVE PSRR AND NOISE PERFORMANCE If used, place the input and output capacitors as close to the device pins as possible. To improve ac performance (such as PSRR, output noise, and transient response), TI recommends that for VIN and VOUT, the ground planes are connected only at the GND pin of the device. In addition, connect the ground connection for the output capacitor directly to the GND pin of the device. 10 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated TLV716 TLV716P www.ti.com SBVS217A – JUNE 2013 – REVISED SEPTEMBER 2013 INTERNAL CURRENT LIMIT The TLV716 has an internal foldback current limit that helps protect the regulator during fault conditions. The current supplied by the device gradually reduces while the output voltage decreases. When the output is connected to ground, the LDO supplies a typical current of 40 mA. When in current limit, the output voltage is not regulated and VOUT = IOUT × RLOAD; see Figure 10 and Figure 11. The PMOS pass transistor dissipates [(VIN – VOUT) × ILIMIT] until thermal shutdown is triggered and the device turns off. When the device cools down, the internal thermal shutdown circuit turns on the device. If the fault condition continues, the device cycles between current limit and thermal shutdown. See the Thermal Information section for more details. The TLV716 PMOS pass element has a built-in body diode that conducts current when the voltage at OUT exceeds the voltage at IN. This current is not limited, so if extended reverse voltage operation is anticipated, external limiting to 5% of the rated output current is recommended. A small schottky diode connected with the anode to OUT and the cathode to IN can accomplish this limiting. SHUTDOWN The enable pin (EN) is active high. The device is enabled when the EN pin goes above 0.9 V. This relatively low value of voltage required to turn the LDO regulator on can be used to enable the device with the general-purpose input/output (GPIO) of recent processors whose GPIO voltage is lower than traditional microcontrollers. The device is turned off when the EN pin is held at less than 0.4 V. When shutdown capability is not required, the EN pin can connected to the IN pin. The TLV716P will pull down the output with a 120Ω resistor when the EN pin falls below 0.4 V. DROPOUT VOLTAGE The TLV716 and TLV716P use a PMOS pass transistor to achieve low dropout. When (VIN – VOUT) is less than the dropout voltage (VDO), the PMOS pass device is in the linear region of operation and the input-to-output resistance is the RDS(ON) of the PMOS pass element. VDO scales approximately with the output current because the PMOS device behaves like a resistor in dropout. As with any linear regulator, PSRR and transient response are degraded as (VIN – VOUT) approaches dropout. UNDERVOLTAGE LOCKOUT (UVLO) The TLV716 and TLV716P use an undervoltage lockout circuit (1.3 V, typical) to keep the output shut off until the internal circuitry is operating properly. THERMAL INFORMATION Thermal protection disables the output when the junction temperature rises to approximately +158°C, allowing the device to cool. When the junction temperature cools to approximately +140°C, the output circuitry is again enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage as a result of overheating. Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate heatsink. For reliable operation, junction temperature should be limited to +125°C maximum. To estimate the margin of safety in a complete design, increase the ambient temperature until the thermal protection is triggered; use worst-case loads and signal conditions. The ambient temperature at which thermal shutdown occurs on the device is 33°C higher (158°C - 125°C) than the maximum recommended operating conditions. The internal protection circuitry of the TLV716 and TLV716P is designed to protect against overload conditions. This circuitry is not intended to replace proper PCB layout and heatsinking. Continuously running the device into thermal shutdown degrades reliability. Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 11 TLV716 TLV716P SBVS217A – JUNE 2013 – REVISED SEPTEMBER 2013 www.ti.com POWER DISSIPATION The ability to remove heat from a die is different for each package type, presenting different considerations in the printed circuit board (PCB) layout. The copper PCB area around the device that is free of other components moves the heat from the device to ambient air. Performance data for JEDEC-low and high-K boards are given in the Thermal Information table. Using heavier copper increases effectiveness in removing heat from the device. Power dissipation (PD) is equal to the product of the output current and the voltage drop across both output pass elements, as shown in Equation 1: PD = (VIN – VOUT1) × IOUT1 + (VIN – VOUT2) × IOUT2 (1) The maximum ambient temperature that the device can operate within the maximum TJ operating temperature of +125°C depends on the thermal impedance and the total power dissipated within the device. Figure 25 and Figure 26 show maximum ambient temperature verses output current for two different LDO configurations. Figure 25 shows the maximum ambient temperature with VIN = 3.3 V, VOUT1 = 1.8 V, and VOUT2 = 1.0 V versus IOUT1. Figure 26 shows the maximum ambient temperature with VIN = 5.0 V, VOUT1 = 3.3 V, and VOUT2 = 1.8 V versus IOUT1. Maximum Ambient Temperature (C) 125 115 105 95 85 75 65 55 5 Vin, 3.3 Vout1, 1.8 Vout2, Iout2 = 0 mA 45 5 Vin, 3.3 Vout1, 1.8 Vout2, Iout2 = 75 mA 35 25 0 30 60 90 120 IOUT1 (mA) 150 C014 Figure 25. Maximum Ambient Temperature vs Output Current (VIN = 5.0 V, VOUT1 = 3.3 V, VOUT2 = 1.8 V) Maximum Ambient Temperature (C) 125 115 105 95 85 75 65 55 3.3 Vin, 1.8 Vout1, 1.0 Vout2, Iout2 = 0 mA 45 3.3 Vin, 1.8 Vout1, 1.0 Vout2, Iout2 = 75 mA 35 25 0 30 60 90 IOUT1 (mA) 120 150 C014 Figure 26. Maximum Ambient Temperature vs Output Current (VIN = 3.3 V, VOUT1 = 1.8 V, VOUT2 = 1.0 V) 12 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated TLV716 TLV716P www.ti.com SBVS217A – JUNE 2013 – REVISED SEPTEMBER 2013 REVISION HISTORY NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Original (June 2013) to Revision A • Page Changed document status from Product Preview to Production Data; pre-RTM changes made throughout ...................... 1 Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 13 PACKAGE OPTION ADDENDUM www.ti.com 30-Sep-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) TLV716120275PDPQR ACTIVE X2SON DPQ 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 EI TLV716120275PDPQT ACTIVE X2SON DPQ 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 EI TLV7162818PDPQR ACTIVE X2SON DPQ 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 CW TLV7162818PDPQT ACTIVE X2SON DPQ 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 CW TLV7162828PDPQR ACTIVE X2SON DPQ 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 CX TLV7162828PDPQT ACTIVE X2SON DPQ 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 CX TLV7163030PDPQR ACTIVE X2SON DPQ 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 CY TLV7163030PDPQT ACTIVE X2SON DPQ 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 CY TLV7163318PDPQR ACTIVE X2SON DPQ 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 CZ TLV7163318PDPQT ACTIVE X2SON DPQ 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 CZ (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 30-Sep-2013 (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. 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