AVAGO AMMP

AMMP-6430
27-34 GHz, 0.5W Power Amplifier
in SMT Package
Data Sheet
Description
Features
The AMMP-6430 MMIC is a broadband 1W power
amplifier in a surface mount package designed for use
in transmitters that operate in various frequency bands
between 27GHz and 34GHz. At 30GHz, it provides 29dBm
of output power (P-1dB) and 19dB of small-signal gain
from a small easy-to-use device. The device has input
and output matching circuitry for use in 50Ω environments. The AMMP-6430 also integrates a temperature
compensated RF power detection circuit that enables
power detection of 0.3V/W. DC bias is simple and the
device operates on widely available 5V for current supply
(negative voltage only needed for Vg). It is fabricated in
a PHEMT process for exceptional power and gain performance.
• Wide Frequency Range 27-34 GHz
Package Diagram
• Half watt output power
• 50 Ω match on input and output
• Specifications (Vd=5V, Idq=650mA)
• Frequency range 27 to 34 GHz
• Small signal Gain of 20dB
• Output power @P-1 of 27dBm (Typ.)
• Input/Output return-loss of -10dB
Applications
• Microwave Radio systems
• Satellite VSAT, DBS Up/Down Link
• LMDS & Pt-Pt mmW Long Haul
Vg
Vd
DET_0
1
2
3
• Broadband Wireless Access
(including 802.16 and 802.20 WiMax)
• WLL and MMDS loops
Functional Block Diagram
RF IN
8
4
RF OUT
1
7
6
5
Vg
Vd
DET_R
Note:
1. This MMIC uses depletion mode pHEMT devices.
Negative supply is used for DC gate biasing.
2
3
4
8
7
6
5
Pin
1
2
3
4
5
6
7
8
Function
Vg
Vd
DET_O
RF_out
DET_R
Vd
Vg
RF_in
PACKAGE
BASE
GND
Attention: Observe Precautions for
handling electrostatic sensitive devices.
ESD Machine Model (Class A): 50V
ESD Human Body Model (Class 0): 150V
Refer to Avago Application Note A004R:
Electrostatic Discharge Damage and Control.
Notes: MSL Rating = Level 2A
Electrical Specifications
1. Small/Large -signal data measured in a fully de-embedded test fixture form TA = 25°C.
2. Pre-assembly into package performance verified 100% on-wafer.
3. This final package part performance is verified by a functional test correlated to actual performance at one or more
frequencies.
4. Specifications are derived from measurements in a 50 Ω test environment. Aspects of the amplifier performance
may be improved over a more narrow bandwidth by application of additional conjugate, linearity, or low noise
(Гopt) matching.
5. The Gain and P1dB tested at 27 GHz guaranteed with measurement accuracy +/-1.5dB for Gain and +/-1.6 GHz for
P1dB.
Table 1. RF Electrical Characteristics
TA=25°C, Vd=5.0V, Idq=650mA, Vg=-1.1V, Zo=50 Ω
Parameter
Min
Typ.
Max
Unit
Operational Frequency, Freq
27
Small-signal Gain Freq = 27GHz, Gain
16
20
34
GHz
dB
Output Power at 1dB Gain Compression, P1dB
26
27
dBm
Output Third Order Intercept Point, OIP3
35
dBm
Input Return Loss, RLin
10
dB
Output Return Loss, RLout
10
dB
Reverse Isolation, Isolation
43
dB
Table 2. Recommended Operating Range
1. Ambient operational temperature TA = 25°C unless otherwise noted.
2. Channel-to-backside Thermal Resistance (Tchannel (Tch) = 34°C) as measured using infrared microscopy. Thermal
Resistance at backside temperature (Tb) = 25°C calculated from measured data.
Description
Min.
Typical
Max.
Unit
Comments
Drain Supply Current, Idq
650
mA
Vd = 5V, Vg set for Id Typical
Gate Voltage, Vg
-1.1
V
Idq = 650 mA
2
Table 3. Thermal Properties
Parameter
Test Conditions
Value
Channel Temperature, Tch
Thermal Resistance
(Channel-to-Base Plate), Rqch-b
Tch=139.6 °C
Ambient operational temperature TA = 25°C
Channel-to-backside Thermal Resistance Tchannel(Tch)=34°C
Thermal Resistance at backside temperature Tb=25°C
Rqch-b = 16.8 °C/W
Note:
1. Assume SnPb soldering to an evaluation RF board at 85 °C base plate temperatures. Worst case is at saturated output power when DC power
consumption rises to 5.24W with 0.9W RF power delivered to load. Power dissipation is 4.34W and the temperature rise in the channel is 72.9 °C.
In this condition, the base plate temperature must be remained below 82.1 °C to maintain maximum operating channel temperature below 155
°C.
Table 4. Absolete Minimum and Maximum Ratings
Description
Min.
Max.
Unit
6
V
0.5
V
Drain Current, Idq
900
mA
Power Dissipation, Pd
5.5
W
CW Input Power, Pin
23
dBm
Channel Temperature, Tch
+155
°C
+155
°C
+260
°C
Drain Supply Voltage, Vd
Gate Supply Voltage, Vg
Storage Temperature, Tstg
Maximum Assembly Temperature
-3
-65
Comments
CW
20 second maximum
Notes:
1. Operation in excess of any one of these conditions may result in permanent damage to this device.
2. Combinations of supply voltage, drain current, input power, and output power shall not exceed PD.
3. When operate at this condition with a base plate temperature of 85 °C, the median time to failure (MTTF) is significantly reduced.
4. These ratings apply to each individual FET
5. Junction operating temperature will directly affect the device MTTF. For maximum life, it is recommended that junction temperatures be
maintained at the lowest possible levels.
3
AMMP-6430 Typical Performance
(Data obtained from 2.4-mm connector based test fixture, and this data is including connecter loss, and board loss.)
(TA = 25°C, Vd=5V, Idq=650mA, Vg=-1.1 V, Zin = Zout = 50Ω)
-30
30
0
S21[dB]
25
S11[dB]
S12[dB]
-5
S22[dB]
15
10
Return Loss [dB]
S12[dB]
10
15
20
25
30
Frequency [GHz]
35
40
45
Figure 1. Typical Gain and Reverse Isolation
-50
-25
15
20
40
Po[dBm], and, PAE[%]
25
20
15
P-1
PAE, @P-1
P-3
PAE, @P-3
5
24
25
26
27
28
29
35
40
45
30
32
33
1100
1000
20
900
15
800
10
700
5
600
0
500
34
-25
-20
-15
-10
-5
0
5
10
15
400
20
Pin [dBm]
Frequency[GHz]
Figure 3. Typical P-1 and PAE
1200
Id(total)
25
-5
31
1300
PAE[%]
30
10
25
30
Frequency [GHz]
Pout(dBm)
35
30
P-1, P-3 [dBm], PAE[%]
10
Figure 2. Typical Input & Output Return Loss
35
0
-15
-20
5
0
-10
Figure 4. Typical Pout, Ids, and PAE vs. Pin at Freq=30GHz
46
10
44
8
42
Noise Figure [dB]
IP3[dBm]
40
38
36
34
4
2
32
30
25
26
27
28
29 30
31
Frequency [GHz]
32
33
Figure 5. Typical IP3 (Third Order Intercept) @Pin=-20dBm
4
6
34
35
0
24
26
Figure 6. Typical Noise Figure
28
30
32
Frequency [GHz]
34
36
Ids [mA]
S21[dB]
20
1
0.35
0
S22_20
0.3
0.2
0.15
0.01
0.1
-15
-20
0.05
5
10
15
20
25
30
35
0.001
-25
Pout[dBm]
Figure 7. Typical Detector voltage vs. Output Power @30GHz
35
40
28
-10
P-1 [dBm]
S11[dB]
25
30
Frequency[GHz]
30
-15
-20
26
24
P-1_85de g
P-1_20de g
P-1_-40deg
22
15
20
25
30
35
40
Frequency[GHz]
Figure 9. Typical S11 over temperature
S21_20
S21_-40
25
S21_85
20
15
10
15
20
25
30
Frequency[GHz]
Figure 11. Typical Gain over temperature
20
24
26
28
30
32
Frequency [GHz]
Figure 10. Typical P-1 over temperature
30
S21[dB]
20
32
S11_20
S11_-40
S11_85
-5
5
15
Figure 8. Typical S22 over temperature
0
-25
S22_85
-10
S22[dB]
0.1
Det_R - Det_O [V]
Det_R - Det_O [V]
0.25
0
S22_-40
-5
35
40
34
36
Typical Scattering Parameters [1]
(TA = 25°C, Vd =5 V, Idq = 650 mA, Zin = Zout = 50Ω)
Freq S11
[GHz] dB
S21
S12
S22
Mag
Phase
dB
Mag
Phase
dB
Mag
Phase
dB
Mag
Phase
1
-0.077
0.991
-30.672
-60.460
0.001
156.200
-81.678
8.24E-05
13.553
-0.075
0.991
-31.001
2
-0.244
0.972
-61.135
-52.134
0.002
7.598
-79.982
1.00E-04
-1.433
-0.218
0.975
-61.826
3
-0.507
0.943
-91.481
-55.059
0.002
-178.810
-78.816
1.15E-04
-26.240
-0.450
0.949
-92.759
4
-0.857
0.906
-121.770
-62.791
0.001
135.030
-73.965
2.00E-04
-79.414
-0.847
0.907
-123.780
5
-1.286
0.862
-152.370
-43.769
0.006
72.309
-66.459
4.75E-04
-89.529
-1.465
0.845
-152.600
6
-1.834
0.810
176.860
-43.125
0.007
-55.096
-61.854
8.08E-04
-141.380
-1.593
0.832
177.570
7
-2.497
0.750
146.160
-47.710
0.004
-138.310
-59.371
1.08E-03
-174.860
-2.056
0.789
145.900
8
-3.218
0.690
115.480
-50.926
0.003
167.090
-58.859
1.14E-03
151.750
-2.614
0.740
114.510
9
-3.952
0.634
84.820
-48.273
0.004
127.030
-51.689
2.60E-03
128.260
-3.234
0.689
82.673
10
-4.734
0.580
54.869
-47.156
0.004
82.462
-49.760
3.25E-03
76.311
-3.919
0.637
51.597
11
-5.372
0.539
26.213
-46.361
0.005
37.278
-47.391
4.27E-03
33.764
-4.545
0.593
21.330
12
-5.892
0.507
-1.577
-49.213
0.003
16.009
-48.433
3.79E-03
-0.070
-5.413
0.536
-7.654
13
-6.334
0.482
-28.136
-43.321
0.007
-18.990
-47.536
4.20E-03
-31.732
-4.738
0.580
-29.552
14
-6.785
0.458
-52.977
-49.276
0.003
-50.499
-50.113
3.12E-03
-62.027
-4.740
0.579
-63.489
15
-7.246
0.434
-75.942
-48.968
0.004
-66.480
-47.510
4.21E-03
-80.734
-5.196
0.550
-93.519
16
-7.822
0.406
-95.873
-50.759
0.003
79.915
-49.051
3.53E-03
-117.620
-5.850
0.510
-122.580
17
-8.056
0.396
-113.940
-31.831
0.026
37.293
-53.232
2.18E-03
-135.710
-6.891
0.452
-151.530
18
-8.011
0.398
-130.700
-19.650
0.104
-11.371
-54.404
1.90E-03
-136.240
-8.605
0.371
179.660
19
-8.003
0.398
-150.530
-8.565
0.373
-65.975
-52.389
2.40E-03
-100.790
-11.491
0.266
151.610
20
-8.086
0.394
-172.380
2.944
1.404
-130.730
-45.317
5.42E-03
-135.360
-15.971
0.159
128.630
21
-10.147
0.311
160.910
16.205
6.460
130.360
-44.518
5.94E-03
179.470
-32.906
0.023
80.680
22
-10.495
0.299
156.560
19.584
9.533
-6.027
-44.477
5.97E-03
146.120
-18.247
0.122
-170.070
23
-12.051
0.250
132.580
19.712
9.674
-99.417
-44.466
5.98E-03
129.370
-18.242
0.122
169.400
24
-15.378
0.170
122.010
20.404
10.476
174.220
-44.254
6.13E-03
102.170
-17.689
0.130
159.240
25
-16.652
0.147
127.100
20.339
10.398
91.597
-44.452
5.99E-03
63.925
-18.009
0.126
147.290
26
-17.111
0.139
113.670
19.880
9.862
16.978
-44.351
6.06E-03
36.998
-19.138
0.110
134.330
27
-23.026
0.071
100.620
20.040
10.046
-54.022
-45.333
5.41E-03
1.733
-23.261
0.069
137.140
28
-20.256
0.097
166.160
20.218
10.255
-128.560
-52.770
2.30E-03
-49.664
-18.834
0.114
161.640
29
-14.571
0.187
152.630
20.087
10.100
157.600
-49.161
3.48E-03
-75.571
-15.869
0.161
147.670
30
-13.363
0.215
128.640
19.761
9.729
85.669
-57.520
1.33E-03
15.834
-15.535
0.167
128.380
31
-11.814
0.257
107.980
19.830
9.807
10.808
-86.823
4.56E-05
-92.886
-14.211
0.195
109.870
32
-10.715
0.291
83.770
19.352
9.282
-68.718
-58.807
1.15E-03
-82.154
-13.484
0.212
82.184
33
-10.889
0.285
65.105
18.619
8.531
-150.100
-62.898
7.16E-04
92.036
-14.452
0.189
72.563
34
-11.417
0.269
41.069
18.093
8.028
124.500
-51.835
2.56E-03
-4.332
-15.301
0.172
53.869
35
-12.098
0.248
36.792
15.162
5.730
14.850
-52.719
2.31E-03
-115.640
-12.933
0.226
56.976
36
-11.897
0.254
24.365
7.101
2.265
-75.509
-58.568
1.18E-03
-48.164
-12.205
0.245
32.346
37
-11.125
0.278
13.967
-0.825
0.909
-142.060
-57.430
1.34E-03
-124.980
-12.066
0.249
15.583
38
-10.020
0.316
-0.758
-7.753
0.410
161.700
-52.497
2.37E-03
-154.340
-11.605
0.263
0.967
39
-9.222
0.346
-16.019
-13.812
0.204
110.760
-56.625
1.47E-03
116.090
-11.065
0.280
-12.574
40
-8.609
0.371
-32.089
-19.209
0.110
62.155
-55.294
1.72E-03
91.256
-10.402
0.302
-26.857
41
-8.175
0.390
-47.230
-24.340
0.061
13.948
-56.805
1.44E-03
1.705
-9.889
0.320
-40.144
42
-7.588
0.417
-62.593
-29.416
0.034
-31.372
-57.472
1.34E-03
-87.233
-9.293
0.343
-52.531
43
-7.587
0.417
-78.246
-34.254
0.019
-72.562
-64.193
6.17E-04
-136.190
-8.532
0.374
-64.211
44
-7.506
0.421
-89.361
-38.657
0.012
-112.560
-69.135
3.49E-04
-109.180
-7.654
0.414
-77.188
45
-7.332
0.430
-101.290
-43.475
0.007
-145.910
-60.759
9.16E-04
-29.843
-7.062
0.444
-90.938
Note:
1. Data obtained from a 2.4-mm connecter based module, and this data is including connecter loss, and board loss.
6
Biasing and Operation
Recommended quiescent DC bias condition for optimum
power and linearity performances is Vd=5 volts with
Vg (-1.1V) set for Id=650 mA. Minor improvements in
performance are possible depending on the application.
The drain bias voltage range is 3 to 5V. A single DC gate
supply connected to Vg will bias all gain stages. Muting
can be accomplished by setting Vg to the pinch-off voltage Vp.
emerging from the RF output port. The detected voltage
is given by :
A simplified schematic for the AMMP6430 MMIC die
is shown in Figure 12. The MMIC die contains ESD and
over voltage protection diodes for Vg, and Vd terminals.
The package diagram for the recommended assembly
is shown in Figure 13. In finalized package form, ESD
diodes protect all possible ESD or over voltage damages
between Vgg and ground, Vg and Vd, Vd and ground.
Typical ESD diode current versus diode voltage for 11connected diodes in series is shown in Figure 14. Under
the recommended DC quiescent biasing condition
at Vds=5V, Ids=650mA, Vg=-1V, typical gate terminal
current is approximately 0.3mA. If an active biasing
technique is selected for the AMMP6430 MMIC PA DC
biasing, the active biasing circuit must have more than
10-times higher internal current that the gate terminal
current.
There are three methods to calculate Vofs :
An optional output power detector network is also
provided. The differential voltage between the Det-Ref
and Det-Out pads can be correlated with the RF power
DET_R
V = (V ref − V det ) − V ofs
where Vref is the voltage at the DET_R port, Vdet is a
voltage at the DET_0 port, Vofs and is the zero-inputpower offset voltage.
1.Vofs can be measured before each detector
measurement (by removing or switching off the
power source and measuring Vref - Vdet). This method
gives an error due to temperature drift of less than
0.01dB/50°C.
2.Vofs can be measured at a single reference
temperature. The drift error will be less than 0.25dB.
3.Vofs can either be characterized over temperature and
stored in a lookup table, or it can be measured at two
temperatures and a linear fit used to calculate Vofs at
any temperature. This method gives an error close to
the method #1.
The RF ports are AC coupled at the RF input to the first
stage and the RF output of the final stage. No ground
wired are needed since ground connections are made
with plated through-holes to the backside of the device.
Vd
Vg
DQ
DET_O
RFout
RF in
Figure 12. Simplified schematic for the MMIC die
7
Three stage 0.5W power amplifier
DET_O
1
3
2
RF Input
RF Output
8
4
7
6
5
DET_R
50 Ω
5V
− 0 . 8V
1µF
100 pF
100 pF
1µ F
Note:
1. Vd may be applied to either Pin 2 or Pin 6.
2. Vg may be applied to either Pin 1 or Pin 7.
Figure 13. Schematic for recommended Bias circuitry
20
|Icomp(I_METER.AMP1,0)| (mA)
Diode_current
18
16
Diode Current [mA]
14
12
10
8
6
4
2
0
5
5.5
6
6.5
7
7.5
8
Voltage (V)
Figure 14. Typical ESD diode current versus diode voltage for 11-connected diodes in series
8
Pin
1
2
3
4
5
6
7
8
Function
Vg
Vd
DET_O
RF_out
DET_R
Vd
Vg
RF_in
AMMP-6430 Part Number Ordering Information
Part Number
Devices Per
Container
Container
AMMP-6430-BLKG
10
Antistatic bag
AMMP-6430-TR1G
100
7” Reel
AMMP-6430-TR2G
500
7” Reel
Package Dimension, PCB Layout and Tape and Reel information
Please refer to Avago Technologies Application Note 5520, AMxP-xxxx production Assembly Process (Land Pattern A).
For product information and a complete list of distributors, please go to our web site:
www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2013 Avago Technologies. All rights reserved.
AV02-0623EN - July 9, 2013