Preliminary Winbond ES521 Evaluation System User Guide 1 Preliminary INTRODUCTION: ........................................................................................................... 3 CONTENT OF THE ES521 EVALUATION KIT: ....................................................... 3 APPLICATION SOFTWARE AT A GLANCE: ........................................................... 4 INTRODUCTION TO SYSTEM SETUP ...................................................................... 5 CONFIGURATION REGISTERS.................................................................................. 7 STORING CUSTOM CONFIGURATIONS ................................................................. 8 ANALOG PLAY AND RECORD ................................................................................... 8 THE STATUS REGISTER .............................................................................................. 8 DIGITAL READ AND WRITE ...................................................................................... 9 READING AND W RITING STRINGS .................................................................................... 9 READING RAW DATA ....................................................................................................... 9 ON BOARD CLOCK GENERATION ......................................................................... 11 RUNNING ONE OR TWO DEVICES ......................................................................... 11 SETTING UP THE BOARD.......................................................................................... 12 CLOCK CONFIGURATION JUMPER (J9)............................................................................ 12 CODEC JUMPER (J1)..................................................................................................... 12 I2 C SWITCHES (SDA, SCL) ........................................................................................... 12 CODEC SWITCHES (SCK, WS, MCLK, SDI, SDIO) ................................................... 12 RECOMMENDED POWER SUPPLY ..................................................................................... 12 ES521 SCHEMATICS .................................................................................................... 13 CONNECTORS AND CLOCK GENERATION......................................................................... 13 MAIN 5216..................................................................................................................... 14 SECOND 5216................................................................................................................. 15 2 Preliminary Introduction: The ES521 evaluation system allows testing of all features of the chip and visually shows the signal flow through the chip. Writing to three 16-bit configuration registers sets up the signal flow. An active path is highlighted in blue while the gray arrows show possible but not currently active paths. The main application window allows playback and record of analog audio as well as setting up the configuration registers. There are three ways to set the configuration registers, • Change the controls on the main window until the desired signal flow is highlighted in blue. • Type in values in the configuration register boxes in the top left window, the signal flow will be updated to show the current signal path. • Select a path from the Path menu. The various play and record buttons allow playback and record either from a supplied address or the current location of the address pointer. Pressing the ‘Read Status’ button retrieves the address pointer. The program also supports reading and writing digital data by selecting the ‘Digital’ menu in the menu bar. Content of the ES521 evaluation kit: The evaluation system package contains an Evaluation Board (batteries included) and a CD ROM with the following items: • User’s Guide • Self installing application software • Data sheets 3 Preliminary Application software at a glance: Figure 1 –Software Overview Type in configuration settings in these boxes Current configuration register settings in hex numbers binary representation of configuration registers select main or secondary device CODEC setup Status display current address pointer 4 2 PCM / I S clock / sync Preliminary Introduction to system setup To quickly get familiar with the system, follow this tutorial that will explain the procedure of setting up a feed through path from the microphone to the speaker of the main 5216. The main 5216 uses the analog audio connectors on the left side of the board. • • • • • • • • • • • Start the ES521 Application from the start menu. The default path is all configuration registers set to 0. Set the Aux Gain control to ‘OFF’ Set the SUM1AMP control to ‘OFF’ Set the SUM1MUX to ‘OFF’ Set the SUM2 control to ‘OFF’ Set the CODEC MUX to ‘NONE’ Set the CODEC A/D control to ‘OFF’, this prevents noise from the CODEC. Set the CODEC D/A control to ‘OFF’, also for preventing noise. Set the Volume MUX control to ‘INP MUX’ Set the Output Select control to ‘8 Ohm’ Click ‘Write Config’, this updates the main 5216 with this setup. The display should now show a single blue path from the microphone to the output. If a speaker is connected to the speaker output, any sound coming into the microphone will be played back over the speaker. The top left corner of the application windows shows the configuration registers, they should look like in the following picture. Figure 2 – Configuration Register settings If other values are displayed, restart the application and follow the steps again. The binary representation of the Configuration Registers at the top of the application window shows the register content in binary form with bit names used in the data sheet. There are two other ways to get to the same setup: • Exit and restart the application to get back to the initial state. Go into the Paths menu and select ‘MIC to Speaker’. This should display an identical setup, press the ‘Write Config’ button to write the data to the chip. 5 Preliminary • Type the following values in the three text boxes in the top left corner: 0464 C7E0 0003 Press the ‘Load’ button, This will also set up the same configuration. Press the ‘Write Config’ button to write the data to the chip. 6 Preliminary Configuration Registers The ISD5216 is a very versatile chip where the analog audio signal can be routed and processed in a variety of ways. Writing to three configuration registers sets up the internal path. To aid the setup of the signal paths, the available paths are displayed graphically and the currently selected path highlighted in blue while the available but inactive paths are shown in gray. An arrow is only highlighted if there is a signal at the input end, and the signal can be accepted at the other end. The easiest way to setup a path is from the signal input towards the output. There are a number of ways to set up the path of analog audio, Note: The configuration registers are not actually written to the chip until the ‘Write Config’ button is pressed: 1. The controls on the main application window can be used to setup any path through the system. Set all controls so that the desired path is highlighted and click ‘Write Config’ to write the configuration to the chip. An arrow is only highlighted if there is a connection at both ends of the arrow. To setup a configuration, start from the input and move towards the outputs. For example, the paths to the CODEC will not be highlighted unless the A/D converter is switched on. 2. A value can be typed directly into the configuration register boxes. Pressing the load button will update the graphics on the main display. The configuration register setup should be written in hex numbers. 3. The ‘Paths’ menu contains stored paths that will setup a given configuration. It is possible to add and remove paths from this menu to save commonly used paths. The currently selected configuration is displayed in three ways: • Graphically by highlighted arrows. • A hexadecimal number labeled ‘CFG0’, ‘CFG1 and ‘CFG2’ • A binary number with the bit labels used in the datasheet The buttons used for configuration register setup is: Load - Update the current configuration with the settings in the textboxes in the top left corner Write Config – Write the settings currently selected to the chip. Chip Select – Choose whether to use the main or secondary board 7 Preliminary Storing Custom Configurations The application comes pre-configured with a few useful paths that can be found in the Paths menu. To add new paths, simply set up the desired configuration and select ‘Add Path’ from the Paths menu, a window will appear asking for a name for this configuration. Fill in a descriptive name (max 32 characters) and click OK to store this path. The paths are permanently stored on the computer. A maximum of 32 paths can be stored. To remove a stored path, select the path from the Path menu and click ‘Remove Path’ in the Path menu. The Path will be permanently removed. Analog Play and Record The ES521 Demo System allows full playback and record capabilities from the main application window. The 5216 supports two types of addressing: Use current address – Recording or Playback starts from the position of the current address pointer, no address is sent as part of the command. The address pointer can be retrieved from by pressing the ‘Read Status’ button which displays the address bytes as two hexadecimal numbers (high and low address byte) Supply address – Record and Playback can be setup by sending an address with the Play or Record command. See the 5216 datasheet for addressing details. Play – Play from the current address Play from address – Play from the address given in the box below the button. Record – Record from the current address. Record from address – Record from the address given in the box below the button. The Status Register The Status register gives an indication of what the chip is currently doing, and the current address pointer. Select which chip to use (main or secondary 5216) and click the ‘Read Status’ button near the bottom of the screen to update the status. It gives the following information: EOM OVF RDY PD PRB Address Table 1 – Status Register bits Indicates that an End Of Message interrupt has occurred Indicates that Recording or Playback reached the end of the array When set, the chip is ready to accept new commands. Set when the chip is powered down Set when chip is in playback mode, cleared when in record mode The current address pointer to the memory array 8 Preliminary Digital Read and Write The ISD5216 chip allows writing of digital data as well as analog. Any address can be used for either analog or digital storage, but not both at the same time. The demo application shows the capability to read and write text into memory and also read the raw data out of any memory cell. The Address box at the top of the window is shared for all operations, type in a hex number between 0 and FFFF to specify a 64 bit block. If no address is specified, the application is going to use the current address pointer. For details about addressing, please refer to the datasheet. Reading and Writing Strings Erase: Pressing this button will erase one page of data (2048 bits), it is not possible to erase a smaller number of bits. Read Data: Reads a string of characters previously stored with the Write Data button. Write Data: Writes a string to non-volatile digital memory (max 256 characters) Reading Raw Data The program allows reading of the raw data from any position in the array. Use the address box at the top of the window or leave it blank for using the current address. Type the number of 64 bit words to read (a decimal number) and press Read Raw Data to retrieve the data. 9 Preliminary Figure 3 – Digital Read and Write Dialog Address used for All operations Raw data in hexadecimal notation 10 Preliminary On Board Clock Generation The ES521 Evaluation System has a pair of jumper selectable oscillators. Please refer to the datasheet for details of operating modes. There are three clocks supplied to the 5216s: MCLK – The main clock straight from the oscillator. 2 SCK – Bit clock used for I S or PCM data. 2 WS – Word sync / Frame sync used by I S or PCM data. PCM mode uses the 13.824MHz oscillator to generate an 8kHz signal commonly used in telecom applications. The clock jumper(J9) must be set to the 13.824MHz setting and CODEC jumper (J1) must be set to PCM. The clock generator allows short and long frame sync to be selected. Note: The frame sync setting is not part of the configuration registers and therefore applies to both devices. It is not stored in the paths setup. 2 2 I S mode uses a 20.48MHz oscillator to generate the I S bit clock and there is only one word sync 2 length setting. The CODEC jumper(J9) must be in the I S position Running One Or Two Devices The Demo Board is set up to allow running either one of the two devices from the PC parallel 2 port, and the central bank of DIP switches allows decoupling of the I C and CODEC buses so that the devices can be controlled independently. 2 The headers bring out the full I C and CODEC buses as well as the RAC and INT pin of each device. In the normal mode with the DIP switches on, the devices are connected together allowing the CODECs of both devices to communicate with each other, and the PC to control the 2 I C bus of both devices. Disabling the CODEC DIP switches allows for example another CODEC chip to be connected. If the external CODEC is connected to the main 5216, the external CODEC will be in slave mode, if connected to the secondary 5216, the clocks from the clock generator on the Demo Board can be disconnected and the secondary 5216 run in slave mode. 11 Preliminary Setting up the board The board has the following connectors and possible setups: Clock Configuration Jumper (J9) The clock jumper is only needed for operations involving the CODEC, the jumper allows selection between the 13.824MHz and the 20.48MHz oscillator on the board. 13.824MHz is used for 8kHz applications such as A-law or µ-law CODEC operation. 20.48MHz is divided down to 44.1kHz to 2 interface using I S. Using long or short frame sync in PCM mode is software selectable from the main application window. CODEC Jumper (J1) 2 In I S mode, the two SDIO lines are connected together, while in PCM mode the SDIO is connected to SDI and vice versa. 2 I C Switches (SDA, SCL) 2 When the DIP switches for SDA and SCL are on, both 5216s are controlled using the I C bus 2 from the PC parallel port. Switching the I C interface off allows control of the second 5216 from the J10 header. Note that pull-ups must be provided by the external bus driver in that case. CODEC Switches (SCK, WS, MCLK, SDI, SDIO) The 5216 CODECs can be connected together or run separately depending on the switch setup. The switches allow the clocks generated on the main board to be connected to the secondary board as well, and the CODEC data lines allow digital communication between the devices. The clocks are always connected to the main board, but switching the CODEC off allows the secondary board to be controlled by another device using the J10 header. Recommended power supply The board can be driven by a 9V battery or a 5 to 9V DC supply with positive polarity rated at 500 mA 12 Preliminary ES521 Schematics Connectors and clock generation J6 SPDT SWITCH SW2 VCCD + - 9V Cell P1 13 25 12 24 11 23 10 22 9 21 8 20 7 19 6 18 5 17 4 16 3 15 2 14 1 CONNECTOR DB25 14 14 C12 RAC_1 0.1uf R7 1K U3B SN74LV125AD U3A 3 2 5 7 4 VCCD 7 SCL_1 1 1 2 1 2 3 14 R8 1K J8 U3C U3D RB2 12 9 8 + C15 RB1 SN74LV125AD RB0 13 7 SDA_1 7 10 + 1uf USE FREE TO SHORT(.156) TRACK U4 1 2 11 C13 0.1uf IN C14 100uf @ 20V RB3 3V OUT VCCA R16 3.6K SN74LV125AD NJU7201L30 1 HEADER 2 VSS (GND) 3V OUT IN TP3 TP4 AGND DGND 1 1 TP5 TP6 AGND DGND 1 1 Single point connection close to J1 TP7 TP8 AGND DGND 1 1 U5 1 1 NC OUT 4 VSS VCC 2 D1 LED 3 C16 0.1uf 1 TP1 TP2 AGND DGND 1 1 3 2 PJ_202A_POWER_JACK DC POWER JACK w SW 14 VSS (GND) 3 1 3 2 1 3 2 SN74LV125AD RAC_2 VCCD NJU7201L30 1 9V BATT HOLDER J7 +9VDC 6 U2 1 2 2 + C17 1uf 5 8 VCCD J9 C18 0.01uf B500CT3E 20.480 MHZ VCCD C19 0.1uf VCCD HEADER 3 U6 1 R9 470 RB0 RB1 RB2 RB3 1 2 3 1 NC U7 1 2 3 4 5 6 7 8 9 RA2 RA1 RA3 RA0 RA4 OSC1 MCLR OSC2 VSS VDD RB0 RB7 RB1 RB6 RB2 RB5 RB3 RB4 PIC16F84A-20P OUT 18 17 16 15 14 13 12 11 10 4 SCK_1 WS_1 MCLK_1 VSS B500CT3E 13.824 MHZ C22 0.01uf C23 0.1uf 13 VCC 5 8 VCCD C20 0.01uf C21 0.1uf MCLK_1 Preliminary Main 5216 J1 J2 1 2 3 4 5 6 7 8 9 10 SDA_1 SCL_1 SCK_1 WS_1 MCLK_1 SDIO_1 SDI_1 SW1 SDIO_1 1 2 3 SDIO_2 SDA_2 SCL_2 SCK_2 WS_2 MCLK_2 SDI_2 SDIO_2 SDA_1 SCL_1 SCK_1 WS_1 MCLK_1 SDIO_1 SDI_1 HEADER 3 RAC_1 SW DIP-7 INT_1 VCCD VCCA R1 R2 10K + 10K C1 0.01uf C4 47uf MJ_3536 C8 2 3 1 0.1uf R4 1K 25 26 RAC_1 INT_1 27 MCLK_1 17 SCL SDA A0 A1 16 VCCA 2 4 5 3 SCL_1 SDA_1 RAC INT DUT 1 MCLK U1 C6 0.01uf SDI SDIO WS SCK N/C 9 10 11 MIC+ MICMICBS VSSA VSSA VSSA R5 C9 0.1uf MJ_3536 0.1uf R3 1K J5 MJ_3536 2 3 1 15 13 12 ACAP C11 4.7uf 8 14 22 1.5K 7 6 2 3 1 18 AUXIN VSSD VSSD C10 0.1uf SDI_1 SDIO_1 WS_1 SCK_1 19 SP+ SP- 1 2 J3 C7 23 24 21 20 AUXOUT X1 MICROPHONE C5 0.1uf VCCD ISD5216 J4 + C3 47uf 28 1 VCCD C2 0.1uf VCCD VCCD HEADER 10 R6 1.5K ACAP_AGND 14 Preliminary Second 5216 J10 1 2 3 4 5 6 7 8 9 10 SDA_2 SCL_2 SCK_2 WS_2 MCLK_2 SDI_2 SDIO_2 VCCD VCCA RAC_2 INT_2 + R10 R11 10K 10K + C26 47uf C27 47uf SCL_2 SDA_2 J12 2 3 1 C31 RAC_2 INT_2 0.1uf R13 1K MCLK_2 25 26 27 17 MJ_3536 SCL SDA A0 A1 16 ISD5216 2 4 5 3 VCCA VCCD RAC INT DUT 2 MCLK C29 0.01uf U8 SDI SDIO WS SCK N/C AUXOUT AUXIN SP+ SP- R14 C32 0.1uf 9 10 11 MIC+ MICMICBS 7 6 1.5K VSSA VSSA VSSA C33 0.1uf 8 14 22 1 2 VSSD VSSD X2 MICROPHONE C28 0.1uf VCCD 28 1 VCCD C25 0.1uf VCCD VCCD HEADER 10 C24 0.01uf ACAP SDI_2 SDIO_2 WS_2 SCK_2 19 0.1uf 2 3 1 R12 1K MJ_3536 18 J13 15 13 2 3 1 12 MJ_3536 + C34 4.7uF R15 1.5K ACAP_AGND 15 J11 C30 23 24 21 20