74LCX16240 LOW VOLTAGE CMOS 16-BIT BUS BUFFER (3-STATE INV.) WITH 5V TOLERANT INPUTS AND OUTPUTS ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS AND OUTPUTS HIGH SPEED: tPD =4.5 ns (MAX.) at VCC = 3.0V POWER-DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24 mA (MIN) PCI BUS LEVELS GUARANTEED AT 24mA BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2.7V to 3.6V (1.5V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 16240 LATCH-UP PERFORMANCE EXCEEDS 500mA ESD PERFORMANCE: HBM >2000V; MM > 200V T (TSSOP48 Package) ORDER CODES : 74LCX16240T PIN CONNECTION DESCRIPTION The LCX16240 is a low voltage CMOS 16-BIT BUS BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for both inputs and outputs. Any nG output control governs four BUS BUFFERS. Output Enable inputs (nG) tied together give full 16-bit operation. When nG is LOW, the outputs are on. When nG is HIGH, the output are in high impedance state. This device is designed to be used with 3 state memory address drivers, etc. It has better speed performance at 3.3V than 5V LSTTL family combined with the true CMOS low power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. February 1999 1/8 74LCX16240 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL IEC LOGIC SYMBOLS NAME AND FUNCT ION 1 1G 2, 3, 5, 6 1Y1 to 1Y4 Output Enable Input Data Outputs 8, 9, 11, 12 2Y1 to 2Y4 Data Outputs 13, 14, 16, 17 3Y1 to 3Y4 Data Outputs 19, 20, 22, 23 4Y1 to 4Y4 Data Outputs 24 4G Output Enable Input 25 3G Output Enable Input 30, 29, 27, 26 4A1 to 4A4 Data Inputs 36, 35, 33, 32 3A1 to 3A4 Data Inputs 41, 40, 38, 37 2A1 to 2A4 Data Inputs 47, 46, 44, 43 1A1 to 1A4 Data Inputs 48 2G 4,10, 15, 21, 28, 34, 39, 45 GND Ground (0V) Output Enable Input 7, 18, 31, 42 VCC Positive Supply Voltage TRUTH TABLE INPUT An Yn L L H L H L H X Z X:”H” or ”L” Z: High impedance 2/8 OUTPUT G 74LCX16240 ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Supply Voltage Value Unit -0.5 to + 7.0 V VI DC Input Voltage -0.5 to + 7.0 V VO DC Output Voltage (OFF state) -0.5 to + 7.0 V VO DC Output Voltage (High or Low State) (note1) -0.5 to VCC + 0.5 V IIK DC Input Diode Current - 50 mA IOK DC Output Diode Current (note2) ± 50 mA IO DC Output Source/Sink Current ± 50 mA ± 100 mA ICC orIGND Tstg TL DC VCC or Ground Current Per Supply Pin Storage Temperature Lead Temperature (10 sec) -65 to +150 o 300 o C C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. 1) IO absolute maximum rating must be observed 2) VO < GND, VO > VCC RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Supply Voltage (note 1) Value Unit 2.0 to 3.6 V VI Input Voltage 0 to 5.5 V VO Output Voltage (OFF state) 0 to 5.5 V VO Output Voltage (High or Low State) 0 to VCC V IOH, IOL High or Low Level Output Current (VCC = 3.0 to 3.6V) ± 24 mA IOH, IOL High or Low Level Output Current (VCC = 2.7 to 3.0V) ± 12 mA Top dt/dv Operating Temperature: Input Transition Rise or Fall Rate (V CC = 3.0V) (note 2) -40 to+85 0 to 10 o C ns/V 1) Truth Table guaranteed: 1.5V to3.6V 2) VIN from0.8V to 2.0V 3/8 74LCX16240 DC SPECIFICATIONS Symb ol Parameter Test Co nditi ons Value VIH High Level Input Voltage VIL Low Level Input Voltage VOH High Level Output Voltage Min. Low Level Output Voltage 2.7 to 3.6 VI = VIH or VIL 2.7 to 3.6 2.7 3.0 3.0 II Input Leakage Current IOZ 3 State Output Leakage Current Ioff Power Off Leakage Current ICC Quiescent Supply Current ∆ICC ICC incr. per input V 0.8 3.0 VOL Max. 2.0 2.7 to 3.6 2.7 Un it -40 to 85 o C V CC (V) VI = VIH or VIL IO=-100 µA VCC-0.2 IO=-12 mA 2.2 IO=-18 mA 2.4 IO=-24 mA 2.2 V V IO=100 µA 0.2 IO=12 mA 0.4 IO=16 mA 0.4 IO=24 mA 0.55 V VI = 0 to 5.5 V ±5 µA 2.7 to 3.6 VI = VIH orVIL VO = 0 to 5.5V ±5 µA 0 VI orVO = 5.5V(per pin) 10 µA 2.7 to 3.6 VI = VCC orGND 20 VI orVO = 3.6 to 5.5V ±20 µA VIH = VCC -0.6V 500 µA 2.7 to 3.6 2.7 to 3.6 DYNAMIC SWITCHING CHARACTERISTICS Symb ol Parameter Test Con dition s VOLP VOLV Dynamic Low Voltage Quiet Output (note 1) 3.3 Value Un it T A = 25 o C V CC (V) Min . CL = 50 pF VIL = 0 V VIH = 3.3V T yp. Max. 0.8 -0.8 V 1) Number ofoutputs defined as ”n”. Measured with”n-1” outputs switching from HIGH to LOW or LOW t o HIGH. The remaining output is measured in the LOW state. 4/8 74LCX16240 AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr = tf = 2.5 ns) Symb ol Parameter V CC (V) tPLH tPHL Propagation Delay Time tPZL tPZH Output Enable Time tPLZ tPHZ Output Disable Time tOSLH tOSHL Output to Output Skew Time (note 1, 2) Test Con dition Waveform 2.7 Value -40 to 85 o C 1 3.0 to 3.6 2.7 3.0 to 3.6 2.7 3.0 to 3.6 2 2 Min. 1.5 Max. 5.3 1.5 1.5 1.5 1.5 1.5 4.5 6.0 5.4 5.4 5.3 3.0 to 3.6 1.0 Un it ns ns ns ns 1) Skew is defined as the absolute value of the difference between the actual propagation delay for any twooutputs of the same device switching in the same direction, either HIGH or LOW (tOSLH = |tPLHm - tPLHn|, tOSHL = |tPHLm - tpHLn|) 2) Parameter guaranteed by design CAPACITIVE CHARACTERISTICS Symb ol Parameter Test Co nditi ons V CC (V) Valu e T A = 25 oC Min. T yp. Un it Max. Input Capacitance 3.3 VIN = 0 to VCC 7 pF COUT Output Capacitance 3.3 VIN = 0 to VCC 15 pF CPD Power Dissipation Capacitance (note 1) 3.3 fIN = 10MHz VIN = 0 or VCC 60 pF CIN 1) CPD isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. Average operting current can be obtained by the following equation. I CC(opr) = CPD • VCC • fIN + ICC/16 (per circuit) TEST CIRCUIT T EST tPLH , tPHL SW IT CH Open tPZL , tPLZ 6V tPZH , tPHZ GND CL = 50 pF or equivalent (includes jigand probe capacitance) RL = R1 = 500Ω orequivalent RT = ZOUT of pulse generator (typically 50Ω) 5/8 74LCX16240 WAVEFORM 1: PROPAGATION DELAYS (f=1MHz; 50% duty cicle) WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cicle) 6/8 74LCX16240 TSSOP48 MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. A MIN. TYP. 1.1 MAX. 0.433 A1 0.05 0.10 0.15 0.002 0.004 0.006 A2 0.85 0.9 0.95 0.335 0.354 0.374 b 0.17 0.27 0.0067 0.011 c 0.09 0.20 0.0035 0.0079 D 12.4 12.5 12.6 0.408 0.492 0.496 E 7.95 8.1 8.25 0.313 0.319 0.325 E1 6.0 6.1 6.2 0.236 0.240 0.244 e 0.5 BSC 0.0197 BSC K 0o 4o 8o 0o 4o 8o L 0.50 0.60 0.70 0.020 0.024 0.028 A A2 A1 b K e L E c D E1 PIN 1 IDENTIFICATION 1 7/8 74LCX16240 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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