74VHCT245A OCTAL BUS TRANSCEIVER (3-STATE) PRELIMINARY DATA ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4.5 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS & OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 245 IMPROVED LATCH-UP IMMUNITY LOW NOISE: VOLP = 0.9V (Max.) DESCRIPTION The 74VHCT245A is an advanced high-speed CMOS OCTAL BUS TRANSCEIVER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. This IC is intended for two-way asynchronous communication between data busses; the direction of data trasmission is determined by the M (Micro Package) T (TSSOP Package) ORDER CODES : 74VHCT245AM 74VHCT245AT level of the DIR input. The enable input G can be used to disable the device so that the busses are effectively isolated. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. IT IS PROHIBITED TO APPLY A SIGNAL TO A TERMINAL WHEN IT IS IN OUTPUT MODE AND WHEN A BUS TERMINAL IS FLOATING (HIGH IMPEDANCE STATE) IT IS REQUESTED TO FIX THE INPUT LEVEL BY MEANS OF EXTERNAL PULL DOWN OR PULL UP RESISTOR. PIN CONNECTION AND IEC LOGIC SYMBOLS August 1999 1/9 74VHCT245A INPUT/OUTPUT EQUIVALENT CIRCUIT INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCT ION 1 DIR 2, 3, 4, 5, 6, 7, 8, 9 A1 to A8 Data Inputs/Outputs Directional Control 18, 17, 16, 15, 14, 13, 12, 11 B1 to B8 Data Inputs/Outputs 19 G Output Enable Input 10 GND Ground (0V) 20 VCC Positive Supply Voltage TRUTH TABLE INPUT G OUT PUT A BUS L L OUTPUT INPUT A=B L H INPUT OUTPUT B=A H X Z Z Z X:”H” or ”L” Z: High impedance 2/9 F UNCTION DIR B BUS 74VHCT245A ABSOLUTE MAXIMUM RATINGS Symbol VCC Value Unit Supply Voltage Parameter -0.5 to +7.0 V DC Input Voltage (DIR, G) -0.5 to +7.0 V VI/O DC Bus I/O Voltage (see note 1) -0.5 to +7.0 V VI/O DC Bus I/O Voltage (see note 2) VI -0.5 to VCC + 0.5 V IIK DC Input Diode Current - 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 25 mA ± 75 mA ICC or IGND DC VCC or Ground Current Tstg TL Storage Temperature Lead Temperature (10 sec) -65 to +150 o 300 o C C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. 1) Output in OffState 2) High or Low State. IO absolute maximum rating must be observed. RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Supply Voltage Valu e Unit 4.5 to 5.5 V Input Voltage (DIR, G) 0 to 5.5 V VI/O Bus I/O Voltage (see note 1) 0 to 5.5 V VI/O Bus I/O Voltage (see note 2) Top Operating Temperature VI dt/dv Input Rise and Fall Time (see note 3) (V CC = 5.0 ± 0.5V) 0 to VCC -40 to +85 0 to 20 V o C ns/V 1) Output in OffState 2) High or Low State. IO absolute maximum rating must be observed. 3) VIN from 0.8 to 2V 3/9 74VHCT245A DC SPECIFICATIONS Symb ol Parameter T est Cond ition s Min. 2 VIH High Level Input Voltage 4.5 to 5.5 VIL Low Level Input Voltage 4.5 to 5.5 VOH High Level Output Voltage VOL IOZ II Low Level Output Voltage High Impedance Output Leakage Current Input Leakage Current Value T A = 25 o C V CC (V) Typ . Un it -40 to 85 o C Max. Min . Max. 2 0.8 V 0.8 V 4.5 I O =-50 µA 4.4 4.5 IO=-8 mA 3.94 4.5 I O=50 µA 0.1 0.1 4.5 IO=8 mA 0.36 0.44 VI = VIH or VIL VO = 0V to 5.5V ±0.25 ±2.5 µA 5.5 0 to 5.5 VI = 5.5V or GND ±0.1 ±1.0 µA 4.5 4.4 V 3.8 0.0 V ICC Quiescent Supply Current 5.5 VI = VCC or GND 4 40 µA ∆ICC Additional Worst Case Supply Current 5.5 One Input at 3.4V, other input at VCC or GND 1.35 1.5 mA IOPD Output Leakage Current 0 VOUT = 5.5V 0.5 5.0 µA AC ELECTRICAL CHARACTERISTICS (Input t r = tf =3 ns) Symb ol Parameter Test Co ndition V CC (*) C L (pF) (V) tPLH tPHL Propagation Delay Time 5.0 15 Value T A = 25 o C Min. Typ . Max. 4.5 7.5 5.0 50 5.5 8.5 1.0 9.5 tPZL tPZH Output Enable Time tPLZ tPHZ Output Disable Time 5.0 5.0 5.0 15 50 50 9.0 10.0 9.5 14.5 15.5 15.0 1.0 1.0 1.0 15.5 16.5 16.0 tOSLH tOSHL Output to Output Skew Time (note 1) 5.0 50 RL = 1KΩ RL = 1KΩ (*) Voltage range is 5V ± 0.5V Note 1: Parameter guaranteed by design. tsoLH = |tpLHm- tpLHn|, tsoHL = |tpHLm - tpHLn| 4/9 1.0 Un it -40 to 85 o C Min . Max. 1.0 8.5 1.0 ns ns ns ns 74VHCT245A CAPACITIVE CHARACTERISTICS Symb ol Parameter Test Co nditions Valu e T A = 25 oC Min. Un it -40 to 85 o C T yp. Max. C IN Input Capacitance 4 10 Min. Max. CI/O Bus Input Capacitance 8 pF CPD Power Dissipation Capacitance (note 1) 13 pF 10 pF 1) CPD isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto Test Circuit).Average operting current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN + ICC/8(per circuit) DYNAMIC SWITCHING CHARACTERISTICS Symb ol Parameter T est Cond ition s Dynamic Low Voltage Quiet Output (note 1, 2) 5.0 VIHD Dynamic High Voltage Input (note 1, 3) 5.0 VILD Dynamic Low Voltage Input (note 1, 3) 5.0 VOLP VOLV Value T A = 25 o C V CC (V) Min. -0.9 C L = 50 pF Un it -40 to 85 o C Typ . Max. 0.6 0.9 Min . Max. -0.6 2 V 0.8 1) Worst case package. 2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.0V, (n -1) outputs switching and one output at GND. 3) Max number of data inputs (n) switching. (n-1) switching 0V to3.0V. Inputs under test switching: 3.0V to threshold (VILD), 0V to threshold (VIHD), f=1MHz. TEST CIRCUIT T EST tPLH , tPHL SW IT CH Open tPZL , tPLZ VCC tPZH , tPHZ GND CL = 15/50 pF or equivalent (includes jig and probe capacitance) RL = R1 = 1KΩ orequivalent RT = ZOUT of pulse generator (typically 50Ω) 5/9 74VHCT245A WAVEFORM 1: PROPAGATION DELAYS (f=1MHz; 50% duty cycle) WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle) 6/9 74VHCT245A SO-20 MECHANICAL DATA mm DIM. MIN. TYP. A a1 inch MAX. MIN. TYP. 2.65 0.10 0.104 0.20 a2 MAX. 0.004 0.007 2.45 0.096 b 0.35 0.49 0.013 0.019 b1 0.23 0.32 0.009 0.012 C 0.50 0.020 c1 45 (typ.) D 12.60 13.00 0.496 0.512 E 10.00 10.65 0.393 0.419 e 1.27 0.050 e3 11.43 0.450 F 7.40 7.60 0.291 0.299 L 0.50 1.27 0.19 0.050 M S 0.75 0.029 8 (max.) P013L 7/9 74VHCT245A TSSOP20 MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. A MIN. TYP. 1.1 0.433 A1 0.05 0.10 0.15 0.002 0.004 0.006 A2 0.85 0.9 0.95 0.335 0.354 0.374 b 0.19 0.30 0.0075 0.0118 c 0.09 0.2 0.0035 0.0079 D 6.4 6.5 6.6 0.252 0.256 0.260 E 6.25 6.4 6.5 0.246 0.252 0.256 E1 4.3 4.4 4.48 0.169 0.173 0.176 e 0.65 BSC 0.0256 BSC K 0o 4o 8o 0o 4o 8o L 0.50 0.60 0.70 0.020 0.024 0.028 A A2 A1 b K e E1 PIN 1 IDENTIFICATION 1 L E c D 8/9 MAX. 74VHCT245A Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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