NSC 54AC02D

54AC02
Quad 2-Input NOR Gate
General Description
Features
The ’AC02 contains four, 2-input NOR gates.
n
n
n
n
ICC reduced by 50% on 54AC/74AC02 only
Outputs source/sink 24 mA
’ACT02 has TTL-compatible inputs
Standard Military Drawing (SMD)
— AC02: 5962-87612
n For Military 54ACT02 device see 54ACTQ02
Logic Symbol
IEEE/IEC
DS100258-1
Pin Names
Description
An, Bn
Inputs
On
Outputs
Connection Diagrams
Pin Assignment for DIP and Flatpak
Pin Assignment for LCC
DS100258-3
DS100258-2
FACT™ is a trademark of Fairchild Semiconductor Corporation.
© 1998 National Semiconductor Corporation
DS100258
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54AC02 Quad 2-Input NOR Gate
July 1998
Absolute Maximum Ratings (Note 1)
Junction Temperature (TJ)
CDIP
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (VCC)
DC Input Diode Current (IIK)
VI = −0.5V
VI = VCC + 0.5V
DC Input Voltage (VI)
DC Output Diode Current (IOK)
VO = −0.5V
VO = VCC + 0.5V
DC Output Voltage (VO)
DC Output Source or Sink
Current (IO)
DC VCC or Ground Current per
Output Pin (ICC or IGND)
Storage Temperature (TSTG)
175˚C
Recommended Operating
Conditions
−0.5V to +7.0V
Supply Voltage (VCC)
’AC
Input Voltage (VI)
Output Voltage (VO)
Operating Temperature (TA)
54AC
Minimum Input Edge Rate (∆V/∆t)
’AC Devices
VIN from 30% to 70% of VCC
VCC @ 3.3V, 4.5V, 5.5V
−20 mA
+20 mA
−0.5V to VCC + 0.5V
−20 mA
+20 mA
−0.5V to to VCC + 0.5V
± 50 mA
2.0V to 6.0V
0V to VCC
0V to VCC
−55˚C to +125˚C
125 mV/ns
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. National does not recommend operation of FACT™ circuits outside databook specifications.
± 50 mA
−65˚C to +150˚C
DC Characteristics for ’AC Family Devices
Symbol
Parameter
VCC
(V)
54AC
TA =
−55˚C to +125˚C
Units
Conditions
Guaranteed Limits
VIH
VIL
VOH
Minimum High Level
Input Voltage
Maximum Low Level
Input Voltage
Minimum High Level
Output Voltage
3.0
2.1
4.5
3.15
5.5
3.85
3.0
0.9
4.5
1.35
5.5
1.65
3.0
2.9
4.5
4.4
5.5
5.4
V
VOUT = 0.1V
or VCC − 0.1V
V
VOUT = 0.1V
or VCC − 0.1V
IOUT = −50 µA
V
(Note 2)
VIN = VIL or VIH
VOL
Maximum Low Level
Output Voltage
3.0
2.4
4.5
3.7
5.5
4.7
3.0
0.1
4.5
0.1
5.5
0.1
−12 mA
V
IOH
−24 mA
−24 mA
IOUT = 50 µA
V
(Note 2)
VIN = VIL or VIH
3.0
0.5
4.5
0.5
5.5
0.5
12 mA
V
IOL
24 mA
24 mA
IIN
Maximum Input
Leakage Current
5.5
± 1.0
IOLD
(Note 3) Minimum
Dynamic Output
Current
5.5
50
mA
VOLD = 1.65V Max
5.5
−50
mA
VOHD = 3.85V Min
5.5
40.0
µA
VIN = VCC
or GND
IOHD
ICC
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Maximum Quiescent
Supply Current
2
µA
VI = VCC, GND
DC Characteristics for ’AC Family Devices
(Continued)
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC.
ICC for 54AC @ 25˚C is identical to 74AC @ 25˚C.
AC Electrical Characteristics
Parameter
Min
Max
Propagation Delay
3.3
1.0
9.0
5.0
1.5
7.0
3.3
1.0
9.0
5.0
1.5
7.5
Symbol
tPLH
Propagation Delay
tPHL
54AC
TA = −55˚C to +125˚C
CL = 50 pF
VCC
(V)
(Note 5)
Units
Fig. No.
ns
ns
Note 5: Voltage Range 3.3 is 3.3V ± 0.3V
Voltage Range 5.0 is 5.0V ± 0.5V
Capacitance
Typ
Units
CIN
Symbol
Input Capacitance
Parameter
4.5
pF
CPD
Power Dissipation Capacitance
30.0
pF
3
Conditions
VCC = OPEN
VCC = 5.0V
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4
Physical Dimensions
inches (millimeters) unless otherwise noted
20 Terminal Ceramic Leadless Chip Carrier (L)
NS Package Number E20A
14 Lead Ceramic Dual-In-Line Package (D)
NS Package Number J14A
5
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54AC02 Quad 2-Input NOR Gate
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
14 Lead Ceramic Flatpak (F)
NS Package Number W14B
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