NSC MM54HC148

MM54HC148/MM74HC148
8-3 Line Priority Encoder
General Description
All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.
This priority encoder utilizes advanced silicon-gate CMOS
technology. It has the high noise immunity and low power
consumption typical of CMOS circuits, as well as the speeds
and output drive similar to LB-TTL.
This priority encoder accepts 8 input request lines 0– 7 and
outputs 3 lines A0–A2. The priority encoding ensures that
only the highest order data line is encoded. Cascading circuitry (enable input EI and enable output EO) has been provided to allow octal expansion without the need for external
circuitry. All data inputs and outputs are active at the low
logic level.
Features
Y
Y
Typical propagation delay: 13 ns
Wide supply voltage range: 2V – 6V
Connection Diagram
Dual-In-Line Package
TL/F/9390 – 1
Order Number MM54HC148 or MM74HC148
Truth Table
Inputs
Outputs
EI
0
1
2
3
4
5
6
7
A2 A1 A0 GS EO
H
L
L
L
L
L
L
L
L
L
X
H
X
X
X
X
X
X
X
L
X
H
X
X
X
X
X
X
L
H
X
H
X
X
X
X
X
L
H
H
X
H
X
X
X
X
L
H
H
H
X
H
X
X
X
L
H
H
H
H
X
H
X
X
L
H
H
H
H
H
X
H
X
L
H
H
H
H
H
H
X
H
L
H
H
H
H
H
H
H
H
H
L
L
L
L
H
H
H
H
H
H
L
L
H
H
L
L
H
H
H
H
L
H
L
H
L
H
L
H
H
H
L
L
L
L
L
L
L
L
H
L
H
H
H
H
H
H
H
H
H e High, L e Low, X e irrelevant
C1995 National Semiconductor Corporation
TL/F/9390
RRD-B30M105/Printed in U. S. A.
MM54HC148/MM74HC148 8-3 Line Priority Encoder
February 1988
Absolute Maximum Ratings (Notes 1 & 2)
Operation Conditions
Min Max Units
Supply Voltage (VCC)
2
6
V
DC Input or Output Voltage
0
VCC
V
(VIN, VOUT)
Operating Temperature Range (TA)
b 40 a 85
MM74HC
§C
b 55 a 125
MM54HC
§C
Input Rise or Fall Times
(tr, tf) VCC e 2.0V
1000
ns
VCC e 4.5V
500
ns
VCC e 6.0V
400
ns
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (VCC)
b 0.5 to a 7.0V
DC Input Voltage (VIN)
DC Output Voltage (VOUT)
Clamp Diode Current (IIK, IOK)
DC Output Current, per pin (IOUT)
DC VCC or GND Current, per pin (ICC)
Storage Temperature Range (TSTG)
Power Dissipation (PD)
(Note 3)
S.O. Package only
Lead Temperature (TL)
(Soldering 10 sec.)
b 1.5 to VCC a 1.5V
b 0.5 to VCC a 0.5V
g 20 mA
g 25 mA
g 50 mA
b 65§ C to a 150§ C
600 mW
500 mW
260§ C
DC Electrical Characteristics (Note 4)
Symbol
Parameter
Conditions
VCC
TA e 25§ C
74HC
TA e b40 to 85§ C
Typ
54HC
TA e b55 to 125§ C
Units
Guaranteed Limits
VIH
Minimum High Level
Input Voltage
2.0V
4.5V
6.0V
1.5
3.15
4.2
1.5
3.15
4.2
1.5
3.15
4.2
V
V
V
VIL
Maximum Low Level
Input Voltage**
2.0V
4.5V
6.0V
0.5
1.35
1.8
0.5
1.35
1.8
0.5
1.35
1.8
V
V
V
VOH
Minimum High Level
Output Voltage
VIN e VIH or VIL
lIOUTl s 20 mA
2.0V
4.5V
6.0V
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
V
V
4.5V
6.0V
4.7
5.2
3.96
5.48
3.84
5.34
3.7
5.2
V
V
2.0V
4.5V
6.0V
0
0
0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
V
V
VIN e VIH or VIL
lIOUTl s 4.0 mA
lIOUTl s 5.2 mA
4.5V
6.0V
0.2
0.2
0.26
0.26
0.33
0.33
0.4
0.4
V
V
VIN e VIH or VIL
lIOUTl s 4.0 mA
lIOUTl s 5.2 mA
VOL
Maximum Low Level
Output Voltage
VIN e VIH or VIL
lIOUTl s 20 mA
IIN
Maximum Input
Current
VIN e VCC or GND
6.0V
g 0.1
g 1.0
g 1.0
mA
ICC
Maximum Quiescent
Supply Current
VIN e VCC or GND
IOUT e 0 mA
6.0V
8.0
80
160
mA
Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature deratingÐplastic ‘‘N’’ package: b 12 mW/§ C from 65§ C to 85§ C, ceramic ‘‘J’’ package: b 12 mW/§ C from 100§ C to 125§ C.
Note 4: For a power supply of 5V g 10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing
with this supply. Worst case VIH and VIL occur at VCC e 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and
IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used.
**VIL limits are currently tested at 20% of VCC. The above VIL specification (30% of VCC) will be implemented no later than Q1, CY’89.
2
AC Electrical Characteristics VCC e 5V, TA e 25§ C, CL e 15 pF, tr e tf e 6 ns
Symbol
Parameter
tPHL, tPLH
Maximum Propagation Delay,
Any Input to Any Output
Conditions
Typ
Units
14
ns
AC Electrical Characteristics VCC e 2.0V to 6.0V, CL e 50 pF, tr e tf e 6 ns (unless otherwise specified)
Symbol
Parameter
VCC
TA e 25§ C
Typ
tPHL, tPLH
tPHL, tPLH
tPHL, tPLH
tPHL, tPLH
tPHL, tPLH
tPHL, tPLH
tf, tr
74HC
54HC
b 40§ C to a 85§ C
b 55§ C to a 125§ C
Units
Guaranteed Limits
Inputs 0–7
to Outputs
A0, A1, A2
2.0V
4.5V
6.0V
14
140
28
24
175
35
30
210
42
36
ns
ns
ns
Inputs 0–7
to
Output EO
2.0V
4.5V
6.0V
15
140
28
24
175
35
30
210
42
36
ns
ns
ns
Inputs 0–7
to
Output GS
2.0V
4.5V
6.0V
17
160
32
27
200
40
34
240
48
41
ns
ns
ns
Input EI
to Outputs
A0, A1, A2
2.0V
4.5V
6.0V
17
160
32
27
200
40
34
240
48
41
ns
ns
ns
Input EI
to
Output GS
2.0V
4.5V
6.0V
12
100
20
17
125
25
21
150
30
26
ns
ns
ns
Input EI
to
Output EO
2.0V
4.5V
6.0V
12
100
20
17
125
25
21
150
30
26
ns
ns
ns
Maximum
Output Rise
and Fall Time
2.0V
4.5V
6.0V
7
75
15
13
95
19
16
110
22
19
ns
ns
ns
Cpd
Power Dissipation
Capacitance (Note 5)
52
Cin
Maximum Input
Capacitance
5
pF
10
10
Note 5: Cpd determines the no load dynamic power consumption, and the no load dynamic current consumption.
3
10
pF
4
HC148 Schematic for Datasheet
TL/F/9390 – 3
Logic Diagram
TL/F/9390 – 2
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number MM54HC148 or MM74HC148
NS Package Number J16A
5
MM54HC148/MM74HC148 8-3 Line Priority Encoder
Physical Dimensions inches (millimeters) (Continued)
Molded Dual-In-Line Package (N)
Order Number MM54HC148 or MM74HC148
NS Package Number N16E
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