Am79M535 Metering Subscriber Line Interface Circuit DISTINCTIVE CHARACTERISTICS Programmable constant-current feed Line-feed characteristics independent of battery variations Programmable loop-detect threshold On-chip switching regulator for low-power dissipation Pin for external ground-key noise filter capacitor available Ground-key detect Two-wire impedance set by single external impedance Performs polarity reversal Tip Open state for ground-start lines Supports 2.2 Vrms metering (12 and 16 kHz) On-hook transmission BLOCK DIAGRAM Ring Relay Driver RINGOUT A(TIP) C1 C2 Ground-Key Detector C3 Input Decoder and Control HPA Two-Wire Interface E1 E0 DET HPB GKFIL VTX RSN Signal Transmission Off-Hook Detector RD Power-Feed Controller B(RING) DA DB VREG L VBAT RDC Ring-Trip Detector Switching Regulator BGND CHS QBAT CHCLK VCC VEE AGND 16856B-001 Notes: 1. Am79M535—E0 and E1 inputs; ring relay driver sourced internally to BGND; ground-key filter pin. 2. Current gain (K1) = 1000. Publication# 080134 Rev: E Amendment: /0 Issue Date: October 1999 ORDERING INFORMATION Standard Products Legerity standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the elements below. Am79M535 J C TEMPERATURE RANGE C = Commercial (0°C to 70°C)* PACKAGE TYPE J = 32-Pin Plastic Leaded Chip Carrier (PL 032) PERFORMANCE GRADE Blank = Standard Specification –1 = Performance Grading –2 = Performance Grading DEVICE NAME/DESCRIPTION Am79M535 Subscriber Line Interface Circuit Valid Combinations Valid Combinations Am79M535 –1 –2 JC Valid Combinations list configurations planned to be supported in volume for this device. Consult the local Legerity sales office to confirm availability of specific valid combinations, to check on newly released combinations, and to obtain additional data on Legerity’s standard military grade products. Note: * Functionality of the device from 0°C to +70°C is guaranteed by production testing. Performance from –40°C to +85°C is guaranteed by characterizations and periodic sampling of production units. 2 Am79M535 Data Sheet BGND 2 1 DB VREG 3 A(TIP) VCC 4 B(RING) RINGOUT CONNECTION DIAGRAM Top View 32 31 30 29 TP GKFIL 6 28 DA L 7 27 RD VBAT 8 26 HPB QBAT 9 25 HPA CHS 10 24 VTX CHCLK 11 23 VEE RSVD 12 22 RSN E1 13 21 AGND DGND 19 20 C1 16 17 18 C3 DET E0 14 15 RDC 5 C2 TP Notes: 1. Pin 1 is marked for orientation. 2. TP is a thermal conduction pin tied to substrate (QBAT). 3. RSVD = Reserved. Do not connect to this pin. SLIC Products 3 PIN DESCRIPTIONS Pin Names 4 Type Description AGND Gnd Analog (quiet) ground DGND Gnd Digital ground A(TIP) Output Output of A(TIP) power amplifier BGND Gnd Battery (power) ground B(RING) Output Output of B(RING) power amplifier C3–C1 Input Decoder. TTL compatible. C3 is MSB and C1 is LSB. CHCLK Input Chopper Clock. Input to switching regulator (TTL compatible). Freq = 256 kHz (Nominal). CHS Input Chopper stabilization. Connection for external stabilization components. DA Input Ring-trip negative. Negative input to ring-trip comparator DB Input Ring-trip positive. Positive input to ring-trip comparator DET Output Detector. When enabled, logic Low indicates that the selected detector is tripped. Logic inputs C3–C1, E1, and E0 select the detector. Open-collector with a built-in 15 kΩ pullup resistor. E0 Input Read Enable. A logic Low disables DET. A logic High enables DET. E1 Input Ground-Key Enable. When E0 is High, E1 = High connects the ground-key detector to DET, and E1 = Low connects the off-hook or ring-trip detector to DET. GKFIL Capacitor Ground-Key Filter Capacitor Connection. An external capacitor for filtering out highfrequency noise from the ground-key loop can be connected to this pin. An internal 36 kΩ –20%, +40% resistor is provided to form an RC filter with the external capacitor. In versions which have a GKFIL pin, a 3.3 nF minimum capacitance must be connected from the GKFIL pin to ground. HPA Capacitor High-Pass Filter Capacitor. A(TIP) side of high-pass filter capacitor. HPB Capacitor High-Pass Filter Capacitor. B(RING) side of high-pass filter capacitor. L Output Switching Regulator Power Transistor. Connection point for filter inductor and anode of catch diode. Has up to 60 V of pulse waveform on it and must be isolated from sensitive circuits. Keep the diode connections short because of the high currents and high di/dt QBAT Battery Quiet Battery. Filtered battery supply for the signal processing circuits. RD Resistor Detector resistor. Threshold modification and filter point for the off-hook detector. RDC Resistor DC feed resistor. Connection point for the DC feed current programming network. The other end of the network connects to the Receiver Summing Node (RSN). VRDC is negative for normal polarity and positive for reverse polarity. RINGOUT Output Ring Relay Driver. Sourcing from BGND with internal diode to QBAT. RSN Input The metallic current (AC and DC) between A(TIP) and B(RING) is equal to 1000 x the current into this pin. The networks that program receive gain, two-wire impedance, and feed current all connect to this node. This node is extremely sensitive. Route the 256 kHz chopper clock and switch lines away from the RSN node. TP Thermal Thermal pin. Connection for heat dissipation. Internally connected to substrate (QBAT). Leave as open circuit or connected to QBAT. In both cases, the TP pins can connect to an area of copper on the board to enhance heat dissipation. VBAT Battery Connected to office battery supply through an external protection diode. VCC Power +5 V power supply VEE Power –5 V power supply VREG Input Regulated Voltage. Provides negative power supply for power amplifiers, connection point for inductor, filter capacitor, and chopper stabilization. VTX Output Transmit Audio. This output is 0.510 times the A(TIP) and B(RING) metallic voltage. VTX also sources the two-wire input impedance programming network. Am79M535 Data Sheet ABSOLUTE MAXIMUM RATINGS OPERATING RANGES Storage temperature . . . . . . . . . . . . –55°C to +150°C Commercial (C) Devices VCC with respect to AGND/DGND . . .–0.4 V to +7.0 V Ambient temperature . . . . . . . . . . . . . . 0°C to +70°C* VEE with respect to AGND/DGND . . .+0.4 V to –7.0 V VCC . . . . . . . . . . . . . . . . . . . . . . . . . . 4.75 V to 5.25 V VBAT with respect to AGND/DGND . . . +0.4 V to –70 V VEE . . . . . . . . . . . . . . . . . . . . . . . . –4.75 V to –5.25 V Note: Rise time of VBAT (dv/dt) must be limited to 27 V/µs or less when QBAT bypass = 0.33 µF. VBAT . . . . . . . . . . . . . . . . . . . . . . . . . . . –40 V to –58 V BGND with respect to AGND/DGND . . . . . . . . . . . . . . . .+1.0 V to –3.0 V A(TIP) or B(RING) to BGND: Continuous . . . . . . . . . . . . . . . . . . –70 V to +1.0 V 10 ms (f = 0.1 Hz) . . . . . . . . . . . . –70 V to +5.0 V 1 µs (f = 0.1 Hz) . . . . . . . . . . . . . . . –90 V to +10 V 250 ns (f = 0.1 Hz) . . . . . . . . . . . .–120 V to +15 V Current from A(TIP) or B(RING) . . . . . . . . . . . .±150 mA Voltage on RINGOUT. . . . .BGND to 70 V above QBAT Current through relay driver . . . . . . . . . . . . . . . 60 mA AGND/DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V BGND with respect to AGND/DGND . . . . . . . . . . . –100 mV to +100 mV Load resistance on VTX to ground . . . . . . . 10 kΩ min Operating Ranges define those limits between which the functionality of the device is guaranteed. * Functionality of the device from 0°C to +70°C is guaranteed by production testing. Performance from –40°C to +85°C is guaranteed by characterizations and periodic sampling of production units. Voltage on ring-trip input (DA and DB) . . . . . . . . . . . . . . . . . . . . . VBAT to 0 V Current into ring-trip inputs . . . . . . . . . . . . . . . . .±10 mA Peak current into regulator switch (L pin) . . . . . . . . . . . . . . . . . . . . . . 150 mA Switcher transient peak off voltage on L pin . . . . . . . . . . . . . . . . . . . . . +1.0 V C3–C1, E0, E1, CHCLK to AGND/DGND . . . . . . . . . . .–0.4 V to VCC + 0.4 V Maximum power dissipation, (see note). . . .TA = 70°C In 32-pin PLCC package . . . . . . . . . . . . . . 1.74 W Note: Thermal limiting circuitry on chip will shut down the circuit at a junction temperature of about 165°C. The device should never be exposed to this temperature. Operation above 145°C junction temperature may degrade device reliability. See the SLIC Packaging Considerations for more information. Stresses above those listed under Absolute Maximum Ratings may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to Absolute Maximum Ratings for extended periods may affect device reliability. SLIC Products 5 ELECTRICAL CHARACTERISTICS Description Test Conditions (See Note 1) Min Analog (VTX ) output impedance Analog (VTX ) output offset Max –1* –1 –35 –30 –40 –35 300 Hz to 3.4 kHz 1 Longitudinal impedance at A or B Unit Note Ω 4 +35 +30 +40 +35 mV — — 4 4 20 Ω 4 3 0°C to 70°C –40°C to +85°C Analog (RSN) input impedance Typ 35 Overload level 4-wire –3.1 +3.1 Z2WIN = 600 to 900 Ω 2-wire –6.0 +6.0 Vpk 2 Transmission Performance, 2-Wire Impedance 2-wire return loss (See Test Circuit D) 300 Hz to 500 Hz 500 Hz to 2500 Hz 2500 Hz to 3400 Hz 26 26 20 dB 4, 13 Longitudinal Balance (2-Wire and 4-Wire, See Test Circuit C) RL = 600 Ω, Longitudinal to metallic L-T, L-4 (normalized to unity gain) 300 Hz to 3400 Hz Longitudinal to metallic L-T, L-4 Longitudinal signal generation 4-L –1* 48 52 200 Hz to 1 kHz normal polarity 0°C to +70°C normal polarity –40°C to +85°C reverse polarity –2* –2 –2 63 58 54 1 kHz to 3.4 kHz normal polarity 0°C to +70°C normal polarity –40°C to +85°C reverse polarity –2* –2 –2 58 54 54 300 Hz to 800 Hz 300 Hz to 800 Hz –1* 40 42 Longitudinal current capability per wire Active state OHT state dB 25 18 mArms — — 4 — — — 4 — 4 4 Insertion Loss (2- to 4-Wire and 4- to 2-Wire, See Test Circuits A and B) Gain accuracy 2- to 4-wire 2- to 4-wire 2- to 4-wire 2- to 4-wire 0 dBm, 1 kHz, 0°C to +70°C 0 dBm, 1 kHz, –40°C to +85°C 0 dBm, 1 kHz, 0°C to +70°C 0 dBm, 1 kHz, –40°C to +85°C Gain accuracy 4- to 2-wire 4- to 2-wire 4- to 2-wire 4- to 2-wire 0 dBm, 1 kHz, 0°C to +70°C 0 dBm, 1 kHz, –40°C to +85°C 0 dBm, 1 kHz, 0°C to +70°C 0 dBm, 1 kHz, –40°C to +85°C Variation with frequency 300 Hz to 3400 Hz Relative to 1 kHz 0°C to +70°C –40°C to +85°C –0.1 –0.15 +0.1 +0.15 — — — 4 +7 dBm to –55 dBm, ref 0 dBm 0°C to +70°C –40°C to +85°C –0.1 –0.15 +0.1 +0.15 — — 4 Gain tracking –1* –1 5.75 5.65 5.75 5.70 –1* –1 –0.15 –0.20 –0.1 –0.15 5.85 5.85 5.85 5.85 6.00 6.05 5.95 6.00 — 4 — 4 +0.15 +0.20 +0.1 +0.15 — 4 — 4 Notes: * P.G. = Performance Grade –2 grade performance parameters are equivalent to –1 performance parameters except where indicated. 6 Am79M535 Data Sheet dB ELECTRICAL CHARACTERISTICS (continued) Description Test Conditions (See Note 1) Min Typ Max –6.00 –6.05 –5.95 –6.00 –5.85 –5.85 –5.85 –5.85 –5.75 –5.65 –5.75 –5.70 Unit Note Balance Return Signal (4- to 4-Wire; See Test Circuit B) Gain accuracy Variation with frequency Gain tracking Group delay 0 dBm, 1 kHz, 0°C to +70°C 0 dBm, 1 kHz, –40°C to +85°C 0 dBm, 1 kHz, 0°C to +70°C 0 dBm, 1 kHz, –40°C to +85°C –1* –1 3 3, 4 3 3, 4 300 Hz to 3400 Hz Relative to 1 kHz 0°C to +70°C –40°C to +85°C –0.10 –0.15 +0.10 +0.15 — — 3, 4 3, 4 +7 dBm to –55 dBm, ref 0 dBm 0°C to +70°C –40°C to +85°C –0.10 –0.15 +0.10 +0.15 — — 4 dB f = 1 kHz µs 5.3 4, 15 Total Harmonic Distortion (2- to 4-Wire or 4- to 2-Wire, See Test Circuits A and B) Total harmonic distortion 0 dBm, 300 Hz to 3.4 kHz +9 dBm, 300 Hz to 3.4 kHz –64 –55 Total harmonic distortion with metering –50 –40 –35 dB 4, 10 Idle Channel Noise C-message weighted noise Psophometric weighted noise Psophometric idle channel noise with metering 2-wire, 2-wire, 2-wire, 0°C to +70°C 0°C to +70°C –40°C to +85°C –1* +7 +7 +7 +15 +12 +15 4-wire, 4-wire, 4-wire, 0°C to +70°C 0°C to +70°C –40°C to +85°C –1* +7 +7 +7 +15 +12 +15 2-wire, 2-wire, 2-wire, 0°C to +70°C 0°C to +70°C –40°C to +85°C –1* –83 –83 –83 –75 –78 –75 4-wire, 4-wire, 4-wire, 0°C to +70°C 0°C to +70°C –40°C to +85°C –1* –83 –83 –83 –75 –78 –75 2-wire –46 4-wire –52 dBrnC — — 4 — — 4 7 — 4, 7 dBmp 7 — 4, 7 4, 11 Signal Frequency Out-of-Band Noise (See Test Circuit E) Metallic 4 kHz to 9 kHz 9 kHz to 1 MHz 256 kHz and harmonics –76 –76 –57 Longitudinal 1 kHz to 15 kHz Above 15 kHz 256 kHz and harmonics –70 –85 –57 dBm 4, 5, 9 4, 5, 9 4, 5 4, 5, 9 4, 5, 9 4, 5 DC Feed Currents (See Figure 1a, 1b, 1c) Battery = –48 V Active state loop-current accuracy ILOOP (nominal) = 40 mA –7.5 OHT state RL = 600 Ω Tip Open state RL = 600 Ω 1.0 Open Circuit state RL = 0 Ω 1.0 Fault current limit, ILLIM (IAX + IBX) A and B shorted to GND 130 18 SLIC Products +7.5 20 % 22 mA mA 7 ELECTRICAL CHARACTERISTICS (continued) Description Test Conditions (See Note 1) Min Typ Max –1* 35 35 120 80 –1* 135 135 250 200 –1* 200 200 400 300 Unit Note Power Dissipation Battery = –48 V, Normal Polarity On-hook Open Circuit state On-hook OHT state On-hook Active state Off-hook OHT state RL = 600 Ω 500 750 Off-hook Active state RL = 600 Ω 650 1000 VCC on-hook supply current Open Circuit state OHT state Active state 3.0 6.0 7.5 4.5 10.0 12.0 VEE on-hook supply current Open Circuit state OHT state Active state 1.0 2.2 2.7 2.3 3.5 6.0 VBAT on-hook supply current Open Circuit state OHT state Active state 0.4 3.0 4.0 1.0 5.0 6.0 mW Supply Currents mA Power Supply Rejection Ratio (VRIPPLE = 50 mVrms) VCC 50 Hz to 3400 Hz –1* 25 30 45 45 –1* 22 25 35 35 –1* 20 25 40 40 –1* 10 10 25 25 27 30 45 45 20 25 40 40 3.4 kHz to 50 kHz VEE 50 Hz to 3400 Hz 3.4 kHz to 50 kHz VBAT 50 Hz to 3400 Hz –1 3.4 kHz to 50 kHz –1* dB 6, 7 Off-Hook Detector Current threshold accuracy IDET = 365/RD Nominal –20 +20 % 10.0 kΩ Ground-Key Detector Thresholds, Active state, Battery = –48 V (See Test Circuit F) Ground-key resistance threshold B(RING) to GND Ground-key current threshold B(RING) to GND 2.0 5.0 9 Midpoint to GND 9 mA 8 Ring-Trip Detector Input Bias current Offset voltage Source resistance 0 to 2 MΩ –5 –0.05 –50 0 µA +50 mV Logic Inputs (C4–C1, E0, E1, and CHCLK) Input High voltage 2.0 Input Low voltage 0.80 Input High current All inputs except E1 –75 40 Input High current Input E1 –75 45 Input Low current 8 –0.40 Am79M535 Data Sheet V µA mA 12 ELECTRICAL CHARACTERISTICS (continued) Description Test Conditions (See Note 1) Min Typ Max Unit Note Logic Output (DET) Output Low voltage IOUT = 0.8 mA 0.40 Output High voltage IOUT = –0.1 mA V 2.4 Relay Driver Outputs (RINGOUT) On voltage BGND –2 50 mA source BGND –0.95 Off leakage 0.5 Clamp voltage V 100 QBAT –2 50 mA sink µA V RELAY DRIVER SCHEMATIC BGND RINGOUT 16856B-002 QBAT SWITCHING CHARACTERISTICS Symbol Parameter Test Conditions Temperatures Ranges Min Typ Max 0°C to +70°C –40°C to +85°C 3.8 4.0 Ground-Key Detect state 0°C to +70°C RL open, RG connected –40°C to +85°C (See Figure H) 0°C to +70°C –40°C to +85°C 1.1 1.6 0°C to +70°C –40°C to +85°C 3.8 4.0 0°C to +70°C –40°C to +85°C 1.2 1.7 0°C to +70°C –40°C to +85°C 3.8 4.0 tshdd E1 High to DET High (E0 = 1) Switchhook Detect state RL = 600 Ω, RG open E0 High to DET Low (E1 = 1) (See Figure G) 0°C to +70°C –40°C to +85°C 1.1 1.6 tshd0 E0 Low to DET High (E1 = 1) 0°C to +70°C –40°C to +85°C 3.8 4.0 E1 Low to DET High (E0 = 1) Unit Note µs 4 tgkde E1 Low to DET Low (E0 = 1) tgkdd E0 High to DET Low (E1 = 0) tgkd0 E0 Low to DET High (E1 = 0) E1 High to DET Low (E0 = 1) 1.1 1.6 tshde SLIC Products 9 SWITCHING WAVEFORMS E1 to DET E1 DET tgkde tshde tgkde tshde E0 to DET E1 E0 DET tshdd tshd0 tgkdd tgkd0 16856B-003 Note: All delays measured at 1.4 V level. 10 Am79M535 Data Sheet Notes: 1. Unless otherwise noted, test conditions are BAT = –48 V, VCC = +5 V, VEE = –5 V, RL = 600 Ω, CHP = 0.22 µF, RDC1 = RDC2 = 31.25 kΩ, CDC = 0.1 µF, Rd = 51.1 kΩ, no fuse resistors, two-wire AC output impedance, programming impedance (ZT) = 306 kΩ resistive, receive input summing impedance (ZRX) = 300 kΩ resistive. (See Table 2 for component formulas.) 2. Overload level is defined when THD = 1%. 3. Balance return signal is the signal generated at VTX by VRX. This specification assumes that the two-wire AC load impedance matches the impedance programmed by ZT. 4. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests. 5. These tests are performed with a longitudinal impedance of 90 Ω and metallic impedance of 300 Ω for frequencies below 12 kHz and 135 Ω for frequencies greater than 12 kHz. These tests are extremely sensitive to circuit board layout. 6. This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization. 7. When the SLIC is in the Anti-sat 2 operating region, this parameter is degraded. The exact degradation depends on system design. The Anti-sat 2 region occurs at high loop resistances when VBAT – VAX – VBX is less than approximately 17 V. 8. “Midpoint” is defined as the connection point between two 300 Ω series resistors connected between A(TIP) and B(RING). 9. Fundamental and harmonics from 256 kHz switch-regulator chopper are not included. 10. Total harmonic distortion with metering as specified with a metering signal of 2.2 Vrms at the two-wire output, and a transmit signal of +3 dBm or receive signal of –4 dBm. The transmit or receive signals are single-frequency inputs, and the distortion is measured as the highest in-band harmonic at the two-wire or the four-wire output relative to the input signal. 11. Noise with metering is measured by applying a 2.2 Vrms metering signal (measured at the two-wire output) and measuring the psophometric noise at the two-wire and four-wire outputs over a 200 ms time interval. 12. Tested with 0 Ω source impedance. 2 MΩ is specified for system design purposes only. 13. Assumes the following ZT network: RSN VTX 153 kΩ 153 kΩ 56 pF 14. Group delay can be considerably reduced by using a ZT network such as that shown in Note 13 above. The network reduces the group delay to less than 2 µs. The effect of group delay on linecard performance may be compensated for by using the QSLAC™ or DSLAC™ devices. Table 1. SLIC Decoding DET Output State C3 C2 C1 Two-Wire Status E0 = 1* E1 = 0 E0 = 1* E1 = 1 0 0 0 0 Open Circuit Ring trip Ring trip 1 0 0 1 Ringing Ring trip Ring trip 2 0 1 0 Active Loop detector Ground key 3 0 1 1 On-hook TX (OHT) Loop detector Ground key 4 1 0 0 Tip Open Loop detector — 5 1 0 1 Reserved Loop detector — 6 1 1 0 Active Polarity Reversal Loop detector Ground key 7 1 1 1 OHT Polarity Reversal Loop detector Ground key Note: * A logic Low on E0 disables the DET output into the open-collector state. SLIC Products 11 Table 2. User-Programmable Components Z T = 510 ( Z 2WIN – 2R F ) ZT is connected between the VTX and RSN pins. The fuse resistors are RF, and Z2WIN is the desired 2-wire AC input impedance. When computing ZT, the internal current amplifier pole and any external stray capacitance between VTX and RSN must be taken into account. ZL 1000 • Z T Z RX = ----------- • ------------------------------------------------G 42L Z T + 510 ( Z L + 2R F ) ZRX is connected from VRX to the RSN pin, ZT is defined above, and G42L is the desired receive gain. 2500 R DCI + R DC2 = -----------I FEED RDC1, RDC2, and CDC form the network connected to the RDC pin. RDC1 and RDC2 are approximately equal. R DC1 + R DC2 C DC = 1.5 ms • -------------------------------R DC1 • R DC2 ms C D = 0.5 ----------------RD RD and CD form the network connected from RD to –5 V and IT is the threshold current between on hook and off hook. V MG K1 ( ω ) • ZL • ZT - • -----------------------------------------------------------------------Z M = -------------V M2W Z T + 0.51 • K 1 ( ω ) ( 2R F + Z L ) ZM is connected from VMG (metering source) to the RSN pin, VM2W is the desired magnitude of the metering signal at the 2-wire output (usually 2.2 Vrms) and K1 ( ω ) is defined below. 365 R D = --------- , IT 1000 K 1 ( ω ) = -------------------------------------------------------------------------------------------------------------–9 1 + j ω ( 11.5 • 10 + CX ⁄ 2 ) ( 36 + Z L + 2R F ) where: CX = The values of the identical capacitors from A and B to GND ω = 2 π • metering frequency 12 Am79M535 Data Sheet DC FEED CHARACTERISTICS 3 4 2 4 2 5 VBAT = 60 V 5 VBAT = 47.3 V VBAT = 43 V 1 1 Active state RDC = 62.5 kΩ OHT state Notes: 1. Constant-current region: Active state, 2500 I L = -----------R DC OHT state, 1 2500 I L = --- -----------2 R DC 2. Anti-sat turn-on; VAB = 1.02 |VBAT| – 14, |VBAT| < 43.1 V (Anti-sat –2) VAB = 29.95 V, |VBAT| ≥ 43.1 V (Anti-sat –1) VAB = 0.55 |VBAT| + 11.4, |VBAT| ≤ 53 V (Anti-sat –2) VAB = 40 V, |VBAT| > 53 V (Anti-sat –1) 3. Open Circuit voltage; 4. Anti-sat –1 region 5. Anti-sat –2 region a. VA–VB (VAB) Voltage vs. Loop Current (Typical) SLIC Products 13 0 1000 2000 3000 4000 Load Resistance (Ω) RDC = 62.5 kΩ VBAT = 47.3 V b. Loop Current vs. Load Resistance (Typical) A a IL RL RSN SLIC RDC1 b RDC2 B CDC RDC Current programmed by RDC1 and RDC c. Feed Programming 16856B-004 Figure 1. DC Feed Characteristics 14 Am79M535 Data Sheet TEST CIRCUITS VTX A(TIP) A(TIP) VTX RL 2 RT SLIC VL SLIC AGND VAB VAB RT RTMG VMG AGND RL RL 2 RRX B(RING) RSN B(RING) RSN RRX VRX IL4-2 = –20 log (VAB / VRX) BRS = 20 log (VTX / VRX) IL2-4 = –20 log (VTX / VAB) A. Two- to Four-Wire Insertion Loss B. Four- to Two-Wire Insertion Loss and Balance Return Signal RL 2 VTX A(TIP) 1/ωC << RL RT SLIC C S1 S1 Closed, S2 Open L-T Long. Bal. = –20 log (VAB / VL) L-4 Long. Bal. = –20 log (VTX / GTX • VL) AGND VL S2 Closed, S1 Open 4-L Long. Sig. Gen. = –20 log (VL / VRX) VL S2 B(RING) RRX RSN VRX RL 2 C. Longitudinal Balance ZD A(TIP) VTX R VS RT VM Note: ZD is the desired impedance (e.g., the characteristic impedance of the line.) SLIC R RL = 20 log (2 VM / VS) B(RING) RSN ZIN RRX D. Two-Wire Return Loss Test Circuit SLIC Products 15 TESTS CIRCUITS (continued) RL 68 Ω A(TIP) C A(TIP) 1/ωC << 90 Ω SM 56 Ω RL IDC B(RING) SLIC 68 Ω RG C SE B(RING) Current Feed and Ground Key F. Ground-Key Detection E. Single-Frequency Noise VCC 6.2 kΩ A(TIP) A(TIP) B(RING) 15 pF RL = 600 Ω E0 RG = 2 kΩ B(RING) G. Ground-Key Switching 16 DET E1 H. Loop-Detector Switching Am79M535 Data Sheet PHYSICAL DIMENSIONS PL032 .447 .453 .485 .495 .009 .015 .585 .595 .042 .056 .125 .140 Pin 1 I.D. .080 .095 .547 .553 SEATING PLANE .400 REF. .490 .530 .013 .021 .050 REF. .026 .032 TOP VIEW SIDE VIEW 16-038FPO-5 PL 032 DA79 6-28-94 ae REVISION SUMMARY Revision B to C • Minor changes were made to the data sheet style and format to conform to Legerity standards. Revision C to D • • In the Pin Description table, inserted/changed TP pin description to: “Thermal pin. Connection for heat dissipation. Internally connected to substrate (QBAT). Leave as open circuit or connected to QBAT. In both cases, the TP pins can connect to an area of copper on the board to enhance heat dissipation.” Minor changes were made to the data sheet style and format to conform to Legerity standards. Revision D to E • The physical dimensions (PL032) were added to the Physical Dimensions section. • Deleted the Ceramic DIP and Plastic DIP part (Am79M531) and references to it. • Updated the Pin Description table to correct inconsistencies. SLIC Products 17 Legerity provides silicon solutions that enhance the performance, speeds time-to-market, and lowers the system cost of our customers' products. By combining process, design, systems architecture, and a complete set of software and hardware support tools with unparalleled factory and worldwide field applications support, Legerity ensures its customers enjoy a smoother design experience. It is this commitment to our customers that places Legerity in a class by itself. The contents of this document are provided in connection with Legerity, Inc. products. Legerity makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this publication. Except as set forth in Legerity's Standard Terms and Conditions of Sale, Legerity assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. Legerity's products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or in any other application in which the failure of Legerity's product could create a situation where personal injury, death, or severe property or environmental damage may occur. Legerity reserves the right to discontinue or make changes to its products at any time without notice. © 1999 Legerity, Inc. All rights reserved. Trademarks Legerity, the Legerity logo, and combinations thereof, DSLAC and QSLAC are trademarks of Legerity, Inc. Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies. P.O. 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