ETC E0C6244

PF584-06
E0C6244
4-bit Single Chip Microcomputer
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oltan
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Wid erati ts
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● Core CPU Architecture
● Dot Matrix LCD Driver
● Programmable SVD Circuit/Sound Generator
■ DESCRIPTION
The E0C6244 is an advanced single-chip CMOS 4-bit microcomputer consisting of the E0C6200 4-bit core
CPU. The chip contains the ROM, RAM, dot matrix LCD driver, programmable SVD circuit, time base counter
and clock synchronous serial port.
The E0C6244 is suitable for dot matrix display systems.
■ FEATURES
● CMOS LSI 4-bit parallel processing
● Clock ..................................................... 32.768kHz/2MHz (Max.) (selectable by software)
● Instruction set ........................................ 108 instructions
● Instruction cycle time ............................ 153µsec, 214µsec or 366µsec at 32kHz
(depending on instruction)
2µsec, 3µsec or 6µsec at 2MHz
(depending on instruction)
● ROM capacity ....................................... 4,096 × 12 bits
● RAM capacity ........................................ 384 × 4 bits
● Input port ............................................... 8 bits (pull-up resistors are available by mask option)
● Output port ............................................ 12 bits (clock output or buzzer output is available by mask option)
● I/O port .................................................. 12 bits (pull-up resistors are available by mask option)
● Serial I/O port ........................................ 1 port (clock sync.)
● Dot matrix LCD driver ........................... 40 segments × 8 commons/40 segments × 16 commons
(1/8 or 1/16 duty is selectable by mask option)
● Built-in SVD circuit ................................ Programmable
● Built-in stopwatch timer
● Built-in watchdog timer
● Built-in time base counter ..................... 3 lines
● Interrupts ............................................... External : Input interrupt
Internal : Timer interrupt
Serial I/O interrupt
2 lines
3 lines
1 line
● Built-in sound generator ........................ With digital envelope (8 sounds programmable)
● Supply voltage ...................................... 2.2V to 5.5V
● Current consumption ............................ HALT mode (32kHz)
: 2.5µA (Typ.)
OPERATING mode (1MHz) : 400µA (Typ.)
● Package ................................................ QFP5-128pin-S1 (plastic)
Die form
SEIKO EPSON CORPORATION
1
E0C6244
■ BLOCK DIAGRAM
ROM
4,096 words x 12 bits
System Reset
Control
RESET
Core CPU E0C6200
OSC1
OSC2
OSC3
OSC4
COM0~15
SEG0~39
OSC
Interrupt
Generator
LCD Driver
Timer
RAM
384 words x 4 bits
V DD
V L1~5
CA~CF
V REF
V S1
V SS
R20~23, R30~33,
R40~43
Stop Watch
Power
Controller
Programmable
Timer
SVD
Input Port
Sound
Generator
Serial Interface
Output Port
I/O Port
K00~03, K10~13
TEST
SIN
SOUT
SCLK
P00~03, P10~13,
P20~23
■ PIN CONFIGURATION
QFP5-128pin
102
65
103
64
E0C6244
INDEX
39
128
1
2
38
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Pin name
N.C.
CC
N.C.
CB
CA
N.C.
COM0
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
N.C.
SEG39
SEG38
SEG37
SEG36
SEG35
SEG34
SEG33
SEG32
SEG31
No.
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
Pin name
SEG30
SEG29
N.C.
SEG28
N.C.
SEG27
N.C.
SEG26
SEG25
SEG24
SEG23
SEG22
SEG21
SEG20
SEG19
SEG18
SEG17
SEG16
SEG15
SEG14
SEG13
SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
No.
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
Pin name No. Pin name
SEG1
97 R40
N.C.
98 N.C.
SEG0
99 N.C.
N.C.
100 N.C.
N.C.
101 R33
SCLK
102 R32
SOUT
103 R31
SIN
104 R30
K13
105 R23
K12
106 R22
K11
107 R21
K10
108 R20
K03
109 VSS
K02
110 RESET
K01
111 TEST
K00
112 OSC4
P23
113 OSC3
P22
114 N.C.
P21
115 VS1
P20
116 OSC2
P13
117 OSC1
P12
118 N.C.
P11
119 VDD
P10
120 VREF
P03
121 VL1
P02
122 VL2
P01
123 VL3
P00
124 VL4
R43
125 VL5
R42
126 CF
N.C.
127 CE
R41
128 CD
N.C. = No Connection
E0C6244
■ PIN DESCRIPTION
Pin No.
Pin name
In/Out
VDD
119
I
VSS
109
I
VS1
115
–
VL1–VL5
121–125
–
VREF
120
O
CA–CF
5, 4, 2, 128–126
–
OSC1
117
I
OSC2
116
O
OSC3
113
I
OSC4
112
O
K00–K03, K10–K13
80–73
I
P00–P03, P10–P13
92–81
I/O
P20–P23
R20–R23, R30–R32
108–102
O
R33
101
O
R40
97
O
R41
96
O
R42
94
O
R43
93
O
SIN
72
I
SOUT
71
O
70
SCLK
I/O
SEG0–39
67, 65–40, 38
O
36, 34–24
COM0–15
7–22
O
RESET
110
I
TEST
111
I
Function
Power source (+) terminal
Power source (-) terminal
Oscillation and internal logic system regulated voltage
LCD system power (1/4 or 1/5 bias may be selected by mask option)
LCD system power test terminal
Booster capacitor connecting terminal
Crystal or CR oscillation input terminal (selected by mask option)
Crystal or CR oscillation output terminal (selected by mask option)
Ceramic or CR oscillation input terminal (selected by mask option)
Ceramic or CR oscillation output terminal (selected by mask option)
Input terminal (Use of pull up resistor is selected by mask option)
I/O terminal
Output terminal
Output terminal (DC or SRDY output may be selected by mask option)
Output terminal (DC, CL or FOUT output may be selected by mask option)
Output terminal (DC or FR output may be selected by mask option)
Output terminal (DC, BZ or FOUT output may be selected by mask option)
Output terminal (DC or BZ output may be selected by mask option)
Serial interface input terminal
Serial interface output terminal
Serial interface clock input/output terminal
LCD segment output terminal
LCD common output terminal
Initial reset input terminal
Test input terminal
■ BASIC EXTERNAL CONNECTION DIAGRAM
X'tal
Crystal oscillator
32.768kHz
CI(Max.)=35kΩ
Rfx
Cgx
Ceramic
Rfc
Cgc
Cdc
Rcr
Feedback resistor
Trimmer capacitor
Ceramic oscillator
Feedback resistor
Gate capacitance
Drein capacitance
Resistance for
CR oscillation
Voltage booster
capacitor (1)~(3)
Capacitor between
VDD and VL1
10MΩ
5~25pF
500kHz~2MHz
1MΩ
100pF
100pF
20kΩ~100kΩ
LCD PANEL 40 x 16
SEG0~SEG39
COM0~COM15
SIN
SERIAL
DEVICE
SOUT
_____
SCLK
I/O
DATA
R20~R23
R30~R33
R40
R41
P00~P03
P10~P13
P20~P23
OUTPUT
DATA
R42
E0C6244
FOUT
V REF
INPUT
DATA
C1~C3
R43
BUZZER
N.C.
C4
Vss
K00~K03
K10~K13
______
RESET
–
_____
TEST
C5
+
C6
V DD
0.1µF ∗1
0.1µF ∗1
Capacitor between 0.1µF ∗1
VDD and VL2
Capacitor between 0.1µF ∗1
VDD and VL4
CF CE CD CC CB CA
VL5 VL4
VL3 VL2 VL1 VS1 OSC4
OSC3 OSC2
Rfc
C3
C2
OSC1
C7
Rfx
C1
C7
C6
C5
C4
C8
Rcr
C8
X'tal
Ceramic
Cdc
Cgc
Cgx
Capacitor between 0.1µF ∗1
VDD and VL5
Capacitor between 0.1µF
VDD and VS1
POWER
3~5V
∗1 When the load on the liquid crystal system is large, increase the
capacitance of the voltage booster capacitors (C1–C3) and the
capacitors between VDD and liquid crystal system power (C4–C7).
Note: The above table is simply an example, and is not guaranteed to work.
3
E0C6244
■ ELECTRICAL CHARACTERISTICS
● Absolute Maximum Ratings
Rating
Symbol
Supply voltage
VSS
Input voltage (1)
VI
Input voltage (2)
VIOSC
Operating temperature
Topr
Storage temperature
Tstg
Soldering temperature / Time
Tsol
Permissible dissipation *1
PD
∗1: In case of plastic package (QFP5-128pin).
(VDD=0V)
Unit
V
V
V
°C
°C
–
mW
Value
-7.0 to 0.5
VSS - 0.3 to 0.5
VS1 - 0.3 to 0.5
-20 to 70
-65 to 150
260°C, 10sec (lead section)
250
● Recommended Operating Conditions
Condition
Supply voltage
Oscillation frequency (1)
Oscillation frequency (2)
Oscillation frequency (3)
Voltage booster capacitor (1)
Voltage booster capacitor (2)
Voltage booster capacitor (3)
Capacitor between VDD and VL1
Capacitor between VDD and VL2
Capacitor between VDD and VL4
Capacitor between VDD and VL5
Capacitor between VDD and VS1
Symbol
VDD=0V
VSS
fOSC1
fOSC3
fOSC3
C1
C2
C3
C4
C5
C6
C7
C8
VSC="1"
VSC="2"
Remark
VSC="0"
VSC="1"
VSC="2"
Min.
-3.8
-5.5
-5.5
20
50
50
Typ.
-3.0
-3.0
-3.0
32.768
1,000
2,000
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
(Ta=-20 to 70°C)
Max.
Unit
-1.8
V
-2.2
V
-3.5
V
50
kHz
1,200
kHz
2,300
kHz
µF
µF
µF
µF
µF
µF
µF
µF
● DC Characteristics
(Unless otherwise specified: VDD=0V,VSS=-3.0V,VL1=-1.0V,VL2=-2.0V,VL4=-3.0V,VL5=-4.0V,fOSC1=32.768kHz,fOSC3=1MHz,Ta=25°C,C1–C8=0.047µF)
Characteristic
Symbol
Condition
Min.
Typ.
Max.
Unit
High level input voltage
VHIN VSS=-2.2 to -5.5V
K00–03•10–13, P00–03•10–13 0.2•VSS
0
V
Low level input voltage
VLIN
Ta=25°C
P20–P23, SIN, SCLK
VSS
0.8•VSS
V
High level input voltage
VHIN VSS=-2.2 to -5.5V
RESET
-0.2
0
V
Low level input voltage
VLIN
Ta=25°C
VSS
VSS+0.2
V
High level input current
IIH
VSS=-3.0V
K00–03•10–13, P00–03•10–13
0
0.5
µA
VIH=0V
P20–P23, SIN, SCLK
RESET
Low level input current (1)
IIL1
VSS=-3.0V
K00–03•10–13, P00–03•10–13
-45
-15
µA
VIL1=VSS
P20–P23, SIN, SCLK
With pull-up resistor
RESET
Low level input current (2)
IIL2
VSS=-3.0V
K00–03•10–13, P00–03•10–13
-0.5
0
µA
VIL2=VSS
P20–P23, SIN, SCLK
No pull-up resistor
RESET
High level output current (1) IOH1
VSS=-2.2V
P00–03•10–13•20–23
-1.0
mA
VOH1=-0.5V
R20–23•30–33
R40•41, SOUT, SCLK
Low level output current (1)
IOL1
VSS=-2.2V
P00–03•10–13•20–23
4.0
mA
VOL1=VSS+0.5V
R20–23•30–33
R40•41, SOUT, SCLK
High level output current (2) IOH2
VSS=-2.2V
R42•43
-2.0
mA
VOH2=-0.5V
Low level output current (2)
IOL2
VSS=-2.2V
R42•43
8.0
mA
VOL1=VSS+0.5V
Common output current
IOH3
VOH3=-0.05V
COM0–15
-30
µA
IOL3
VOL3=VL5+0.05V
30
µA
Segment output current
IOH4
VOH4=-0.05V
SEG0–39
-10
µA
IOL4
VOL4=VL5+0.05V
10
µA
4
E0C6244
● Analog Circuit Characteristics and Current Consumption
(Unless otherwise specified: VDD=0V,VSS=-3.0V,VL1=-1.0V,VL2=-2.0V,VL4=-3.0V,VL5=-4.0V,fOSC1=32.768kHz,fOSC3=1MHz,Ta=25°C,C1–C8=0.047µF)
Characteristic
Symbol
Condition
Max.
Min.
Typ.
Unit
Liquid crystal drive voltage
VL1
Connect 1MΩ load resistor between VDD and VL1
1/2•VL2
1/2•VL2
V
(Normal mode)
(No panel load)
-0.1
×0.95
-1.80
VL2
LC="0"
Connect 1MΩ load resistor
-1.85
LC="1"
between VDD and VL2
(No panel load)
-1.90
LC="2"
-1.95
LC="3"
-2.01
LC="4"
-2.06
LC="5"
-2.11
LC="6"
-2.17
LC="7"
Typ.×1.12
Typ.×0.88
V
-2.22
LC="8"
-2.27
LC="9"
-2.32
LC="10"
-2.38
LC="11"
-2.43
LC="12"
-2.48
LC="13"
-2.53
LC="14"
-2.59
LC="15"
Connect 1MΩ load resistor between VDD and VL4
VL4
3/2•VL2
3/2•VL2
V
(No panel load)
×0.95
VL5
2•VL2
Connect 1MΩ load resistor between VDD and VL5
2•VL2
V
(No panel load)
×0.95
Liquid crystal drive voltage
-0.92
LC="0"
VL1
Connect 1MΩ load resistor
(Heavy load
-0.95
LC="1"
between VDD and VL1
(No panel load)
protection mode)
-0.97
LC="2"
-1.00
LC="3"
-1.03
LC="4"
-1.05
LC="5"
-1.08
LC="6"
-1.11
LC="7"
Typ.×1.12
Typ.×0.88
V
-1.13
LC="8"
-1.16
LC="9"
-1.18
LC="10"
-1.21
LC="11"
-1.24
LC="12"
-1.26
LC="13"
-1.29
LC="14"
-1.32
LC="15"
Connect 1MΩ load resistor between VDD and VL2
VL2
2•VL1
2•VL1
V
(No panel load)
×0.90
VL4
3•VL1
Connect 1MΩ load resistor between VDD and VL4
3•VL1
V
(No panel load)
×0.90
VL5
4•VL1
Connect 1MΩ load resistor between VDD and VL5
4•VL1
V
(No panel load)
×0.90
SVD voltage
VSVD0 SVC="0"
-2.35
-2.20
-2.05
V
-2.70
-2.50
-2.30
VSVD1 SVC="1"
V
-3.30
-3.10
-2.90
VSVD2 SVC="2"
V
-4.50
VSVD3 SVC="3"
-4.20
-3.90
V
SVD circuit response time
tSVD
100
µS
Current consumption
During HALT
No panel load *1
2.5
5.0
Ihlt
µA
During operation at 32kHz
6.5
9.0
IEX1
µA
IEX2
During operation at 1MHz
No panel load *2
400
600
µA
IEX3
No panel load *3
During operation at 2MHz
1,000
1,500
µA
Current consumption
During HALT
20
70
Ihlt
No panel load *4
µA
(OSC1•CR oscillation)
During operation at fOSC1
25
80
IEX1
µA
IEX2
During operation at 1MHz
420
600
µA
IEX3
No panel load *5
During operation at 2MHz
1,000
1,500
µA
∗1: SVD circuit: OFF status, VSC = "0", OSC1: oscillating with crystal, OSCC= "0"
∗2: SVD circuit: OFF status, VSC = "1", OSC1: oscillating with crystal
∗3: SVD circuit: OFF status, VSC = "2", OSC1: oscillating with crystal, VSS = -5.0V
∗4: SVD circuit: OFF status, VSC = "0" or "1", OSC1: oscillating with CR, OSCC = "0", ROSC for OSC1 = 1.6MΩ
∗5: SVD circuit: OFF status, VSC = "2", OSC1: oscillating with CR, OSCC = "0", ROSC for OSC1 = 1.6MΩ
5
E0C6244
● Oscillation Characteristics
The oscillation characteristics change depending on the conditions (components used, board pattern, etc.). Use the following characteristics as reference values.
OSC1 crystal oscillation circuit
(Unless otherwise specified: VDD=0V, VSS=-3.0V, Crystal: C-002R (CI=35kΩ), CGX=25pF, CDX=built-in, RfX=10MΩ, VSC="0", Ta=25°C)
Condition
Unit
Characteristic
Symbol
Min.
Typ.
Max.
VSS=-2.2 to -5.5V
Sec
tsta
Oscillation start time
5
pF
CD
Package as assembled
Built-in capacitance (drain)
22
pF
Bare chip
21
∂f/∂V
ppm
VSS=-2.2 to -5.5V
Frequency/voltage deviation
5
∂f/∂IC
ppm
Frequency/IC deviation
-10
10
∂f/∂CG CG=5 to 25pF
ppm
Frequency adjustment range
35
45
CG=5pF
V
Harmonic oscillation start voltage Vhho
-5.5
Between OSC1 and VDD, VS1
Rleak
MΩ
Permitted leak resistance
200
OSC1 CR oscillation circuit
Characteristic
Oscillation start time
Frequency/voltage deviation
Oscillation frequency
(Unless otherwise specified: VDD=0V, VSS=-3.0V, VSC="0" or "1", Ta=25°C)
Symbol
Min.
Typ.
Max.
Condition
Unit
3
tsta
VSS=-2.2 to -5.5V
mS
-5
5
∂f/∂V
VSS=-2.2 to -5.5V
%
32×70%
32
32×130%
fCR
ROSC=1.6MΩ
kHz
OSC3 CR oscillation circuit (1)
Characteristic
Oscillation start time
Frequency/voltage deviation
Oscillation frequency
Symbol
tsta
VSS=-2.2 to -5.5V
∂f/∂V
VSS=-2.2 to -5.5V
fCR
ROSC=40kΩ
(Unless otherwise specified: VDD=0V, VSS=-3.0V, VSC="1", Ta=25°C)
Condition
Min.
Typ.
Max.
Unit
3
mS
-5
5
%
860×70%
860
860×130% kHz
OSC3 CR oscillation circuit (2)
Characteristic
Oscillation start time
Frequency/voltage deviation
Oscillation frequency
Symbol
tsta
VSS=-3.5 to -5.5V
∂f/∂V
VSS=-3.5 to -5.5V
fCR
ROSC=20kΩ
(Unless otherwise specified: VDD=0V, VSS=-5.0V, VSC="2", Ta=25°C)
Condition
Min.
Typ.
Max.
Unit
3
mS
-5
5
%
1.7×70%
1.7
1.7×130% MHz
OSC3 ceramic oscillation circuit (1)
(Unless otherwise specified: VDD=0V, VSS=-3.0V, VSC="1", Ceramic: CSB 1000J (Murata Mfg. Co.), CGC=CDC=100pF, RfC=1MΩ, Ta=25°C)
Characteristic
Symbol
Min.
Typ.
Max.
Unit
Condition
Oscillation start time
3
mS
tsta
VSS=-2.2 to -5.5V
Frequency/voltage deviation
-3
3
%
∂f/∂V
VSS=-2.2 to -5.5V
OSC3 ceramic oscillation circuit (2)
(Unless otherwise specified: VDD=0V, VSS=-5.0V, VSC="2", Ceramic: CSA 2.00MG (Murata Mfg. Co.), CGC=CDC=100pF, RfC=1MΩ, Ta=25°C)
Characteristic
Symbol
Min.
Typ.
Max.
Unit
Condition
Oscillation start time
3
mS
tsta
VSS=-3.5 to -5.5V
Frequency/voltage deviation
-3
3
%
∂f/∂V
VSS=-3.5 to -5.5V
6
E0C6244
■ PACKAGE DIMENSIONS
Plastic QFP5-128pin
23.6±0.4
20±0.1
102
65
INDEX
39
128
1
38
0.2±0.05
0.1 2.7±0.1
0.5
3max
17.6±0.4
64
14±0.1
103
0.15±0.05
0°
10°
0.8±0.2
1.8
Unit: mm
NOTICE:
No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko
Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of
any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that
this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any intellectual
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subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade Control Law of Japan and may require an
export license from the Ministry of International Trade and Industry or other approval from another government agency.
© Seiko Epson Corporation 1999 All right reserved.
SEIKO EPSON CORPORATION
ELECTRONIC DEVICES MARKETING DIVISION
IC Marketing & Engineering Group
ED International Marketing Department I (Europe & U.S.A.)
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone : 042-587-5812 FAX : 042-587-5564
ED International Marketing Department II (Asia)
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone : 042-587-5814 FAX : 042-587-5110