ETC E0C6SA32Q14

PF761-04
E0C6S32
4-bit Single Chip Microcomputer
ge
oltan
V
o
Lowerati ts
p
c
O odu
Pr
● Core CPU Architecture
● SVD Circuit/Comparator
● Event Counter
■ DESCRIPTION
The E0C6S32 is an advanced single-chip CMOS 4-bit microcomputer consisting of the E0C6200A 4-bit core
CPU. It also contains the ROM, RAM, LCD driver, event counter, SVD circuit, stopwatch counter, and time base
counter. With wide voltage range and low power consumption, the E0C6S32 provides an excellent solution for
the low-power consumption systems with manganese dry cell.
■ FEATURES
● CMOS LSI 4-bit parallel processing
● Clock ..................................................... 32.768kHz (Typ.)/1MHz (Typ.) (selectable by software)
● Instruction set ........................................ 100 instructions
● Instruction cycle time ............................ 153µsec, 214µsec or 366µsec at 32kHz
(depending on instruction)
5µsec, 7µsec or 12µsec at 1MHz
(depending on instruction)
● ROM capacity ....................................... 2,048 × 12 bits
● RAM capacity ........................................ 144 × 4 bits
● Input port ............................................... 5 bits (pull-down resistors are available by mask option)
● Output port ............................................ 4 bits (general purpose)
2 bits (buzzer output): BZ, BZ
1 bit (lamp output)
1 bit (clock output)
● I/O port .................................................. 8 bits
● LCD driver ............................................. 38 segments × 2, 3 or 4 commons
(1/2, 1/3 or 1/4 duty is selectable by mask option)
● Built-in time base counter
● Built-in stopwatch counter
● Built-in watchdog timer
● Event counter ........................................ 8 lines
● Built-in AMP .......................................... Operational AMP for MOS input analog comparator
● Built-in SVD ........................................... 1.2 ± 0.1V/2.4 ± 0.1V (supply voltage detector)
● Interrupts ............................................... External : Input interrupt
2 lines
Internal : Timer interrupt
1 line
Stopwatch interrupt
1 line
● Current consumption ............................ E0C6SL32/6SB32
HALT mode (32kHz)
: 1.0µA (Typ.)
E0C6S32
HALT mode (32kHz)
: 1.2µA (Typ.)
E0C6SA32
HALT mode (32kHz)
: 1.5µA (Typ.)
OPERATING mode (1MHz) : 300µA (Typ.)
● Package ................................................ QFP5-80pin (plastic), QFP14-80pin (plastic)
Die form
■ LINE UP
Model
Supply voltage
Clock
E0C6SL32
1.5V (0.9V to 1.8V)
32kHz (Crystal oscillation)
E0C6S32
3.0V (1.8V to 3.6V)
32kHz (Crystal oscillation)
E0C6SA32
3.0V (2.2V to 3.6V)
32kHz (Crystal oscillation) & 1MHz (Ceramic or CR oscillation)
E0C6SB32
Wide voltage (0.9V to 3.6V)
32kHz (Crystal oscillation)
SEIKO EPSON CORPORATION
1
E0C6S32
ROM
2,048 words x 12 bits
RESET
OSC4
OSC3
OSC2
OSC1
■ BLOCK DIAGRAM
System Reset
Control
OSC
Core CPU E0C6200A
RAM
144 words x 4 bits
COM0~3
Interrupt
Generator
LCD Driver
SEG0~37
K00~03, K10
Input Port
TEST
VDD
VL1~3
CA, CB
VS1
VSS
I/O Port
P00~03, P10~13
Output Port
R00~03, R10~13
Comparator
AMPP
AMPM
Power
Controller
SVD
Timer
Event
Counter
Stop Watch
■ PIN CONFIGURATION
QFP5-80pin
64
41
65
40
E0C6S32
INDEX
25
80
1
2
24
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pin name
SEG17
TEST
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
No.
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Pin name
SEG36
SEG37
AMPP
AMPM
K10
K03
K02
K01
K00
P03
P02
P01
P00
P13
P12
P11
P10
R03
R02
R01
No.
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
Pin name No. Pin name
R00
61 COM2
R12
62 COM1
R11
63 COM0
R10
64 SEG0
R13
65 SEG1
VSS
66 SEG2
67 SEG3
RESET
68 SEG4
OSC4
69 SEG5
OSC3
70 SEG6
VS1
71 SEG7
OSC2
72 SEG8
OSC1
73 SEG9
VDD
74 SEG10
VL3
75 SEG11
VL2
76 SEG12
VL1
77 SEG13
N.C.
78 SEG14
CB
79 SEG15
CA
80 SEG16
COM3
N.C. = No Connection
E0C6S32
QFP14-80pin
60
41
61
40
E0C6S32
INDEX
80
21
1
20
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pin name
AMPP
AMPM
K10
K03
K02
K01
K00
P03
P02
P01
P00
P13
P12
P11
P10
R03
R02
R01
R00
R12
No.
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Pin name
R11
R10
R13
VSS
RESET
OSC4
OSC3
VS1
OSC2
OSC1
VDD
VL3
VL2
VL1
N.C.
CB
CA
COM3
COM2
COM1
No.
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
Pin name No. Pin name
COM0
61 SEG18
SEG0
62 SEG19
SEG1
63 SEG20
SEG2
64 SEG21
SEG3
65 SEG22
SEG4
66 SEG23
SEG5
67 SEG24
SEG6
68 SEG25
SEG7
69 SEG26
SEG8
70 SEG27
SEG9
71 SEG28
SEG10
72 SEG29
SEG11
73 SEG30
SEG12
74 SEG31
SEG13
75 SEG32
SEG14
76 SEG33
SEG15
77 SEG34
SEG16
78 SEG35
SEG17
79 SEG36
TEST
80 SEG37
N.C. = No Connection
■ PIN DESCRIPTION
Pin name
Pin No.
QFP5-80pin
QFP14-80pin
VDD
53
31
46
24
VSS
50
28
VS1
56
34
VL1
55
33
VL2
54
32
VL3
57, 58
35, 36
CA, CB
52
30
OSC1
51
29
OSC2
49
27
OSC3
48
26
OSC4
25–29
3–7
K00–K03, K10
30–37
8–15
P00–P03, P10–P13
38–41
16–19
R00–R03
44
22
R10
45
23
R13
43
21
R11
42
20
R12
23
1
AMPP
24
2
AMPM
1, 3–22, 64–80 42–59, 61–80
SEG0–37
60–63
38–41
COM0–3
47
25
RESET
2
60
TEST
In/Out
Function
I
I
O
O
O
O
–
I
O
I
O
I
I/O
O
O
O
O
O
I
I
O
O
I
I
Power source (+) terminal
Power source (-) terminal
Oscillation and internal logic system regulated voltage output terminal
LCD system regulated voltage output terminal (approx. -1.05 V)
LCD system booster output terminal (VL1 x 2)
LCD system booster output terminal (VL1 x 3)
Booster capacitor connecting terminal
Crystal oscillation input terminal
Crystal oscillation output terminal
Ceramic or CR oscillation input terminal (Switchable by mask option, 6SA32 only)
Ceramic or CR oscillation output terminal (Switchable by mask option, 6SA32 only)
Input terminal
I/O terminal
Output terminal
Output terminal (DC or BZ output may be selected by mask option)
Output terminal (DC or BZ output may be selected by mask option)
Output terminal
Output terminal (DC or FOUT output may be selected by mask option)
Analog comparator non-inverted input terminal
Analog comparator inverted input terminal
LCD segment output terminal (Convertible to DC output by mask option)
LCD common output terminal
Initial reset input terminal
Test input terminal
3
E0C6S32
■ ELECTRICAL CHARACTERISTICS
● Absolute Maximum Ratings
E0C6S32/6SA32/6SB32
(VDD=0V)
Rating
Symbol
Value
Unit
Supply voltage
VSS
-5.5 to 0.5
V
Input voltage (1)
VI
VSS - 0.3 to 0.5
V
Input voltage (2)
VIOSC
VS1 - 0.3 to 0.5
V
Permissible total output current *1 ΣIVSS
10
mA
Operating temperature
Topr
-20 to 70
°C
Storage temperature
Tstg
-65 to 150
°C
Soldering temperature / Time
Tsol
260°C, 10sec (lead section)
–
Permissible dissipation *2
PD
250
mW
∗1: The permissible total output current is the sum total of the current (average current) that simultaneously flows from the output pins (or is draw in).
∗2: In case of plastic package (QFP5-80pin, QFP14-80pin).
E0C6SL32
(VDD=0V)
Rating
Symbol
Value
Unit
Supply voltage
VSS
-2.0 to 0.5
V
Input voltage (1)
VI
VSS - 0.3 to 0.5
V
Input voltage (2)
VIOSC
VS1 - 0.3 to 0.5
V
Permissible total output current *1 ΣIVSS
10
mA
Operating temperature
Topr
-20 to 70
°C
Storage temperature
Tstg
-65 to 150
°C
Soldering temperature / Time
Tsol
260°C, 10sec (lead section)
–
Permissible dissipation *2
PD
250
mW
∗1: The permissible total output current is the sum total of the current (average current) that simultaneously flows from the output pins (or is draw in).
∗2: In case of plastic package (QFP5-80pin, QFP14-80pin).
● Recommended Operating Conditions
E0C6S32
Condition
Supply voltage
Oscillation frequency
Symbol
VSS
VDD=0V
fOSC1
Remark
Min.
-3.6
–
Typ.
-3.0
32.768
(Ta=-20 to 70°C)
Max.
Unit
-1.8
V
–
kHz
E0C6SL32
(Ta=-20 to 70°C)
Symbol
Remark
Min.
Typ.
Max.
Unit
VSS
VDD=0V
-1.8
-1.5
-1.1
V
VDD=0V, With software control *1
-1.8
-1.5
-0.9 *2
V
VDD=0V, When the analog comparator is used
-1.8
-1.5
-1.2
V
Oscillation frequency
fOSC1
–
32.768
–
kHz
∗1: When switching to heavy load protection mode. Note, however, that the ON time for BLS in the heavy load protection must be limited
to 10 msec per second of operation time.
∗2: The possibility of LCD panel display differs depending on the characteristics of the LCD panel.
Condition
Supply voltage
E0C6SB32
(Ta=-20 to 70°C)
Symbol
Remark
Min.
Typ.
Max.
Unit
VSS
VDD=0V
-3.6
-1.5
-1.1
V
VDD=0V, With software control *1
-3.6
-1.5
-0.9 *2
V
VDD=0V, When the analog comparator is used
-3.6
-1.5
-1.2
V
Oscillation frequency
fOSC1
–
32.768
–
kHz
∗1: When switching to heavy load protection mode. Note, however, that the ON time for BLS in the heavy load protection must be limited
to 10 msec per second of operation time.
∗2: The possibility of LCD panel display differs depending on the characteristics of the LCD panel.
Condition
Supply voltage
E0C6SA32
Condition
Supply voltage
Oscillation frequency (1)
Oscillation frequency (2)
4
Symbol
VSS
VDD=0V
fOSC1
fOSC3 duty 50±5%
Remark
Min.
-3.6
–
300
Typ.
-3.0
32.768
1000
(Ta=-20 to 70°C)
Max.
Unit
-1.8
V
–
kHz
1300
kHz
E0C6S32
● DC Characteristics
E0C6S32/6SA32
(Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC1=32.768kHz, Ta=25°C, VS1/VL1–VL3 are internal voltage, C1–C5=0.1µF)
Max.
Condition
Unit
Characteristic
Symbol
Min.
Typ.
0
K00–K03, K10
V
High level input voltage (1)
VIH1
0.2•VSS
P00–P03, P10–P13
VIH2
0.1•VSS
0
RESET, TEST
V
High level input voltage (2)
0.8•VSS
VIL1
K00–K03, K10
VSS
V
Low level input voltage (1)
P00–P03, P10–P13
VIL2
RESET, TEST
VSS
0.9•VSS
V
Low level input voltage (2)
µA
High level input current (1)
IIH1
VIH1=0V, No pull down resistor K00–K03, K10
0
0.5
P00–P03, P10–P13
AMPP, AMPM
µA
IIH2
High level input current (2)
VIH2=0V, With pull down resistor K00–K03, K10
4
40
µA
VIH3=0V, With pull down resistor P00–P03, P10–P13
High level input current (3)
IIH3
25
150
RESET, TEST
K00–K03, K10
µA
Low level input current
IIL
VIL=VSS
-0.5
0
P00–P03, P10–P13
AMPP, AMPM
RESET, TEST
R10, R11, R13
mA
High level output current (1) IOH1
-1.8
VOH1=0.1•VSS
R00–R03, R12
mA
High level output current (2) IOH2
-0.9
VOH2=0.1•VSS
P00–P03, P10–P13
R10, R11, R13
mA
Low level output current (1)
4.0
IOL1
VOL1=0.9•VSS
R00–R03, R12
mA
Low level output current (2)
3.0
IOL2
VOL2=0.9•VSS
P00–P03, P10–P13
COM0–COM3
µA
Common output current
-3
IOH3
VOH3=-0.05V
µA
3
VOL3=VL3+0.05V
IOL3
SEG0–SEG37
µA
Segment output current
-3
IOH4
VOH4=-0.05V
µA
(during LCD output)
3
VOL4=VL3+0.05V
IOL4
SEG0–SEG37
µA
Segment output current
-200
IOH5
VOH5=0.1•VSS
µA
(during DC output)
200
IOL5
VOL5=0.9•VSS
E0C6SL32/6SB32
(Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC1=32.768kHz, Ta=25°C, VS1/VL1–VL3 are internal voltage, C1–C5=0.1µF)
Characteristic
Symbol
Min.
Typ.
Max.
Condition
Unit
High level input voltage (1)
VIH1
0.2•VSS
0
K00–K03, K10
V
P00–P03, P10–P13
High level input voltage (2)
VIH2
0.1•VSS
0
RESET, TEST
V
Low level input voltage (1)
0.8•VSS
VIL1
K00–K03, K10
VSS
V
P00–P03, P10–P13
VIL2
VSS
0.9•VSS
Low level input voltage (2)
RESET, TEST
V
High level input current (1)
IIH1
VIH1=0V, No pull down resistor K00–K03, K10
0
0.5
µA
P00–P03, P10–P13
AMPP, AMPM
IIH2
High level input current (2)
VIH2=0V, With pull down resistor K00–K03, K10
2
16
µA
IIH3
VIH3=0V, With pull down resistor P00–P03, P10–P13
High level input current (3)
9
60
µA
RESET, TEST
VIL=VSS
IIL
Low level input current
-0.5
0
K00–K03, K10
µA
P00–P03, P10–P13
AMPP, AMPM
RESET, TEST
VOH1=0.1•VSS
High level output current (1) IOH1
-300
R10, R11, R13
µA
VOH2=0.1•VSS
High level output current (2) IOH2
-150
R00–R03, R12
µA
P00–P03, P10–P13
IOL1
VOL1=0.9•VSS
Low level output current (1)
1,400
R10, R11, R13
µA
IOL2
VOL2=0.9•VSS
Low level output current (2)
700
R00–R03, R12
µA
P00–P03, P10–P13
IOH3
VOH3=-0.05V
Common output current
-3
COM0–COM3
µA
VOL3=VL3+0.05V
IOL3
3
µA
IOH4
VOH4=-0.05V
Segment output current
-3
SEG0–SEG37
µA
VOL4=VL3+0.05V
IOL4
(during LCD output)
3
µA
VOH5=0.1•VSS
IOH5
Segment output current
-100
SEG0–SEG37
µA
IOL5
VOL5=0.9•VSS
(during DC output)
100
µA
5
E0C6S32
● Analog Circuit Characteristics and Current Consumption
E0C6S32 (Normal Mode)
(Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC1=32.768kHz, Ta=25°C, CG=25pF, VS1/VL1–VL3 are internal voltage, C1–C5=0.1µF)
Max.
Condition
Characteristic
Symbol
Min.
Typ.
Unit
-0.95
Connect 1MΩ load resistor between VDD and VL1
Internal voltage
VL1
-1.15
-1.05
V
(without panel load)
2•VL1
Connect 1MΩ load resistor between VDD and VL2
VL2
2•VL1
V
(without panel load)
-0.1
×0.9
Connect 1MΩ load resistor between VDD and VL3
3•VL1
3•VL1
VL3
V
(without panel load)
-0.1
×0.9
-2.55
-2.25
VSVD
SVD voltage
-2.40
V
100
tSVD
SVD circuit response time
µS
Noninverted input (AMPP)
VSS+0.3
VDD-0.9
Analog comparator
VIP
V
Inverted input (AMPM)
input voltage
VIM
Analog comparator
10
VOF
mV
offset voltage
Analog comparator
3
tAMP VIP=-1.5V, VIM=VIP±15mV
mS
response time
Current consumption
0.65
2.0
During HALT
IOP
µA
Without panel load
2.0
4.0
During operation *1
µA
∗1: The SVD circuit and analog comparator are in the OFF status.
E0C6S32 (Heavy Load Protection Mode)
(Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC1=32.768kHz, Ta=25°C, CG=25pF, VS1/VL1–VL3 are internal voltage, C1–C5=0.1µF)
Max.
Condition
Characteristic
Symbol
Min.
Typ.
Unit
-0.95
Connect 1MΩ load resistor between VDD and VL1
Internal voltage
VL1
-1.15
-1.05
V
(without panel load)
2•VL1
Connect 1MΩ load resistor between VDD and VL2
VL2
2•VL1
V
(without panel load)
-0.1
×0.9
Connect 1MΩ load resistor between VDD and VL3
3•VL1
3•VL1
VL3
V
(without panel load)
-0.1
×0.9
VSVD
-2.55
-2.25
SVD voltage
-2.40
V
tSVD
100
SVD circuit response time
µS
Noninverted input (AMPP)
VSS+0.3
VDD-0.9
Analog comparator
VIP
V
Inverted input (AMPM)
input voltage
VIM
Analog comparator
10
VOF
mV
offset voltage
Analog comparator
3
tAMP VIP=-1.5V, VIM=VIP±15mV
mS
response time
Current consumption
11.2
34.0
During HALT
IOP
µA
Without panel load
14.5
40.0
During operation *1
µA
∗1: The SVD circuit is in the ON status (HLMOD="1", BLS="0"). The analog comparator is in the OFF status.
E0C6SL32 (Normal Mode)
(Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC1=32.768kHz, Ta=25°C, CG=25pF, VS1/VL1–VL3 are internal voltage, C1–C5=0.1µF)
Max.
Condition
Characteristic
Symbol
Min.
Typ.
Unit
-0.95
Connect 1MΩ load resistor between VDD and VL1
Internal voltage
VL1
-1.15
-1.05
V
(without panel load)
2•VL1
Connect 1MΩ load resistor between VDD and VL2
VL2
2•VL1
V
(without panel load)
-0.1
×0.9
Connect 1MΩ load resistor between VDD and VL3
3•VL1
3•VL1
VL3
V
(without panel load)
-0.1
×0.9
-1.30
-1.10
SVD voltage
VSVD
-1.20
V
tSVD
100
SVD circuit response time
µS
Noninverted input (AMPP)
VSS+0.3
VDD-0.9
Analog comparator
VIP
V
Inverted input (AMPM)
input voltage
VIM
Analog comparator
20
VOF
mV
offset voltage
Analog comparator
3
tAMP VIP=-1.1V, VIM=VIP±30mV
mS
response time
Current consumption
0.65
1.5
During HALT
IOP
µA
Without panel load
2.0
4.0
During operation *1
µA
∗1: The SVD circuit and analog comparator are in the OFF status.
6
E0C6S32
E0C6SL32 (Heavy Load Protection Mode)
(Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC1=32.768kHz, Ta=25°C, CG=25pF, VS1/VL1–VL3 are internal voltage, C1–C5=0.1µF)
Max.
Condition
Characteristic
Symbol
Min.
Typ.
Unit
-0.95
Connect 1MΩ load resistor between VDD and VL1
Internal voltage
VL1
-1.15
-1.05
V
(without panel load)
2•VL1
Connect 1MΩ load resistor between VDD and VL2
VL2
2•VL1
V
(without panel load)
-0.1
×0.85
Connect 1MΩ load resistor between VDD and VL3
3•VL1
3•VL1
VL3
V
(without panel load)
-0.1
×0.85
VSVD
-1.30
-1.10
SVD voltage
-1.20
V
tSVD
100
SVD circuit response time
µS
Noninverted input (AMPP)
VSS+0.3
VDD-0.9
Analog comparator
VIP
V
Inverted input (AMPM)
input voltage
VIM
Analog comparator
20
VOF
mV
offset voltage
Analog comparator
3
tAMP VIP=-1.1V, VIM=VIP±30mV
mS
response time
Current consumption
11.2
34.0
During HALT *1
IOP
µA
Without panel load
14.5
40.0
µA
During operation *1
∗1: The SVD circuit is in the ON status (HLMOD="1", BLS="0"). The analog comparator is in the OFF status.
E0C6SB32 (Normal Mode)
(Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC1=32.768kHz, Ta=25°C, CG=25pF, VS1/VL1–VL3 are internal voltage, C1–C5=0.1µF)
Max.
Condition
Characteristic
Symbol
Min.
Typ.
Unit
-0.95
Connect 1MΩ load resistor between VDD and VL1
Internal voltage
VL1
-1.15
-1.05
V
(without panel load)
2•VL1
Connect 1MΩ load resistor between VDD and VL2
VL2
2•VL1
V
(without panel load)
-0.1
×0.9
Connect 1MΩ load resistor between VDD and VL3
3•VL1
3•VL1
VL3
V
(without panel load)
-0.1
×0.9
VSVD
-1.30
-1.10
SVD voltage
-1.20
V
tSVD
100
SVD circuit response time
µS
Noninverted input (AMPP)
VSS+0.3
VDD-0.9
Analog comparator
VIP
V
Inverted input (AMPM)
input voltage
VIM
Analog comparator
20
VOF
mV
offset voltage
Analog comparator
3
tAMP VIP=-1.1V, VIM=VIP±30mV
mS
response time
Current consumption
0.65
1.5
During HALT
IOP
µA
Without panel load
2.0
4.0
During operation *1
µA
∗1: The SVD circuit and analog comparator are in the OFF status.
E0C6SB32 (Heavy Load Protection Mode)
(Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC1=32.768kHz, Ta=25°C, CG=25pF, VS1/VL1–VL3 are internal voltage, C1–C5=0.1µF)
Max.
Condition
Characteristic
Symbol
Min.
Typ.
Unit
-0.95
Connect 1MΩ load resistor between VDD and VL1
Internal voltage
VL1
-1.15
-1.05
V
(without panel load)
2•VL1
Connect 1MΩ load resistor between VDD and VL2
VL2
2•VL1
V
(without panel load)
-0.1
×0.85
Connect 1MΩ load resistor between VDD and VL3
3•VL1
3•VL1
VL3
V
(without panel load)
-0.1
×0.85
-1.30
-1.10
VSVD
SVD voltage
-1.20
V
100
tSVD
SVD circuit response time
µS
Noninverted input (AMPP)
VSS+0.3
VDD-0.9
Analog comparator
VIP
V
Inverted input (AMPM)
input voltage
VIM
Analog comparator
20
VOF
mV
offset voltage
Analog comparator
3
tAMP VIP=-1.1V, VIM=VIP±30mV
mS
response time
Current consumption
11.2
34.0
During HALT *1
IOP
µA
Without panel load
14.5
40.0
During operation *1
µA
∗1: The SVD circuit is in the ON status (HLMOD="1", BLS="0"). The analog comparator is in the OFF status.
7
E0C6S32
E0C6SA32 (Normal Mode)
(Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC1=32.768kHz, Ta=25°C, CG=25pF, VS1/VL1–VL3 are internal voltage, C1–C5=0.1µF)
Unit
Characteristic
Symbol
Min.
Typ.
Condition
Max.
V
Internal voltage
VL1
-1.15
-1.05
Connect 1MΩ load resistor between VDD and VL1
-0.95
(without panel load)
V
2•VL1
VL2
Connect 1MΩ load resistor between VDD and VL2
2•VL1
(without panel load)
-0.1
×0.9
V
VL3
Connect 1MΩ load resistor between VDD and VL3
3•VL1
3•VL1
(without panel load)
-0.1
×0.9
V
SVD voltage
-2.40
VSVD
-2.55
-2.25
µS
SVD circuit response time
tSVD
100
V
Analog comparator
VIP
Noninverted input (AMPP)
VSS+0.3
VDD-0.9
VIM
input voltage
Inverted input (AMPM)
mV
VOF
Analog comparator
10
offset voltage
mS
tAMP VIP=-1.5V, VIM=VIP±15mV
Analog comparator
3
response time
µA
IOP
Without panel load
During HALT
Current consumption
1.5
3.0
µA
OSCC="0"
During operation *1
4.0
8.0
µA
During operation at 1MHz *1
Without panel load
150
300
∗1: The SVD circuit and analog comparator are in the OFF status.
E0C6SA32 (Heavy Load Protection Mode)
(Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC1=32.768kHz, Ta=25°C, CG=25pF, VS1/VL1–VL3 are internal voltage, C1–C5=0.1µF)
Unit
Characteristic
Symbol
Min.
Typ.
Condition
Max.
V
Internal voltage
VL1
-1.15
-1.05
Connect 1MΩ load resistor between VDD and VL1
-0.95
(without panel load)
V
2•VL1
VL2
Connect 1MΩ load resistor between VDD and VL2
2•VL1
(without panel load)
-0.1
×0.9
V
VL3
Connect 1MΩ load resistor between VDD and VL3
3•VL1
3•VL1
(without panel load)
-0.1
×0.9
V
SVD voltage
-2.40
VSVD
-2.55
-2.25
µS
SVD circuit response time
tSVD
100
V
Analog comparator
VIP
Noninverted input (AMPP)
VSS+0.3
VDD-0.9
VIM
input voltage
Inverted input (AMPM)
mV
VOF
Analog comparator
10
offset voltage
mS
tAMP VIP=-1.5V, VIM=VIP±15mV
Analog comparator
3
response time
µA
IOP
Without panel load
During HALT
Current consumption
60
110
µA
OSCC="0"
During operation *1
65
120
µA
During operation at 1MHz *1
Without panel load
200
330
∗1: The SVD circuit is in the ON status (HLMOD="1", BLS="0"). The analog comparator is in the OFF status.
● Oscillation Characteristics
The oscillation characteristics change depending on the conditions (components used, board pattern, etc.). Use the following characteristics as reference values.
E0C6S32 (Crystal oscillation circuit)
(Unless otherwise specified: VDD=0V, VSS=-3.0V, Crystal: C-002R (CI=35kΩ), CG=25pF, CD=built-in, Ta=25°C)
Characteristic
Symbol
Min.
Typ.
Max.
Condition
Unit
tsta≤5sec
(VSS)
Oscillation start voltage
Vsta
-1.8
V
(VSS)
tstp≤10sec
Oscillation stop voltage
Vstp
-1.8
V
Including the parasitic capacity inside the IC
Built-in capacitance (drain)
CD
20
pF
∂f/∂V
VSS=-1.8 to -3.6V
Frequency/voltage deviation
5
ppm
∂f/∂IC
Frequency/IC deviation
-10
10
ppm
∂f/∂CG CG=5 to 25pF
Frequency adjustment range
35
45
ppm
(VSS)
Harmonic oscillation start voltage Vhho
-3.6
V
Between OSC1 and VDD, VSS
Rleak
Permitted leak resistance
200
MΩ
8
E0C6S32
E0C6SL32 (Crystal oscillation circuit)
(Unless otherwise specified: VDD=0V, VSS=-1.5V, Crystal: C-002R (CI=35kΩ), CG=25pF, CD=built-in, Ta=25°C)
Characteristic
Symbol
Condition
Min.
Typ.
Max.
Unit
Oscillation start voltage
Vsta
tsta≤5sec
(VSS)
-1.1
V
Oscillation stop voltage
Vstp
tstp≤10sec
(VSS) -1.1(-0.9)*1
V
Built-in capacitance (drain)
CD
Including the parasitic capacity inside the IC
20
pF
Frequency/voltage deviation
∂f/∂V
VSS=-1.1 to -1.8V (-0.9) *1
5
ppm
Frequency/IC deviation
∂f/∂IC
-10
10
ppm
Frequency adjustment range
∂f/∂CG CG=5 to 25pF
35
45
ppm
Harmonic oscillation start voltage Vhho
(VSS)
-1.8
V
Permitted leak resistance
Rleak
Between OSC1 and VDD, VSS
200
MΩ
∗1: Items enclosed in parentheses ( ) are those used when operating at heavy load protection mode.
Note, however, that the ON time for BLS must be limited to 10 msec per second of operation time.
E0C6SB32 (Crystal oscillation circuit)
(Unless otherwise specified: VDD=0V, VSS=-1.5V, Crystal: C-002R (CI=35kΩ), CG=25pF, CD=built-in, Ta=25°C)
Characteristic
Symbol
Condition
Min.
Typ.
Max.
Unit
Oscillation start voltage
Vsta
tsta≤5sec
(VSS)
-1.1
V
Oscillation stop voltage
Vstp
tstp≤10sec
(VSS) -1.1(-0.9)*1
V
Built-in capacitance (drain)
CD
pF
Including the parasitic capacity inside the IC
20
Frequency/voltage deviation
∂f/∂V
ppm
VSS=-1.1 to -3.6V (-0.9) *1
5
Frequency/IC deviation
∂f/∂IC
-10
ppm
10
Frequency adjustment range
∂f/∂CG CG=5 to 25pF
35
ppm
45
Harmonic oscillation start voltage Vhho
V
(VSS)
-3.6
Permitted leak resistance
Rleak
Between OSC1 and VDD, VSS
200
MΩ
∗1: Items enclosed in parentheses ( ) are those used when operating at heavy load protection mode.
Note, however, that the ON time for BLS must be limited to 10 msec per second of operation time.
E0C6SA32 (Crystal oscillation circuit)
(Unless otherwise specified: VDD=0V, VSS=-3.0V, Crystal: C-002R (CI=35kΩ), CG=25pF, CD=built-in, Ta=25°C)
Characteristic
Symbol
Min.
Typ.
Max.
Condition
Unit
Oscillation start voltage
Vsta
-1.8
V
tsta≤5sec
(VSS)
Oscillation stop voltage
Vstp
-1.8
tstp≤10sec
V
(VSS)
Built-in capacitance (drain)
CD
20
Including the parasitic capacity inside the IC
pF
Frequency/voltage deviation
5
VSS=-2.2 to -3.6V
ppm
∂f/∂V
Frequency/IC deviation
-10
10
ppm
∂f/∂IC
Frequency adjustment range
35
45
ppm
∂f/∂CG CG=5 to 25pF
Harmonic oscillation start voltage Vhho
-3.6
(VSS)
V
Permitted leak resistance
200
MΩ
Between OSC1 and VDD, VSS
Rleak
E0C6SA32 (CR oscillation circuit)
Characteristic
Oscillation frequency dispersion
Oscillation start voltage
Oscillation start time
Oscillation stop voltage
Symbol
fOSC3
Vsta
tsta VSS=-2.2 to -3.6V
Vstp
(Unless otherwise specified: VDD=0V, VSS=-3.0V, RCR=33kΩ, Ta=25°C)
Min.
Typ.
Max.
Unit
Condition
-30
1MHz
30
%
-1.8
V
(VSS)
3
mS
-1.8
V
(VSS)
E0C6SA32 (Ceramic oscillation circuit)
Characteristic
Oscillation start voltage
Oscillation start time
Oscillation stop voltage
(Unless otherwise specified: VDD=0V, VSS=-3.0V, ceramic oscillation: 1MHz, CGC=CDC=100pF, Ta=25°C)
Symbol
Condition
Min.
Typ.
Max.
Unit
Vsta
(VSS)
-1.8
V
tsta VSS=-2.2 to -3.6V
5
mS
Vstp
(VSS)
-1.8
V
9
E0C6S32
■ BASIC EXTERNAL CONNECTION DIAGRAM
• COM3
• SEG0
• K00
I
• SEG37
• COM0
LCD
panel
C1
• CB
• CA
• K03
• K10
• VL1
• P00
• VL3
• P03
• P10
E0C
6S32/6SL32/6SB32
• R00
• RESET
1.5 V
(E0C6SL32/6SB32)
or
3.0 V
(E0C6S32)
C5
N.C.
N.C.
+
• TEST
• VSS
CP
Piezo
• R10(BZ)
• R13(BZ)
LAMP
• R11
• R03
• R12(FOUT)
• AMPM
CGX
X'tal
• AMPP
• P13
C4
• OSC1
• OSC2
• VS1
• OSC3
• OSC4
O
C3
• VL2
• VDD
I/O
C2
• COM3
• SEG0
• K00
I
• SEG37
• COM0
LCD
panel
C1
• CB
• CA
• K03
• K10
• VL1
• P00
• VL3
• P03
• P10
• P13
• AMPM
• OSC3
C5
RCR
CGC
CR ∗1
• AMPP
• OSC4
∗2
CDC
• R10(BZ)
• R13(BZ)
• RESET
• R11
• R12(FOUT)
• R03
CGX
X'tal
• OSC2
• VS1
O
C4
• OSC1
E0C6SA32
• R00
C3
• VL2
• VDD
I/O
C2
• TEST
• VSS
+
CP
∗1 Ceramic oscillation
RCR
C1~C5
CP
32.768kHz, CI(Max.)=35kΩ
5~25pF
Ceramic oscillator
Gate capacitance
Drain capacitance
Resistance for CR oscillation
1MHz
100pF
100pF
33kΩ
0.1µF
3.3µF
Piezo
Crystal oscillator
Trimmer capacitor
LAMP
∗2 CR oscillation
X'tal
CGX
CR
CGC
CDC
Note: The above table is simply an example, and is not guaranteed to work.
10
3.0 V
E0C6S32
■ PACKAGE DIMENSIONS
Plastic QFP5-80pin
25.6±0.4
20±0.1
64
41
INDEX
19.6±0.4
40
14±0.1
65
25
80
2.7±0.1
1
24
0.35±0.1
3.4max
0.8
0.26
0.15±0.05
0°
12°
1.5
2.8
Plastic QFP14-80pin
14±0.4
12±0.1
60
41
14±0.4
40
12±0.1
61
INDEX
80
21
1.4±0.1
20
0.5
+0.1
0.18 –0.05
+0.05
0.125 –0.025
0°
10°
0.5±0.2
0.1
1.7max
1
1
Unit: mm
11
E0C6S32
NOTICE:
No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko
Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of
any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that
this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any intellectual
property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this
material will be free from any patent or copyright infringement of a third party. This material or portions thereof may contain technology or the
subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade Control Law of Japan and may require an
export license from the Ministry of International Trade and Industry or other approval from another government agency.
© Seiko Epson Corporation 1999 All right reserved.
SEIKO EPSON CORPORATION
ELECTRONIC DEVICES MARKETING DIVISION
IC Marketing & Engineering Group
ED International Marketing Department I (Europe & U.S.A.)
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone : 042-587-5812 FAX : 042-587-5564
ED International Marketing Department II (Asia)
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone : 042-587-5814 FAX : 042-587-5110