HY62KF16403E Series 256Kx16bit full CMOS SRAM Document Title 256K x 16bit 2.7 ~ 3.6V Super low Power FCMOS Slow SRAM Revision History Revision No History Draft Date Remark Dec.26.2001 Preliminary 00 Initial Draft 01 Absolute Maximum Ratings Nov.14.2002 - Vcc changed -0.3V to 4.6V -> -0.3V to 4.0V DC Electric Characteristics - ICC changed 4mA -> 3mA - ICC1 changed 25mA at 55ns -> 20mA at 55ns - ICC1 changed 20mA at 70ns -> 15mA at 70ns - ICC1 changed 3mA at 1us -> 2mA at 1us AC Test Conditions - Output Load changed 5pF -> 30pF Data Retention Electric Characteristics - ICCDR changed 10uA -> 6uA Marking Information - Part Name changed HY62KF6403E ->HY62KF16403E Final This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev.01 / Nov.02 Hynix Semiconductor HY62KF16403E Series DESCRIPTION FEATURES The HY62KF16403E is a high speed, super low power and 4Mbit full CMOS SRAM organized as 256K words by 16bits. The HY62KF16403E uses high performance full CMOS process technology and is designed for high speed and low power circuit technology. It is particularly well-suited for the high density low power system application. This device has a data retention mode that guarantees data to remain valid at a minimum power supply voltage of 1.2V. • Fully static operation and Tri-state output • TTL compatible inputs and outputs • Battery backup -. 1.2V(min) data retention • Standard pin configuration -. 44pin 400mil TSOP-II (Forward) Product No. Voltage (V) Speed (ns) Operation Current/Icc(mA) HY62KF16403E-I 2.7~3.6 55/70 3 Standby Current(uA) SL LL 6 15 Temperature (°C) -40~85 Note 1. I : Industrial 2. Current value is max. PIN CONNECTION I/O1 I/O8 DATA I/O BUFFER WRITE DRIVER A17 MEMORY ARRAY 256K x 16 SENSE AMP ROW DECODER A0 BLOCK DECODER TSOPII (Forward) A5 A6 A7 / OE / UB / LB I/O16 I/O15 I/O14 I/O13 Vss Vcc I/O12 I/O11 I/O10 I/O9 NC A8 A9 A10 A11 A12 COLUMN DECODER 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 PRE DECODER 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 ADD INPUT BUFFER A4 A3 A2 A1 A0 / CS I/O1 I/O2 I/O3 I/O4 Vcc Vss I/O5 I/O6 I/O7 I/O8 / WE A17 A16 A15 A14 A13 BLOCK DIAGRAM I/O9 I/O16 /CS /OE /LB /UB /WE PIN DESCRIPTION Pin Name /CS /WE /OE /LB /UB Rev.01 / Nov.02 Pin Function Chip Select Write Enable Output Enable Lower Byte Control (I/O1~I/O8) Upper Byte Control (I/O9~I/O16) Pin Name I/O1~I/O16 A0~A17 Vcc Vss NC Pin Function Data Inputs/Outputs Address Inputs Power (2.7~3.6V) Ground No Connection 2 HY62KF16403E Series ORDERING INFORMATION Part No. HY62KF16403E-SD(I) HY62KF16403E-DD(I) Speed 55/70 55/70 Power SL-part LL-part Temp. I I Package TSOP-II TSOP-II Note 1. I : Industrial ABSOLUTE MAXIMUM RATINGS (1) Symbol VIN, VOUT Vcc TA TSTG PD TSOLDER Parameter Input/Output Voltage Power Supply Operating Temperature Storage Temperature Power Dissipation Ball Soldering Temperature & Time Rating -0.3 to VCC+0.3V -0.3 to 4.0 -40 to 85 -55 to 150 1.0 260 • 10 Unit V V °C °C W °C•sec Remark HY62KF16403E-I Note 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is stress rating only and the functional operation of the device under these or any other conditions above those indicated in the operation of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect reliability. TRUTH TABLE /CS /WE /OE /LB /UB Mode H X H X X H X H L L L X X X H H L L H L L Deselected L X X H L H L L H L L Output Disabled Read Write I/O Pin I/O1~I/O8 I/O9~I/O16 High-Z High-Z High-Z High-Z DOUT High-Z DOUT DIN High-Z DIN High-Z DOUT DOUT High-Z DIN DIN Power Standby Active Active Active Note: 1. H=VIH, L=VIL, X=don't care (VIL or VIH) 2. /UB, /LB(Upper, Lower Byte enable) These active LOW inputs allow individual bytes to be written or read. When /LB is LOW, data is written or read to the lower byte, I/O 1 -I/O 8. When /UB is LOW, data is written or read to the upper byte, I/O 9 -I/O 16. Rev.01 / Nov.02 2 HY62KF16403E Series RECOMMENDED DC OPERATING CONDITION Symbol Vcc Vss VIH VIL Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Min. 2.7 0 2.2 -0.31. Typ 3.0 or 3.3 0 - Max. 3.6 0 Vcc+0.3 0.6 Unit V V V V Note : 1. Undershoot : VIL = -1.5V for pulse width less than 30ns 2. Undershoot is sampled, not 100% tested. DC ELECTRICAL CHARACTERISTICS TA = -40°C to 85°C Sym Parameter ILI Input Leakage Current ILO Output Leakage Current Icc Operating Power Supply Current ICC1 ISB Average Operating Current Standby Current (TTL Input) ISB1 Standby Current (CMOS Input) VOL VOH Output Low Output High Test Condition Vss < VIN < Vcc Vss < VOUT < Vcc, /CS = VIH or /OE = VIH or /WE = VIL /CS = VIL, VIN = VIH or VIL, II/O = 0mA /CS = VIL, 55ns VIN = VIH or VIL, Cycle Time = Min, 70ns 100% Duty, II/O = 0mA /CS < 0.2V, VIN < 0.2V or VIN > Vcc-0.2V, Cycle Time = 1us, 100% Duty, II/O = 0mA /CS = VIH VIN = VIH or VIL /CS > Vcc - 0.2V, 3.0~ VIN > Vcc - 0.2V or 3.6V VIN < Vss + 0.2V 2.7~ 3.3V IOL = 2.1mA IOH = -1.0mA Min -1 Typ1. - Max 1 Unit uA -1 - 1 uA 3 mA 20 mA 15 mA 2 mA 300 uA 6 15 6 12 0.4 - uA uA uA uA V V SL LL SL LL 2.4 0.2 0.2 0.2 0.2 - Note 1. Typical values are at Vcc = 3.0V TA = 25°C 2. Typical values are not 100% tested CAPACITANCE (Temp = 25°C, f= 1.0MHz) Symbol Parameter CIN Input Capacitance (Add, /CS, /WE, /OE) COUT Output Capacitance (I/O) Condition VIN = 0V VI/O = 0V Max. 8 10 Unit pF pF Note : These parameters are sampled and not 100% tested Rev.01 / Nov.02 3 HY62KF16403E Series AC CHARACTERISTICS TA = -40°C to 85°C, unless otherwise specified # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 Symbol 55ns Min. Max. Parameter READ CYCLE tRC Read Cycle Time tAA Address Access Time tACS Chip Select Access Time tOE Output Enable to Output Valid tBA /LB, /UB Access Time tCLZ Chip Select to Output in Low Z tOLZ Output Enable to Output in Low Z tBLZ /LB, /UB Enable to Output in Low Z tCHZ Chip Deselection to Output in High Z tOHZ Out Disable to Output in High Z tBHZ /LB, /UB Disable to Output in High Z tOH Output Hold from Address Change WRITE CYCLE tWC Write Cycle Time tCW Chip Selection to End of Write tAW Address Valid to End of Write tBW /LB, /UB Valid to End of Write tAS Address Set-up Time tWP Write Pulse Width tWR Write Recovery Time tWHZ Write to Output in High Z tDW Data to Write Time Overlap tDH Data Hold from Write Time tOW Output Active from End of Write 70ns Min. Max. Unit 55 10 5 10 0 0 0 10 55 55 30 55 20 20 20 - 70 10 5 10 0 0 0 10 70 70 35 70 25 25 25 - ns ns ns ns ns ns ns ns ns ns ns ns 55 50 50 50 0 45 0 0 25 0 5 20 - 70 60 60 60 0 50 0 0 30 0 5 20 - ns ns ns ns ns ns ns ns ns ns ns AC TEST CONDITIONS TA = -40°C to 85°C, unless otherwise specified Parameter Input Pulse Level Input Rise and Fall Time Input and Output Timing Reference Level Output Load tCLZ, tOLZ, tCHZ, tOHZ, tWHZ, tOW Others Value 0.4V to 2.2V 5ns 1.5V CL = 30pF + 1TTL Load CL = 30pF + 1TTL Load AC TEST LOADS VTM=2.8V 1029 Ohm DOUT CL(1) 1728 Ohm Note 1. Including jig and scope capacitance Rev.01 / Nov.02 4 HY62KF16403E Series TIMING DIAGRAM READ CYCLE 1 (Note 1,4) tRC ADDR tAA tOH tACS /CS tCHZ(3) tBA /UB ,/ LB Data Out tBHZ(3) tOE /OE High-Z tCLZ(3) tOLZ(3) tBLZ(3) tOHZ(3) Data Valid READ CYCLE 2 (Note 1,2,4) tRC ADDR tAA tOH tOH Data Out Previous Data Data Valid READ CYCLE 3(Note 1,2,4) /CS /UB, /LB tACS tCLZ(3) Data Out tCHZ(3) Data Valid Notes: 1. A read occurs during the overlap of a low /OE, a high /WE, a low /CS and /UB and/or /LB . 2. /OE = VIL 3. tCHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage levels. 4. /CS in high for the standby, low for active /UB and /LB in high for the standby, low for active Rev.01 / Nov.02 5 HY62KF16403E Series WRITE CYCLE 1 (1,4,8) (/WE Controlled) tWC ADDR tWR(2) tCW /CS tAW tBW /UB,/LB tWP /WE tAS Data In tDW High-Z tDH Data Valid tWHZ(3,7) tOW (5) (6) Data Out WRITE CYCLE 2 (Note 1,4,8) (/CS Controlled) tWC ADDR tAS tWR(2) tCW /CS tAW tBW /UB,/LB tWP /WE tDW Data In Data Out Rev.01 / Nov.02 High-Z tDH Data Valid High-Z 6 HY62KF16403E Series Notes: 1. A write occurs during the overlap of a low /WE, a low /CS and a low /UB and/or /LB . 2. tWR is measured from the earlier of /CS, /LB, /UB, or /WE going high to the end of write cycle. 3. During this period, I/O pins are in the output state so that the input signals of opposite phase to the output must not be applied. 4. If the /CS, /LB and /UB low transition occur simultaneously with the /WE low transition or after the /WE transition, outputs remain in a high impedance state. 5. Q(data out) is the same phase with the write data of this write cycle. 6. Q(data out) is the read data of the next address. 7. /CS in high for the standby, low for active /UB and /LB in high for the standby, low for active DATA RETENTION ELECTRIC CHARACTERISTIC TA = -40°C to 85°C Symbol Parameter VDR Vcc for Data Retention Iccdr Data Retention Current tCDR tR Chip Deselect to Data Retention Time Operating Recovery Time Test Condition /CS > Vcc - 0.2V, VIN > Vcc - 0.2V or VIN < Vss + 0.2V Vcc=1.5V, /CS > Vcc - 0.2V or VIN > Vcc - 0.2V or VIN < Vss + 0.2V Min Typ1. Max Unit 1.2 - 3.6 V SL - 0.1 3 uA LL - 0.1 6 uA 0 - - ns tRC - - ns See Data Retention Timing Diagram Notes: 1. Typical values are under the condition of TA = 25°C. 2. Typical value are sampled and not 100% tested DATA RETENTION TIMING DIAGRAM DATA RETENTION MODE VCC 2.7V tR tCDR VIH VDR /CS >VCC-0.2V /CS VSS Rev.01 / Nov.02 7 HY62KF16403E Series PACKAGE INFORMATION 44pin 400mil Thin Small Outline Package Forward (D) #44 #23 UNIT : INCH(mm) #1 #22 Max. Min. 0.470(11.938) 0.462(11.735) 0.729(18.517) 0.721(18.313) 0.047(1.194) 0.039(0.991) 0.0083(0.21) 0.0047(0.120) 0.404(10.262) 0.396(10.058) 0.10MAX 0.004MAX 0.016(0.4) 0.012(0.3) Rev.01 / Nov.02 0.0315(0.800) BSC 0.0059(0.150) 0.002(0.050) 0.0235(0.597) 0.0160(0.406) 0~5 8 HY62KF16403E Series MARKING INFORMATION Package TSOP-II (Forward) Marking Example h y n i x H Y 6 2 K K O R E A F 1 6 4 0 3 y y w w p E c s s t Index • hynix : hynix Logo • yy : Year ( ex : 02 = year 2002, 03 = year 2002 ) • ww : Work Week ( ex : 12 = ww12 ) •p : Process Code • HY62KF16403E : Part Name •c : Power Consumption -D -S • ss : Low Low Power : Super Low Power : Speed - 55 - 70 : 55ns : 70ns •t : Temperature -I • KOREA : Origin Country Note - Capital Letter - Small Letter : Fixed Item : Non-fixed Item (Except hynix) Rev.01 / Nov.02 : Industrial ( -40 ~ 85 °C ) 9