ETC VN750SM

VN750SM
®
M
HIGH SIDE DRIVER
TYPE
VN750SM
RDS(on)
55 mΩ
IOUT
6A
VCC
36 V
CMOS COMPATIBLE INPUT
■ ON STATE OPEN LOAD DETECTION
■ OFF STATE OPEN LOAD DETECTION
■ SHORTED LOAD PROTECTION
■ UNDERVOLTAGE AND OVERVOLTAGE
SHUTDOWN
■ PROTECTION AGAINST LOSS OF GROUND
■ VERY LOW STAND-BY CURRENT
■
■
SO-8
ORDER CODES
PACKAGE
REVERSE BATTERY PROTECTION (*)
SO-8
DESCRIPTION
The VN750SM is a monolithic device designed in
STMicroelectronics VIPower M0-3 Technology,
intended for driving any kind of load with one side
connected to ground.
Active VCC pin voltage clamp protects the device
against low energy spikes (see ISO7637 transient
compatibility table). Active current limitation
combined with thermal shutdown and automatic
restart protect the device against overload.
The device detects open load condition both in on
and off state. The openload threshold is aimed at
TUBE
VN750SM
T&R
VN750SM13TR
detecting the 5W/12V standard bulb as an
openload fault in the on state. Output shorted to
VCC is detected in the off state. Device
automatically turns off in case of ground pin
disconnection.
BLOCK DIAGRAM
VCC
OVERVOLTAGE
DETECTION
VCC
CLAMP
UNDERVOLTAGE
DETECTION
GND
Power CLAMP
DRIVER
INPUT
OUTPUT
LOGIC
CURRENT LIMITER
ON STATE OPENLOAD
DETECTION
STATUS
OVERTEMPERATURE
DETECTION
OFF STATE OPENLOAD
AND OUTPUT SHORTED TO VCC
DETECTION
(*) See application schematic at page 8
July 2002
1/18
1
VN750SM
ABSOLUTE MAXIMUM RATING
Symbol
VCC
- VCC
- Ignd
IOUT
- IOUT
IIN
ISTAT
VESD
EMAX
Ptot
Tj
Tstg
Parameter
DC Supply Voltage
Reverse DC Supply Voltage
DC Reverse Ground Pin Current
DC Output Current
Reverse DC Output Current
DC Input Current
DC Status Current
Electrostatic Discharge (Human Body Model: R=1.5KΩ; C=100pF)
Value
41
- 0.3
- 200
Internally Limited
-6
+/- 10
+/- 10
Unit
V
V
mA
A
A
mA
mA
- INPUT
4000
V
- STATUS
4000
V
- OUTPUT
5000
V
- VCC
Maximum Switching Energy
5000
V
90
mJ
4.2
Internally Limited
- 55 to 150
W
°C
°C
(L=1.3mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IL=10A)
Power Dissipation TC=25°C
Junction Operating Temperature
Storage Temperature
CONNECTION DIAGRAM (TOP VIEW)
VCC
OUTPUT
OUTPUT
VCC
5
4
8
1
N.C.
STATUS
INPUT
GND
CURRENT AND VOLTAGE CONVENTIONS
IS
IIN
VCC
INPUT
ISTAT
IOUT
STATUS
VCC
OUTPUT
GND
VIN
VSTAT
2/18
1
IGND
VOUT
VN750SM
THERMAL DATA
Symbol
Rthj-lead
Parameter
Thermal Resistance Junction-lead
Rthj-amb
Thermal Resistance Junction-ambient
Max
Max
Value
30
Unit
°C/W
93 (*)
°C/W
(*) When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35µm thick) connected to all VCC pins. Horizontal
mounting and no artificial air flow.
ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C<Tj<150°C unless otherwise specified)
POWER
Symbol
VCC
VUSD
VUSDhyst
VOV
RON
IS
IL(off1)
IL(off2)
IL(off3)
IL(off4)
Parameter
Operating Supply Voltage
Undervoltage Shut-down
Undervoltage Shut-down
Hysteresis
Overvoltage Shut-down
On State Resistance
Supply Current
Off State Output Current
Off State Output Current
Off State Output Current
Off State Output Current
Test Conditions
Min
5.5
3
Typ
13
4
Max
36
5.5
0.5
V
36
IOUT=2A; Tj=25°C; VCC>8V
IOUT=2A; VCC>8V
Unit
V
V
55
V
mΩ
110
25
mΩ
µA
Off State; VCC=13V; VIN=VOUT=0V
10
Off State; VCC=13V; VIN=VOUT=0V;
Tj=25°C
10
20
µA
On State; VCC=13V; VIN=5V; IOUT=0A
2
3.5
50
0
5
3
mA
µA
µA
µA
µA
Typ
Max
Unit
VIN=VOUT=0V
VIN=0V; VOUT=3.5V
VIN=VOUT=0V; Vcc=13V; Tj =125°C
VIN=VOUT=0V; Vcc=13V; Tj =25°C
0
-75
Test Conditions
RL=6.5Ω from VIN rising edge to
VOUT=1.3V
RL=6.5Ω from VIN falling edge to
VOUT=11.7V
Min
SWITCHING (VCC=13V)
Symbol
Parameter
td(on)
Turn-on Delay Time
td(off)
Turn-off Delay Time
dVOUT/dt(on) Turn-on Voltage Slope
RL=6.5Ω from VOUT=1.3V to VOUT=10.4V
dVOUT/dt(off) Turn-off Voltage Slope
RL=6.5Ω from VOUT=11.7V to VOUT=1.3V
40
µs
30
µs
See
relative
diagram
See
relative
diagram
V/µs
V/µs
INPUT PIN
Symbol
VIL
IIL
VIH
IIH
VI(hyst)
VICL
Parameter
Input Low Level
Low Level Input Current
Input High Level
High Level Input Current
Input Hysteresis Voltage
Input Clamp Voltage
Test Conditions
VIN=1.25V
Min
Typ
1
3.25
VIN=3.25V
IIN=1mA
IIN=-1mA
Max
1.25
10
0.5
6
6.8
-0.7
8
Unit
V
µA
V
µA
V
V
V
3/18
1
VN750SM
ELECTRICAL CHARACTERISTICS (continued)
VCC - OUTPUT DIODE
Symbol
VF
Parameter
Forward on Voltage
Test Conditions
-IOUT=2A; Tj=150°C
Min
Typ
Max
0.6
Unit
V
STATUS PIN
Symbol
VSTAT
ILSTAT
CSTAT
VSCL
Parameter
Test Conditions
Status Low Output Voltage ISTAT=1.6mA
Status Leakage Current
Normal Operation; VSTAT=5V
Status Pin Input
Normal Operation; VSTAT=5V
Capacitance
ISTAT=1mA
Status Clamp Voltage
ISTAT=-1mA
Min
6
Typ
6.8
Max
0.5
10
Unit
V
µA
100
pF
8
V
-0.7
V
PROTECTIONS
Symbol
TTSD
TR
Thyst
tSDL
Parameter
Shut-down Temperature
Reset Temperature
Thermal Hysteresis
Status delay in overload
condition
Ilim
Current limitation
Vdemag
Turn-off Output Clamp
Voltage
Test Conditions
Min
150
135
7
Typ
175
10
5.5V<VCC<36V
IOUT=2A; VIN=0V; L=6mH
Unit
°C
°C
°C
20
µs
12
A
12
A
15
Tj>TTSD
6
Max
200
VCC-41 VCC-48 VCC-55
V
OPENLOAD DETECTION
Symbol
IOL
tDOL(on)
VOL
tDOL(off)
Parameter
Openload ON State
Detection Threshold
Openload ON State
Detection Delay
Openload OFF State
Voltage Detection
Test Conditions
VIN=5V
Min
Typ
Max
Unit
0.6
0.9
1.2
A
200
µs
3.5
V
1000
µs
IOUT=0A
VIN=0V
1.5
2.5
Threshold
Openload Detection Delay
at Turn Off
OPEN LOAD STATUS TIMING (with external pull-up)
IOUT< IOL
VOUT > VOL
OVER TEMP STATUS TIMING
Tj > TTSD
VIN
VIN
VSTAT
VSTAT
tDOL(off)
tDOL(on)
tSDL
tSDL
4/18
2
1
VN750SM
Switching time Waveforms
VOUT
90%
80%
dVOUT/dt(off)
dVOUT/dt(on)
10%
t
VIN
td(on)
td(off)
t
TRUTH TABLE
CONDITIONS
Normal Operation
Current Limitation
Overtemperature
Undervoltage
Overvoltage
Output Voltage > VOL
Output Current < IOL
INPUT
L
H
L
H
H
L
H
L
H
L
H
L
H
L
H
OUTPUT
L
H
L
X
X
L
L
L
L
L
L
H
H
L
H
STATUS
H
H
H
(Tj < TTSD) H
(Tj > TTSD) L
H
L
X
X
H
H
L
H
H
L
5/18
1
VN750SM
ELECTRICAL TRANSIENT REQUIREMENTS ON VCC PIN
ISO T/R 7637/1
Test Pulse
I
II
TEST LEVELS
III
IV
1
2
3a
3b
4
5
-25 V
+25 V
-25 V
+25 V
-4 V
+26.5 V
-50 V
+50 V
-50 V
+50 V
-5 V
+46.5 V
-75 V
+75 V
-100 V
+75 V
-6 V
+66.5 V
-100 V
+100 V
-150 V
+100 V
-7 V
+86.5 V
ISO T/R 7637/1
Test Pulse
1
2
3a
3b
4
5
CLASS
C
E
6/18
1
1
I
C
C
C
C
C
C
TEST LEVELS RESULTS
II
III
C
C
C
C
C
C
C
C
C
C
E
E
Delays and
Impedance
2 ms 10 Ω
0.2 ms 10 Ω
0.1 µs 50 Ω
0.1 µs 50 Ω
100 ms, 0.01 Ω
400 ms, 2 Ω
IV
C
C
C
C
C
E
CONTENTS
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device is not performed as designed after exposure to disturbance
and cannot be returned to proper operation without replacing the device.
VN750SM
Figure 1: Waveforms
NORMAL OPERATION
INPUT
LOAD VOLTAGE
STATUS
UNDERVOLTAGE
VUSDhyst
VCC
VUSD
INPUT
LOAD VOLTAGE
STATUS
undefined
OVERVOLTAGE
VCC<VOV
VCC>VOV
VCC
INPUT
LOAD VOLTAGE
STATUS
OPEN LOAD with external pull-up
INPUT
VOUT>VOL
LOAD VOLTAGE
VOL
STATUS
OPEN LOAD without external pull-up
INPUT
LOAD VOLTAGE
STATUS
Tj
TTSD
TR
OVERTEMPERATURE
INPUT
LOAD CURRENT
STATUS
7/18
1
1
VN750SM
APPLICATION SCHEMATIC
+5V
+5V
VCC
Rprot
STATUS
Dld
µC
Rprot
INPUT
OUTPUT
GND
VGND
GND PROTECTION
REVERSE BATTERY
NETWORK
AGAINST
Solution 1: Resistor in the ground line (RGND only). This
can be used with any type of load.
The following is an indication on how to dimension the
RGND resistor.
1) RGND ≤ 600mV / (IS(on)max).
2) RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can
be found in the absolute maximum rating section of the
device’s datasheet.
Power Dissipation in RGND (when VCC<0: during reverse
battery situations) is:
PD= (-VCC)2/RGND
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
calculated with formula (1) where IS(on)max becomes the
sum of the maximum on-state currents of the different
devices.
Please note that if the microprocessor ground is not
common with the device ground then the RGND will
produce a shift (IS(on)max * RGND) in the input thresholds
and the status output values. This shift will vary
depending on how many devices are ON in the case of
several high side drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor
or several devices have to share the same resistor then
the ST suggests to utilize Solution 2 (see below).
Solution 2: A diode (DGND) in the ground line.
A resistor (RGND=1kΩ) should be inserted in parallel to
DGND if the device will be driving an inductive load.
RGND
DGND
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
the ground network will produce a shift (j600mV) in the
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
LOAD DUMP PROTECTION
Dld is necessary (Voltage Transient Suppressor) if the
load dump peak voltage exceeds VCC max DC rating. The
same applies if the device will be subject to transients on
the VCC line that are greater than the ones shown in the
ISO T/R 7637/1 table.
µC I/Os PROTECTION:
If a ground protection network is used and negative
transients are present on the VCC line, the control pins will
be pulled negative. ST suggests to insert a resistor (Rprot )
in line to prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the
leakage current of µC and the current required by the
HSD I/Os (Input levels compatibility) with the latch-up limit
of µC I/Os.
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
5kΩ ≤ Rprot ≤ 65kΩ.
Recommended Rprot value is 10kΩ.
8/18
1
1
VN750SM
OPEN LOAD DETECTION IN OFF STATE
2) no misdetection when load is disconnected: in this
case the VOUT has to be higher than VOLmax; this
results in the following condition RPU<(VPU–VOLmax)/
IL(off2).
Because Is(OFF) may significantly increase if Vout is pulled
high (up to several mA), the pull-up resistor RPU should
be connected to a supply that is switched OFF when the
module is in standby.
The values of VOLmin, VOLmax and IL(off2) are available in
the Electrical Characteristics section.
Off state open load detection requires an external pull-up
resistor (RPU) connected between OUTPUT pin and a
positive supply voltage (VPU) like the +5V line used to
supply the microprocessor.
The external resistor has to be selected according to the
following requirements:
1) no false open load indication when load is connected:
in this case we have to avoid VOUT to be higher than
VOlmin; this results in the following condition
VOUT=(VPU/(RL+RPU))RL<VOlmin.
Open Load detection in off state
V batt.
VPU
VCC
RPU
INPUT
DRIVER
+
LOGIC
IL(off2)
OUT
+
R
STATUS
VOL
RL
GROUND
9/18
1
VN750SM
Off State Output Current
High Level Input Current
Iih (uA)
IL(off1) (uA)
7
3
2.5
6
Off state
Vcc=36V
Vin=Vout=0V
2
Vin=3.25V
5
1.5
4
1
3
0.5
2
0
1
-0.5
-1
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (ºC)
50
75
100
125
150
175
100
125
150
175
100
125
150
175
Tc (ºC)
Status Leakage Current
Input Clamp Voltage
Vicl (V)
Ilstat (uA)
8
0.05
7.8
Iin=1mA
7.6
0.04
7.4
Vstat=5V
0.03
7.2
7
6.8
0.02
6.6
6.4
0.01
6.2
6
0
-50
-25
0
25
50
75
100
125
150
-50
175
-25
0
25
Tc (°C)
50
75
Tc (°C)
Status Low Output Voltage
Status Clamp Voltage
Vstat (V)
Vscl (V)
0.6
8
7.8
Istat=1mA
0.5
7.6
Istat=1.6mA
7.4
0.4
7.2
0.3
7
6.8
0.2
6.6
6.4
0.1
6.2
6
0
-50
-25
0
25
50
75
Tc (ºC)
100
125
150
175
-50
-25
0
25
50
75
Tc (°C)
10/18
1
VN750SM
On State Resistance Vs. Tcase
On State Resistance Vs. VCC
Ron (mOhm)
Ron (mOhm)
140
120
110
120
Iout=2A
Iout=2A
Vcc=8V; 13V; 36V
100
100
Tc= 150°C
90
80
80
Tc= 125°C
70
60
60
50
40
Tc= 25°C
40
20
Tc= - 40°C
30
0
20
-50
-25
0
25
50
75
100
125
150
175
5
10
15
20
Tc (ºC)
25
30
35
40
Vcc (V)
Openload On State Detection Threshold
Input High Level
Iol (A)
Vih (V)
3.6
1.2
1.15
3.4
Vcc=13V
Vin=5V
1.1
3.2
1.05
1
3
0.95
0.9
2.8
0.85
2.6
0.8
0.75
2.4
0.7
2.2
0.65
0.6
2
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (ºC)
50
75
100
125
150
175
100
125
150
175
Tc (ºC)
Input Low Level
Input Hysteresis Voltage
Vil (V)
Vhyst (V)
2.8
1.5
2.6
1.4
1.3
2.4
1.2
2.2
1.1
2
1
1.8
0.9
1.6
0.8
1.4
0.7
1.2
0.6
1
0.5
-50
-25
0
25
50
75
Tc (ºC)
100
125
150
175
-50
-25
0
25
50
75
Tc (ºC)
11/18
1
1
VN750SM
Overvoltage Shutdown
Openload Off State Voltage Detection Threshold
Vol (V)
Vov (V)
50
5
48
4.5
Vin=0V
46
4
44
3.5
42
40
3
38
2.5
36
2
34
1.5
32
1
30
-50
-25
0
25
50
75
100
125
150
-50
175
-25
0
25
50
75
100
125
150
175
100
125
150
175
Tc (ºC)
Tc (°C)
Turn-on Voltage Slope
Turn-off Voltage Slope
dVout/dt/(on) (V/ms)
dVout/dt(off) (V/ms)
1000
500
900
450
Vcc=13V
Rl=6.5Ohm
800
Vcc=13V
Rl=6.5Ohm
400
700
350
600
300
500
250
400
200
300
150
200
100
100
50
0
0
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
-50
-25
0
25
50
75
Tc (ºC)
Ilim Vs. Tcase
Ilim (A)
20
18
Vcc=13V
16
14
12
10
8
6
4
2
0
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
12/18
1
1
VN750SM
Maximum turn off current versus load inductance
ILMAX (A)
100
10
A
B
C
1
0.1
1
10
100
L(mH)
A = Single Pulse at TJstart=150ºC
B= Repetitive pulse at TJstart=100ºC
C= Repetitive Pulse at TJstart=125ºC
Conditions:
VCC=13.5V
Values are generated with RL=0Ω
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
13/18
VN750SM
SO-8 THERMAL DATA
SO-8 PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm,
Cu thickness=35µm, Copper areas: 0.14cm2, 2cm2).
Rthj-amb Vs PCB copper area in open box free air condition
RTHj_amb (ºC/W)
SO8 at 2 pins connected to TAB
110
105
100
95
90
85
80
75
70
0
0.5
1
1.5
PCB Cu heatsink area (cm^2)
14/18
1
2
2.5
VN750SM
SO-8 Thermal Impedance Junction Ambient Single Pulse
ZTH (°C/W)
1000
0.5 cm2
100
2 cm2
10
1
0.1
0.01
0.0001
0.001
0.01
0.1
1
Time (s)
Thermal fitting model of a single channel HSD
in SO-8
10
100
1000
Pulse calculation formula
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where
δ = tp ⁄ T
Thermal Parameter
Tj
C1
C2
C3
C4
C5
C6
R1
R2
R3
R4
R5
R6
Pd
T_amb
Area/island (cm2)
R1 (°C/W)
R2 (°C/W)
R3 ( °C/W)
R4 (°C/W)
R5 (°C/W)
R6 (°C/W)
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
0.5
0.05
0.8
3.5
21
16
58
0.006
2.60E-03
0.0075
0.045
0.35
1.05
2
28
2
15/18
VN750SM
SO-8 MECHANICAL DATA
DIM.
mm.
MIN.
TYP
A
a1
inch
MAX.
MIN.
TYP.
1.75
0.1
0.068
0.25
a2
MAX.
0.003
0.009
1.65
0.064
a3
0.65
0.85
0.025
0.033
b
0.35
0.48
0.013
0.018
b1
0.19
0.25
0.007
0.010
C
0.25
0.5
0.010
0.019
c1
45 (typ.)
D
4.8
5
0.188
0.196
E
5.8
6.2
0.228
0.244
e
1.27
e3
3.81
0.050
0.150
F
3.8
4
0.14
L
0.4
1.27
0.015
M
0.6
S
L1
0.157
0.050
0.023
8 (max.)
0.8
1.2
0.031
0.047
16/18
1
1
VN750SM
SO-8 TUBE SHIPMENT (no suffix)
B
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
C
A
100
2000
532
3.2
6
0.6
All dimensions are in mm.
TAPE AND REEL SHIPMENT (suffix “13TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
2500
2500
330
1.5
13
20.2
12.4
60
18.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (± 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
All dimensions are in mm.
12
4
8
1.5
1.5
5.5
4.5
2
End
Start
Top
No components
Components
No components
cover
tape
500mm min
Empty components pockets
saled with cover tape.
500mm min
User direction of feed
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1
VN750SM
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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