ETC VNQ690SP13TR

VNQ690SP
®
QUAD CHANNEL HIGH SIDE SOLID STATE RELAY
TYPE
VNQ690SP
RDS(on)
90mΩ (*)
IOUT
10 A
VCC
36 V
(*) Per each channel
OUTPUT CURRENT PER CHANNEL: 10A
■ CMOS COMPATIBLE INPUTS
■ OPEN LOAD DETECTION (OFF STATE)
■ UNDERVOLTAGE & OVERVOLTAGE
n SHUT- DOWN
■ OVERVOLTAGE CLAMP
■ THERMAL SHUT-DOWN
■ CURRENT LIMITATION
■ VERY LOW STAND-BY POWER DISSIPATION
■ PROTECTION AGAINST:
n LOSS OF GROUND & LOSS OF VCC
■ REVERSE BATTERY PROTECTION (**)
■
DESCRIPTION
The VNQ690SP is a monolithic device made by
using|
STMicroelectronics
VIPower
M0-3
10
1
PowerSO-10™
ORDER CODES
PACKAGE
PowerSO-10
TUBE
VNQ690SP
T&R
VNQ690SP13TR
Technology, intended for driving resistive or
inductive loads with one side connected to ground.
This device has four independent channels. Builtin thermal shut down and output current limitation
protect the chip from over temperature and short
circuit.
ABSOLUTE MAXIMUM RATING
Symbol
VCC
-VCC
IOUT
IR
IIN
ISTAT
IGND
VESD
Ptot
EMAX
Tj
Tstg
Parameter
Supply voltage (continuous)
Reverse supply voltage (continuous)
Output current (continuous), per each channel
Reverse output current (continuous), per each channel
Input current
Status current
Ground current at TC<25°C (continuous)
Electrostatic Discharge (Human Body Model: R=1.5KΩ; C=100pF)
Value
41
-0.3
Internally limited
-15
+/- 10
+/- 10
-200
Unit
V
V
A
A
mA
mA
mA
- INPUT
4000
V
- STATUS
4000
V
- OUTPUT
5000
V
- VCC
Power dissipation at TC=25°C
Maximum Switching Energy
5000
78
V
W
53
mJ
-40 to 150
-65 to 150
°C
°C
(L=0.38mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IL=14A)
Junction operating temperature
Storage temperature
(**) See application schematic at page 8
April 2003
1/18
VNQ690SP
BLOCK DIAGRAM
VCC
OVERVOLTAGE
UNDERVOLTAGE
DEMAG 1
DRIVER 1
OUTPUT 1
ILIM1
INPUT 1
DEMAG 2
INPUT 2
DRIVER 2
INPUT 3
OUTPUT 2
ILIM2
LOGIC
DEMAG 3
INPUT 4
DRIVER 3
STATUS
OUTPUT 3
ILIM3
STATUS
DEMAG 4
DRIVER 4
OVERTEMP. 1
OUTPUT 4
ILIM4
OVERTEMP. 2
OPEN LOAD
OFF-STATE
OVERTEMP. 3
OVERTEMP. 4
GND
CURRENT AND VOLTAGE CONVENTIONS
IS
IIN1
INPUT 1 VCC OUTPUT 1
IIN2
VIN1
INPUT 2
VIN2
IOUT3
INPUT 3
VOUT2
VOUT3
IOUT4
OUTPUT 4
INPUT 4
STATUS
VSTAT
2/18
VOUT1
OUTPUT 3
VIN3 IIN4
VIN4
IOUT2
OUTPUT 2
IIN3
VCC
IOUT1
ISTAT
VOUT4
GND
IGND
VNQ690SP
CONNECTION DIAGRAM (TOP VIEW)
5
4
3
6
7
STATUS
INPUT 4
INPUT 3
INPUT 2
INPUT 1
8
9
2
10
1
GND
OUTPUT 4
OUTPUT 3
OUTPUT 2
OUTPUT 1
11
VCC
THERMAL DATA
Symbol
Rthj-case
Rtj-amb
Parameter
Thermal resistance junction-case (MAX) per channel
Thermal resistance junction-ambient (MAX)
Value
2
52 (***)
Unit
°C/W
°C/W
(***) When mounted on a standard single-sided FR-4 board with 50 mm² of Cu (at least 35 µm thick).
ELECTRICAL CHARACTERISTICS (VCC=6V up to 24V; -40°C<Tj<150°C unless otherwise specified)
POWER (per each channel)
Symbol
VCC (#)
VUSD (#)
VUVhyst (#)
VOV (#)
VOVhyst (#)
Parameter
Operating supply voltage
Undervoltage shutdown
Undervoltage hysteresis
Overvoltage shutdown
Overvoltage hysteresis
Test Conditions
Min
6
3.5
0.2
36
0.25
Typ
13
4.6
Max
36
6
1
12
40
Unit
V
V
V
V
V
µA
Tj=25°C
12
25
µA
On state; VIN=3.25V; 9V<VCC<18V
6
12
mA
IOUT=1A; Tj=25°C; 9V<VCC<18V
90
mΩ
IOUT=1A, Tj=150°C; 9V<VCC<18V
180
mΩ
50
0
5
3
µA
µA
µA
µA
Max
Unit
µs
µs
Off state; VIN=VOUT=0V; VCC=13.5V
IS (#)
RON
IL(off1)
IL(off2)
IL(off3)
IL(off4)
Supply current
On state resistance
Off State Output Current
Off State Output Current
Off State Output Current
Off State Output Current
Off state; VIN=VOUT=0V; VCC=13.5V
VIN=VOUT=0V
VIN=0V; VOUT=3.5V
VIN=VOUT=0V; VCC=13V; Tj =125°C
VIN=VOUT=0V; VCC=13V; Tj =25°C
0
-75
Parameter
Turn-on delay time
Turn-off delay time
Test Conditions
RL=13Ω channels 1,2,3,4
RL=13Ω channels 1,2,3,4
Min
dVOUT/dt(on)
Turn-on voltage slope
RL=13Ω channels 1,2,3,4
dVOUT/dt(off)
Turn-off voltage slope
RL=13Ω channels 1,2,3,4
(#) Per device.
SWITCHING (VCC=13V)
Symbol
td(on)
td(off)
Typ
30
30
See
relative
diagram
See
relative
diagram
V/µs
V/µs
3/18
VNQ690SP
ELECTRICAL CHARACTERISTICS (continued)
PROTECTIONS (per each channel)
Symbol
TTSD
TR
Thyst
ILIM
Vdemag
VSTAT
Parameter
Shutdown temperature
Reset temperature
Thermal hysteresis
DC Short circuit current
Turn-off output voltage
clamp
Status low output
CSTAT
voltage
Status leakage current
Status pin input
capacitance
VSCL
Status clamp voltage
ILSTAT
Test Conditions
9V<VCC<36V
Min
150
135
7
10
Typ
170
Max
200
15
14
25
20
Unit
°C
°C
°C
A
20
A
6V<VCC<36V
IOUT=2A; VIN=0V; L=6mH
VCC-41 VCC-48 VCC-55
V
ISTAT=1.6mA
0.5
V
Normal operation; VSTAT=5V
10
µA
Normal operation; VSTAT=5V
25
pF
ISTAT=1mA
6
ISTAT=-1mA
6.8
8
-0.7
V
V
LOGIC INPUT (per each channel)
Symbol
VIL
VIH
VHYST
IIH
IIL
VICL
Parameter
Input Low Level Voltage
Input High Level Voltage
Input Hysteresis Voltage
Input high level voltage
Input Current
Input Clamp Voltage
Test Conditions
Min
Typ
Max
1.25
3.25
0.5
VIN=3.25V
VIN=1.25V
IIN=1mA
10
1
6
IIN=-1mA
6.8
8
-0.7
Unit
V
V
V
µA
µA
V
V
OPENLOAD DETECTION (off state) per each channel
Symbol
tSDL
VOL
TDOL
4/18
Parameter
Status Delay
Openload Voltage
Detection Threshold
Openload Detection Delay
at Turn Off
Test Conditions
See Figure 1 (Openload detection
reading must be performed after
TDOL).
Min
VIN=0V
1.5
VCC=18V (*)
Typ
2.5
Max
Unit
20
µs
3.5
V
300
µs
VNQ690SP
ELECTRICAL TRANSIENT REQUIREMENTS
ISO T/R 7637/1
Test Pulse
1
2
3a
3b
4
I
II
-25 V
+25 V
-25 V
+25 V
-4 V
-50 V
+50 V
-50 V
+50 V
-5 V
TEST LEVELS
III
IV
-75 V
+75 V
-100 V
+75 V
-6 V
-100 V
+100 V
-150 V
+100 V
-7 V
Delays and
Impedance
2 ms 10 Ω
0.2 ms 10 Ω
0.1 µs 50 Ω
0.1 µs 50 Ω
100 ms, 0.01 Ω
Test Levels Result
ISO T/R
7637/1
Test Pulse
1
2
3a
3b
4
5
Class
C
E
I
C
C
C
C
C
C
II
C
C
C
C
C
E
III
C
C
C
C
C
E
IV
C
C
C
C
C
E
Contents
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device is not performed as designed after exposure and cannot be
returned to proper operation without replacing the device.
SWITCHING CHARACTERISTICS
VLOAD
90%
80%
dVOUT/dt(off)
dVOUT/dt (on)
10%
t
VIN
td(on)
tr
td(off)
t
5/18
1
VNQ690SP
TRUTH TABLE (per each channel)
CONDITIONS
Normal Operation
Overtemperature
Undervoltage
Overvoltage
Current Limitation
Output Voltage > VOL
INPUT
OUTPUT
STATUS
L
L
H
H
L
H
L
H
H
H
L
L
L
L
X
H
L
L
L
X
H
H
L
L
L
H
H
H
L
X
H
H
L
H
H
H
Figure 1: Status timing waveforms
OPENLOAD STATUS TIMING
OVERTEMP STATUS TIMING
VIN
VIN
VSTAT
VSTAT
tDOL
6/18
2
tSDL
tSDL
tSDL
VNQ690SP
Figure 2: Waveforms
NORMAL OPERATION
INPUTn
LOAD VOLTAGEn
STATUS
UNDERVOLTAGE
VUSDhyst
VCC
VUSD
INPUTn
LOAD VOLTAGEn
STATUS
undefined
OVERVOLTAGE
VCC<VOV
VCC>VOV
VCC
INPUTn
LOAD VOLTAGEn
STATUS
OPENLOAD with external pull-up
INPUTn
LOAD VOLTAGEn
VOL
STATUS
tDOL
Tj
TTSD
TR
tDOL
OVERTEMPERATURE
INPUTn
LOAD CURRENTn
STATUS
7/18
1
VNQ690SP
APPLICATION SCHEMATIC
+5V
+5V
VCC
Rprot
STATUS
Dld
Rprot
INPUT1
OUTPUT1
µC
Rprot
INPUT2
OUTPUT2
Rprot
INPUT3
OUTPUT3
INPUT4
OUTPUT4
Rprot
GND
RGND
VGND
DGND
Note: Channels 3 & 4 have the same internal circuit as channel 1 & 2.
GND PROTECTION
REVERSE BATTERY
NETWORK
AGAINST
Solution 1: Resistor in the ground line (RGND only). This
can be used with any type of load.
The following is an indication on how to dimension the
RGND resistor.
1) RGND ≤ 600mV / (IS(on)max).
2) RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can
be found in the absolute maximum rating section of the
device’s datasheet.
Power Dissipation in RGND (when VCC<0: during reverse
battery situations) is:
PD= (-VCC)2/RGND
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
calculated with formula (1) where IS(on)max becomes the
sum of the maximum on-state currents of the different
devices.
Please note that if the microprocessor ground is not
common with the device ground then the RGND will
produce a shift (IS(on)max * RGND) in the input thresholds
and the status output values. This shift will vary
depending on how many devices are ON in the case of
several high side drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor
or several devices have to share the same resistor then
the ST suggests to utilize Solution 2 (see below).
Solution 2: A diode (DGND) in the ground line.
A resistor (RGND=1kΩ) should be inserted in parallel to
DGND if the device will be driving an inductive load.
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
the ground network will produce a shift (j600mV) in the
input threshold and the status output values if the
microprocessor ground is not common with the device
8/18
1
VNQ690SP
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
LOAD DUMP PROTECTION
Dld is necessary (Voltage Transient Suppressor) if the
load dump peak voltage exceeds VCC max DC rating. The
same applies if the device will be subject to transients on
the VCC line that are greater than the ones shown in the
ISO T/R 7637/1 table.
µC I/Os PROTECTION:
The value of these resistors is a compromise between the
leakage current of µC and the current required by the
HSD I/Os (Input levels compatibility) with the latch-up limit
of µC I/Os.
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
5kΩ ≤ Rprot ≤ 65kΩ.
Recommended Rprot value is 10kΩ.
If a ground protection network is used and negative
transient are present on the VCC line, the control pins will
be pulled negative. ST suggests to insert a resistor (Rprot)
in line to prevent the µC I/Os pins to latch-up.
9/18
VNQ690SP
High Level Input Current
Off State Output Current
Iih (µA)
IL(off1) (µA)
3.5
5
3.25
4.5
Vin=3.25V
Vcc=24V
Vout=0V
3
4
3.5
2.75
2.5
3
2.25
2.5
2
2
1.75
1.5
1.5
1
1.25
0.5
0
1
-50
-25
0
25
50
75
100
125
150
-50
175
-25
0
25
Input Clamp Voltage
75
100
125
150
175
Status Leakage Current
Vicl (V)
Ilstat (µA)
8
0.05
7.75
0.045
Iin=1mA
Vstat=5V
7.5
0.04
7.25
0.035
7
0.03
6.75
0.025
6.5
0.02
6.25
0.015
6
0.01
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (ºC)
50
75
100
125
150
175
Tc (ºC)
Status Low Output Voltage
Status Clamp Voltage
Vstat (V)
Vscl (V)
0.8
7.4
7.3
0.7
Istat=1.6mA
Istat=1mA
0.6
7.2
0.5
7.1
0.4
7
0.3
6.9
0.2
6.8
0.1
6.7
0
6.6
-50
-25
0
25
50
75
Tc (ºC)
10/18
50
Tc (ºC)
Tc (ºC)
100
125
150
175
-50
-25
0
25
50
75
Tc (ºC)
100
125
150
175
VNQ690SP
On State Resistance Vs Tcase
On State Resistance Vs VCC
Ron (mOhm)
Ron (mOhm)
160
160
Tc= 150ºC
140
140
Iout=1A
Vcc=9V; 18V & 36V
120
120
Iout=1A
100
100
80
80
60
Tc= 25ºC
60
40
Tc= -40ºC
40
20
20
0
-50
-25
0
25
50
75
100
125
150
0
175
5
10
15
20
25
30
35
40
Vcc (V)
Tc (ºC)
ILIM Vs Tcase
Input High Level
Ilim (A)
Vih (V)
25
4
22.5
3.75
Vcc=13V
20
3.5
17.5
3.25
15
3
12.5
2.75
10
2.5
7.5
2.25
5
2
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (ºC)
50
75
100
125
150
175
100
125
150
175
Tc (ºC)
Input Low Level
Input Hysteresis Voltage
Vil (V)
Vihyst (V)
2.6
1.4
2.4
1.3
1.2
2.2
1.1
2
1
1.8
0.9
1.6
0.8
1.4
0.7
1.2
0.6
1
0.5
-50
-25
0
25
50
75
Tc (ºC)
100
125
150
175
-50
-25
0
25
50
75
Tc (ºC)
11/18
VNQ690SP
Overvoltage Shutdown
Openload Off State Voltage Detection Threshold
Vov (V)
Vol (V)
50
5
4.5
47.5
Vin=0V
4
45
3.5
42.5
3
40
2.5
2
37.5
1.5
35
1
32.5
0.5
30
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
Tc (ºC)
Turn-on Voltage Slope
100
125
150
175
Turn-off Voltage Slope
dVout/dt(on) (V/ms)
dVout/dt(off) (V/ms)
500
600
450
550
Vcc=13V
RI=13Ohm
400
Vcc=13V
RI=13Ohm
500
350
450
300
400
250
350
200
300
150
250
100
200
50
150
0
100
-50
-25
0
25
50
75
Tc (ºC)
12/18
75
Tc (ºC)
100
125
150
175
-50
-25
0
25
50
75
Tc (ºC)
100
125
150
175
VNQ690SP
Maximum turn off current versus load inductance
ILMAX (A)
100
10
A
B
C
1
0.01
0.1
1
L(mH)
10
100
A = Single Pulse at TJstart=150ºC
B= Repetitive pulse at TJstart=100ºC
C= Repetitive Pulse at TJstart=125ºC
Conditions:
VCC=13.5V
Values are generated with RL=0Ω
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
13/18
VNQ690SP
PowerSO-10™ THERMAL DATA
PowerSO-10™ PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm,
Cu thickness=35µm, Copper areas: from minimum pad lay-out to 8cm2).
Rthj-amb Vs PCB copper area in open box free air condition
RTHj_amb (°C/W)
55
Tj-Tamb=50°C
50
45
40
35
30
0
2
4
6
PCB Cu heatsink area (cm^2)
14/18
8
10
VNQ690SP
Thermal Impedance Junction Ambient Single Pulse
ZT H (°C/W)
1000
100
Footprint
6 cm2
10
1
0.1
0.0001
0.001
0.01
0.1
1
T ime (s)
Thermal fitting model of a quad HSD in
PowerSO-16
Tj_1
C1
C2
C3
C4
C5
C6
R1
R2
R3
R4
R5
R6
10
100
1000
Pulse calculation formula
Z THδ = R TH ⋅ δ + ZTHtp ( 1 – δ )
where
δ = tp ⁄ T
Thermal Parameter
Pd1
C13
Tj_2
R13
C14
R14
Pd2
Tj_3
R17
R18
C7
C8
C9
R7
R8
R9
C10
R10
Pd3
Tj_4
C15
R15
C16
R16
Pd4
T_amb
C11
R11
C12
R12
Area/island (cm2)
R1 (°C/W)
R2 (°C/W)
R3 ( °C/W)
R4 (°C/W)
R5 (°C/W)
R6 (°C/W)
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
Footprint
0.18
0.8
0.7
0.8
13
37
0.0006
1.50E-03
1.75E-02
0.4
0.75
3
6
22
5
15/18
VNQ690SP
PowerSO-10™ MECHANICAL DATA
mm.
DIM.
MIN.
A
A (*)
A1
B
B (*)
C
C (*)
D
D1
E
E2
E2 (*)
E4
E4 (*)
e
F
F (*)
H
H (*)
h
L
L (*)
α
α (*)
inch
TYP
3.35
3.4
0.00
0.40
0.37
0.35
0.23
9.40
7.40
9.30
7.20
7.30
5.90
5.90
MAX.
MIN.
3.65
3.6
0.10
0.60
0.53
0.55
0.32
9.60
7.60
9.50
7.60
7.50
6.10
6.30
0.132
0.134
0.000
0.016
0.014
0.013
0.009
0.370
0.291
0.366
0.283
0.287
0.232
0.232
1.35
1.40
14.40
14.35
0.049
0.047
0.543
0.545
1.80
1.10
8º
8º
0.047
0.031
0º
2º
TYP.
1.27
0.050
1.25
1.20
13.80
13.85
0.053
0.055
0.567
0.565
0.50
0.002
1.20
0.80
0º
2º
0.070
0.043
8º
8º
(*) Muar only POA P013P
B
0.10 A B
10
H
E
E2
E4
1
SEATING
PLANE
e
B
DETAIL "A"
A
C
0.25
h
D
= D1 =
=
=
SEATING
PLANE
A
F
A1
A1
L
DETAIL "A"
α
16/18
MAX.
0.144
0.142
0.004
0.024
0.021
0.022
0.0126
0.378
0.300
0.374
300
0.295
0.240
0.248
P095A
VNQ690SP
PowerSO-10™ SUGGESTED PAD LAYOUT
TUBE SHIPMENT (no suffix)
14.6 - 14.9
CASABLANCA
B
10.8- 11
MUAR
C
6.30
C
A
A
0.67 - 0.73
10
9
1
9.5
2
3
B
0.54 - 0.6
All dimensions are in mm.
8
7
4
5
1.27
Base Q.ty Bulk Q.ty Tube length (± 0.5)
6
Casablanca
Muar
50
50
1000
1000
532
532
A
B
C (± 0.1)
10.4 16.4
4.9 17.2
0.8
0.8
TAPE AND REEL SHIPMENT (suffix “13TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
600
600
330
1.5
13
20.2
24.4
60
30.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (± 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
All dimensions are in mm.
24
4
24
1.5
1.5
11.5
6.5
2
End
Start
Top
No components
Components
No components
cover
tape
500mm min
Empty components pockets
saled with cover tape.
500mm min
User direction of feed
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1
VNQ690SP
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of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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