HD74HCT620/HD74HCT623 Octal Bus Transceivers (with inverted 3-state outputs)/ Octal Bus Transceivers (with 3-state outputs) ADE-205-561 (Z) 1st. Edition Sep. 2000 Description This octal transceiver is designed for asynchronous two-way communication between data buses. The control function implementation allows for maximum flexibility in timng. This device allows data transmission from A bus to the B bus or from the B bus to the A bus depending upon the logic levels at the enable inputs (GBA and GAB). The enable inputs can be used to disable the device so that the buses are affectively isolated. The dual-enable configuration gives these devices the capability to store data by simultaneous enabling of GBA and GAB. Each output reinforces its input in this transceiver configuration. Thus, when both control inputs are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (16 in all) will remain at their last states. The 8-bit codes appearing on the two sets of buses will be identical for the HD74HCT623 or complementary for the HD74HCT620. Features • • • • • • LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility High Speed Operation: tpd (Bus to Bus) = 15 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 4.5 to 5.5 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) HD74HCT620/HD74HCT623 Function Table Enable Input Operation GBA GAB HD74HCT620 HD74HCT623 L L B data to A bus B data to A bus H H A data to B bus A data to B bus H L Isolation Isolation L H B data to A bus, A data to B bus B data to A bus, A data to B bus Pin Arrangement Enable GAB 1 20 VCC A1 2 19 Enable GBA A2 3 18 B1 A3 4 17 B2 A4 5 16 B3 A5 6 15 B4 A6 7 14 B5 A7 8 13 B6 A8 9 12 B7 GND 10 11 B8 (Top view) 2 HD74HCT620/HD74HCT623 Block Diagram HD74HCT620 GAB GBA VCC A1 VCC B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8 B8 3 HD74HCT620/HD74HCT623 HD74HCT623 GAB GBA VCC A1 B1 VCC A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8 B8 Absolute Maximum Ratings Item Symbol Rating Unit Supply voltage range VCC –0.5 to +7.0 V Input voltage VIN –0.5 to VCC + 0.5 V Output voltage VOUT –0.5 to VCC + 0.5 V DC current drain per pin I OUT ±35 mA DC current drain per VCC, GND I CC, I GND ±75 mA DC input diode current I IK ±20 mA DC output diode current I OK ±20 mA Power dissipation per package PT 500 mW Storage temperature Tstg –65 to +150 °C 4 HD74HCT620/HD74HCT623 DC Characteristics Ta = –40 to +85°C Ta = 25°C Test Conditions Item Symbol Min Typ Max Min Max Unit VCC (V) Input voltage VIH 2.0 — — — V 4.5 to 5.5 VIL — — 0.8 — 0.8 V 4.5 to 5.5 VOH 4.4 — — 4.4 — V 4.5 Vin = VIH or VIL I OH = –20 µA 4.18 — — 4.13 — 4.5 I OH = –6 mA — — 0.1 — 0.1 — — 0.26 — 0.33 Output voltage VOL 2.0 V 4.5 Vin = VIH or VIL I OL = 20 µA 4.5 I OL = 6 mA Off-state output current I OZ — — ±0.5 — ±5.0 µA 5.5 Vin = VIH or VIL, Vout = VCC or GND Input current Iin — — ±0.1 — ±1.0 µA 5.5 Vin = VCC or GND Quiescent supply current I CC — — 4.0 — 40 µA 5.5 Vin = VCC or GND, Iout = 0 µA AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Ta = –40 to +85°C Ta = 25°C Test Conditions Min Typ Max Min Max Unit VCC (V) Propagation delay t PLH — 13 20 — 25 ns 4.5 time t PHL — 16 20 — 25 Output enable t ZH — 16 30 — 38 time t ZL — 16 30 — 38 Output disable t HZ — 19 30 — 38 time t LZ — 21 30 — 38 Output rise/fall time t TLH t THL — 4 12 — 15 ns 4.5 Input capacitance Cin — 5 10 — 10 pF — Item Symbol 4.5 ns 4.5 4.5 ns 4.5 4.5 5 HD74HCT620/HD74HCT623 Package Dimensions Unit: mm 24.50 25.40 Max 1 7.00 Max 11 6.30 20 10 1.30 2.54 ± 0.25 0.48 ± 0.10 0.51 Min 1.27 Max 7.62 2.54 Min 5.08 Max 0.89 + 0.11 0.25 – 0.05 0° – 15° Hitachi Code JEDEC EIAJ Mass (reference value) DP-20N — Conforms 1.26 g Unit: mm 12.6 13 Max 11 1 10 1.27 *0.42 ± 0.08 0.40 ± 0.06 0.10 ± 0.10 0.80 Max *0.22 ± 0.05 0.20 ± 0.04 2.20 Max 5.5 20 0.20 7.80 +– 0.30 1.15 0° – 8° 0.70 ± 0.20 0.15 0.12 M *Dimension including the plating thickness Base material dimension 6 Hitachi Code JEDEC EIAJ Mass (reference value) FP-20DA — Conforms 0.31 g HD74HCT620/HD74HCT623 Unit: mm 12.8 13.2 Max 11 1 10 0.20 ± 0.10 0.935 Max 1.27 *0.42 ± 0.08 0.40 ± 0.06 *0.27 ± 0.05 0.25 ± 0.04 2.65 Max 7.50 20 0.25 10.40 +– 0.40 1.45 0° – 8° 0.57 0.70 +– 0.30 0.15 0.12 M *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Mass (reference value) FP-20DB Conforms — 0.52 g 7 HD74HCT620/HD74HCT623 Cautions 1. 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Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products. Hitachi, Ltd. Semiconductor & Integrated Circuits. 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