ETC PI74FCT16652ATA

PI74FCT16652/162652T
16-BIT
REGISTERED
TRANSCEIVERS
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PI74FCT16652T
PI74FCT162652T
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Fast CMOS 16-Bit
Registered Transceivers
Product Features
Common Features:
• PI74FCT16652T and PI74FCT162652T are high-speed, low
power devices with high current drive.
• Vcc = 5V ±10%
• Hysteresis on all inputs
• Packages available:
– 56-pin 240 mil wide plastic TSSOP (A)
– 56-pin 300 mil wide plastic SSOP (V)
PI74FCT16652T Features:
• High output drive: IOH = –32 mA; IOL = 64 mA
• Power off disable outputs permit “live insertion”
• Typical VOLP (Output Ground Bounce)
< 1.0V at VCC = 5V, TA = 25°C
PI74FCT162652T Features:
• Balanced output drivers: ±24 mA
• Reduced system switching noise
• Typical VOLP (Output Ground Bounce)
< 0.6V at VCC = 5V, TA = 25°C
Product Description
Pericom Semiconductor's PI74FCT series of logic circuits are produced in the Company’s advanced 0.8 micron CMOS technology,
achieving industry leading speed grades.
The PI74FCT16652T and PI74FCT162652T are 16-bit registered
transceivers organized as two independent 8-bit bus transceivers
designed with 3-State D-type flip-flops and control circuitry arranged
for multiplexed transmission of data directly from the data bus or from
the internal storage registers. Each 8-bit transceiver utilizes the
enable controls (xOEAB and x OEBA) to control the transceiver
functions. The Select (xSAB and xSBA) control pins are used to
select either real-time or stored data transfer. The circuitry used for
select control will eliminate the typical decoding glitch that occurs
in a multiplexer during the transition between real-time and stored
data. A low input level selects real-time data and a high selects stored
data.
The PI74FCT16652T output buffers are designed with a Power-Off
disable allowing “live insertion” of boards when used as backplane
drivers.
The PI74FCT162652T has ±24 mA balanced output drivers. It is
designed with current limiting resistors at its outputs to control the
output edge rate resulting in lower ground bounce and undershoot.
This eliminates the need for external terminating resistors for most
interface applications.
Logic Block Diagram
1OEAB
2OEAB
1OEBA
2OEBA
1CLKBA
2CLKBA
1SBA
2SBA
1CLKAB
2CLKAB
1SAB
2SAB
B REG
B REG
D
D
C
C
1A0
2A0
A REG
A REG
1B0
D
2B0
D
C
C
TO 7 OTHER CHANNELS
TO 7 OTHER CHANNELS
1
PS2079A 01/15/95
PI74FCT16652/162652T
16-BIT
REGISTERED
TRANSCEIVERS
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Truth Table
DATA I/O(2)
Inputs
Function/Operation
Isolation
Store A and B Data
Store A, Hold B
Store A in Both Registers
Hold A, Store B
Store B in Both Registers
Real Time B Data to A Bus
Stored B Data to A Bus
Real Time A Data to B Bus
Stored A Data to B Bus
Stored A Data to B Bus and
Stored B Data to A Bus
1.
2.
xOEAB
L
L
X
H
L
L
L
L
H
H
H
XOEBA
H
H
H
H
X
L
L
L
H
H
L
XCLKAB
XCLKBA
XSAB
XSBA
H or L
↑
↑
↑
H or L
↑
X
X
X
H or L
H or L
H or L
↑
H or L
↑
↑
↑
X
H or L
X
X
H or L
X
X
X
X(2)
X
X
X
X
L
H
H
X
X
X
X
X
X(2)
L
H
X
X
H
XAX
Input
XBX
Input
Input
Unspecified(1)
Input
Output
(1)
Unspecified
Input
Output
Input
Output
Input
Input
Output
Output
Output
The data output functions may be enabled or disabled by various signals at the xOEAB or xOEBA inputs. Data
input functions are always enabled, i.e., data at the bus pins will be stored on every low-to-high transition
on the clock inputs.
Select control = L: clocks can occur simultaneously.
Select control = H: clocks must be staggered in order to load both registers.
H = High Voltage Level; L = Low Voltage Level; X = Don’t Care; ↑ = LOW-to-HIGH transition
Product Pin Description
Product Pin Configuration
1OEAB
1CLKAB
1SAB
GND
1A0
1A1
VCC
1A2
1A3
1A4
GND
1A5
1A6
1A7
2A0
2A1
2A2
GND
2A3
2A4
2A5
VCC
2A6
2A7
GND
2SAB
2CLKAB
2OEAB
1
2
56
55
1OEBA
3
4
54
53
1SBA
5
6
7
52
51
1B0
50
49
48
8
9
10
47
11
46
12 56-PIN 45
V56 44
13
A56
14
43
15
42
16
41
17
40
18
39
19
38
20
37
21
36
22
35
23
34
24
33
25
26
27
28
32
31
30
29
Pin Name
xAx
1CLKBA
xBx
GND
xCLKAB, xCLKBA
SAB, SBA
xOEAB, xOEBA
GND
VCC
1B1
VCC
1B2
1B3
1B4
GND
Description
Data Register A Inputs
Data Register B Outputs
Data Register B Inputs
Data Register A Outputs
Clock Pulse Inputs
Output Data Source Select Inputs
Output Enable Inputs
Ground
Power
1B5
1B6
1B7
2B0
2B1
2B2
GND
2B3
2B4
2B5
VCC
2B6
2B7
GND
2SBA
2CLKBA
2OEBA
2
PS2079A 01/15/95
PI74FCT16652/162652T
16-BIT
REGISTERED
TRANSCEIVERS
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REAL-TIME TRANSFER
BUS A TO B
REAL-TIME TRANSFER
BUS B TO A
BUS
BUS
BUS
BUS
A
B
A
B
xOEAB xOEBA xCLKAB xCLKBA xSAB xSBA
H
H
X
X
L
X
xOEAB xOEBA xCLKAB xCLKBA xSAB xSBA
L
L
X
X
X
L
STORAGE FROM
A AND/OR B
xOEAB
X
L
L
TRANSFER STORES
DATA TO A AND/OR B
BUS
BUS
BUS
BUS
A
B
A
B
xOEBA xCLKAB xCLKBA xSAB xSBA
H
X
X
X
X
X
X
X
H
X
X
xOEAB xOEBA xCLKAB xCLKBA xSAB xSBA
H
L
H or L
H or L
H
H
3
PS2079A 01/15/95
PI74FCT16652/162652T
16-BIT
REGISTERED
TRANSCEIVERS
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Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature .................................................................... –65°C to +150°C
Ambient Temperature with Power Applied ....................................–40°C to +85°C
Supply Voltage to Ground Potential (Inputs & Vcc Only) .............. –0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & D/O Only) ........... –0.5V to +7.0V
DC Input Voltage ............................................................................ –0.5V to +7.0V
DC Output Current ..................................................................................... 120 mA
Power Dissipation ..........................................................................................1.0W
Note:
Stresses greater than those listed under
MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating
only and functional operation of the device at
these or any other conditions above those
indicated in the operational sections of this
specification is not implied. Exposure to
absolute maximum rating conditions for
extended periods may affect reliability.
DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 5.0V ± 10%)
Parameters Description
VIH
VIL
IIH
IIL
IOZH
IOZL
VIK
IOS
IO
VH
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
High Impedance
Output Current
Clamp Diode Voltage
Short Circuit Current
Output Drive Current
Input Hysteresis
Test Conditions(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
VCC = Max.
VCC = Max.
VCC = Max.
VCC = Max.
VCC = Min., IIN = –18 mA
VCC = Max.(3), VOUT = GND
VCC = Max.(3), VOUT = 2.5V
Min.
Typ(2)
2.0
VIN = VCC
VIN = GND
VOUT = 2.7V
VOUT = 0.5V
–80
–50
–0.7
–140
Max.
Units
0.8
1
–1
1
–1
–1.2
–200
–180
V
V
µA
µA
µA
µA
V
mA
mA
mV
Max.
Units
100
PI74FCT16652T Output Drive Characteristics (Over the Operating Range)
Parameters Description
Test Conditions(1)
VOH
Output HIGH Voltage
VCC = Min., VIN = VIH or VIL
VOL
IOFF
Output LOW Voltage
Power Down Disable
VCC = Min., VIN = VIH or VIL
VCC = 0V, VIN or VOUT ≤ 4.5V
IOH = –3.0 mA
IOH = –15.0 mA
IOH = –32.0 mA
IOL = 64 mA
Min.
Typ(2)
2.5
2.4
2.0
—
3.5
3.5
3.0
0.2
—
0.55
±100
V
µA
Min.
Typ(2)
Max.
Units
2.4
3.3
0.3
115
–115
0.55
150
–150
V
V
mA
mA
V
PI74FCT162652T Output Drive Characteristics (Over the Operating Range)
Parameters Description
VOH
VOL
IODL
IODH
Output HIGH Voltage
Output LOW Voltage
Output LOW Current
Output HIGH Current
Test Conditions(1)
VCC = Min., VIN = VIH or VIL
IOH = –24.0 mA
VCC = Min., VIN = VIH or VIL
IOL = 24 mA
VCC = 5V, VIN = VIH OR VIL, VOUT = 1.5V(3)
VCC = 5V, VIN = VIH OR VIL, VOUT = 1.5V(3)
60
–60
Capacitance (TA = 25°C, f = 1 MHz)
Parameters(4)
CIN
COUT
Description
Test Conditions
Typ
Max.
Units
Input Capacitance
Output Capacitance
VIN = 0V
VOUT = 0V
4.5
5.5
6
8
pF
pF
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is determined by device characterization but is not production tested.
4
PS2079A 01/15/95
PI74FCT16652/162652T
16-BIT
REGISTERED
TRANSCEIVERS
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Power Supply Characteristics
Parameters Description
Test Conditions(1)
Min.
Typ(2)
Max.
Units
ICC
Quiescent Power
Supply Current
VCC = Max.
VIN = GND or VCC
0.1
500
µA
∆ICC
Supply Current per
Input @ TTL HIGH
VCC = Max.
VIN = 3.4V(3)
0.5
1.5
mA
ICCD
Supply Current per
Input per MHz(4)
VCC = Max., Outputs Open VIN = VCC
xOEAB = xOEBA = GND VIN = GND
One Bit Toggling
50% Duty Cycle
75
120
µA/
MHz
IC
Total Power Supply
Current(6)
VCC = Max.,
Outputs Open
fCP = 10 MHZ (XCLKBA)
50% Duty Cycle
xOEAB = xOEBA = GND
One Bit Toggling
fI = 5 MHZ
50% Duty Cycle
VIN = VCC
VIN = GND
0.8
1.7(5)
mA
VIN = 3.4V
VIN = GND
1.3
3.2(5)
VCC = Max.,
Outputs Open
fCP = 10 MHZ (XCLKBA)
50% Duty Cycle
xOEAB = xOEBA = GND
16 Bits Toggling
fI = 2.5 MHZ
50% Duty Cycle
VIN = VCC
VIN = GND
3.8
6.5(5)
VIN = 3.4V
VIN = GND
8.3
22.0(5)
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V); all other inputs at Vcc or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.
6. IC =IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fINI)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fI = Input Frequency
NI = Number of Inputs at fI
All currents are in milliamps and all frequencies are in megahertz.
5
PS2079A 01/15/95
PI74FCT16652/162652T
16-BIT
REGISTERED
TRANSCEIVERS
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PI74FCT16652 Switching Characteristics over Operating Range
Parameters
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tPLH
tPHL
tPLH
tPHL
tSU
tH
tW
tSK(o)
Description
Propagation Delay
Bus to Bus
Output Enable Time
XOEAB or X OEBA to Bus
Output Disable Time(3)
XOEAB or X OEBA to Bus
Propagation Delay
Clock to Bus
Propagation Delay
xSBA or xSAB to Bus
Setup Time HIGH or
LOW, BUS to Clock
Hold Time HIGH or
LOW, Bus to Clock
Clock Pulse Width
HIGH or LOW(3)
Output Skew(4)
Conditions
(1)
CL = 50 pF
RL = 500Ω
16652T
16652AT
16652CT
16652DT
Com.
Com.
Com.
Com.
Min
Max
Min
Max
Min
Max
Min
Max
Unit
2.0
9.0
2.0
6.3
1.5
5.4
1.5
4.4
ns
2.0
14.0
2.0
9.8
1.5
7.8
1.5
5.0
ns
2.0
9.0
2.0
6.3
1.5
6.3
1.5
4.3
ns
2.0
9.0
2.0
6.3
1.5
5.7
1.5
4.4
ns
2.0
11.0
2.0
7.7
1.5
6.2
1.5
5.0
ns
4.0
—
2.0
—
2.0
—
2.0
—
ns
2.0
—
1.5
—
1.5
—
1.0
—
ns
6.0
—
5.0
—
5.0
—
3.0
—
ns
—
0.5
—
0.5
—
0.5
—
0.5
ns
PI74FCT162652 Switching Characteristics over Operating Range
Parameters
t PLH
t PHL
t PZH
t PZL
tPHZ
tPLZ
tPLH
tPHL
tPLH
tPHL
tSU
tH
tW
tSK(o)
Description
Propagation Delay
Bus to Bus
Output Enable Time
XOEAB or X OEBA to Bus
Output Disable Time(3)
XOEAB or X OEBA to Bus
Propagation Delay
Clock to Bus
Propagation Delay
xSBA or xSAB to Bus
Setup Time HIGH or
LOW, BUS to Clock
Hold Time HIGH or
LOW, Bus to Clock
Clock Pulse Width
HIGH or LOW(3)
Output Skew(4)
162652T
162652AT
162652CT
162652DT
Com.
Com.
Com.
Com.
Conditions
Min
Max
Min
Max
Min
Max
Min
Max
Unit
CL = 50 pF
RL = 500Ω
2.0
9.0
2.0
6.3
1.5
5.4
1.5
4.4
ns
2.0
14.0
2.0
9.8
1.5
7.8
1.5
5.0
ns
2.0
9.0
2.0
6.3
1.5
6.3
1.5
4.3
ns
2.0
9.0
2.0
6.3
1.5
5.7
1.5
4.4
ns
2.0
11.0
2.0
7.7
1.5
6.2
1.5
5.0
ns
4.0
—
2.0
—
2.0
—
2.0
—
ns
2.0
—
1.5
—
1.5
—
1.0
—
ns
6.0
—
5.0
—
5.0
—
3.0
—
ns
—
0.5
—
0.5
—
0.5
—
0.5
ns
(1)
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This limit is guaranteed but not production tested.
4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
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PS2079A 01/15/95