ETC TS3V3702IPT

TS3V3702
3V MICROPOWER DUAL CMOS VOLTAGE COMPARATORS
■ DEDICATED TO 3.3V OR BATTERY SUPPLY
(specified at 3V and 5V)
■ PUSH-PULL CMOS OUTPUT (NO EXTER
NAL PULL-UP RESISTOR REQUIRED)
■ EXTREMELY LOW SUPPLY CURRENT :
7µA typ / comparator
N
DIP8
(Plastic Package)
■ WIDE SINGLE SUPPLY RANGE
2.7V TO 16V
■ EXTREMELY LOW INPUT CURRENTS :
1pA typ
■ INPUT COMMON-MODE VOLTAGE RANGE
INCLUDES GND
■ FAST RESPONSE TIME : 2µs typ for
D
SO8
(Plastic Micropackage)
5mV overdrive
■ PIN-TO-PIN AND FUNCTIONALLY
COMPATIBLE WITH BIPOLAR LM393
DESCRIPTION
The TS3V3702 is a micropower dual CMOS voltage comparator with extremely low consumption
of 7µA typ / comparator (20 times less than bipolar LM393). The push-pull CMOS output stage allows power and space saving by eliminating the
external pull-up resistor required by usual
open-collector output comparators.
P
TSSOP8
(Thin Shrink Small Outline Package)
PIN CONNECTIONS (top view)
Thus response times remain similar to the LM393.
ORDER CODE
Part
Number
TS3V3702I
Temperature
Range
-40°C, +125°C
Package
N
•
D
•
Output 1
1
Inverting Input 1
2
-
Non-invertingInput 1
3
+
-
4
P
•
VCC
8
V CC +
7
Output 2
-
6
Inverting Input 2
+
5
Non-inverting Input 2
N = Dual in Line Package (DIP)
D = Small Outline Package (SO) - also available in Tape & Reel (DT)
P = Thin Shrink Small Outline Package (TSSOP) - only available
in Tape & Reel (PT)
January 2002
1/7
TS3V3702
SCHEMATIC DIAGRAM (for 1/2 TS3V3702)
VCC +
T10
T1
T2
T9
T17
R1
T12
T11
Input -
T3
T 18
T21
Input +
T4
Output
T13
T8
T 19
T5
T14
T7
T15
T20
T16
T6
V CC -
ABSOLUTE MAXIMUM RATINGS
Symbol
+
VCC
Supply Voltage 1)
Value
Unit
18
V
±18
V
Vi
Input Voltage
3)
18
V
Vo
Output Voltage
18
V
Io
Output Current
20
mA
IF
Forward Current in ESD Protection Diodes on Input 4)
50
mA
1250
710
625
mW
-65 to +150
°C
Vid
pd
Tstg
1.
2.
3.
4.
Parameter
Differential Input Voltage
2)
Power Dissipation 5)
DIP8
SO8
TSSOP8
Storage Temperature Range
All voltage values, except differential voltage, are with respect to network ground terminal.
Differential voltages are the non-inverting input terminal with respect to the inverting input terminal.
The magnitude of the input and the output voltages must never exceed the magnitude of the possitive supply voltage.
Guaranteed by design.
5.
Pd is calculated with T amb = +25°C, Tj = +150°C and R thja = 100°C/W for DIP8 package
= 175°C/W for SO8 package
= 200°C/W for TSSOP8 package
OPERATING CONDITIONS
Symbol
Parameter
VCC+
Supply Voltage
Vicm
Common Mode Input Voltage Range
Toper
Operating Free-Air Temperature range
2/7
Value
2.7 to 16
+ -1.5
0 to VCC
TS3V3702I
-40 to +125
Unit
V
V
°C
TS3V3702
ELECTRICAL CHARACTERISTICS
VCC+ = 3V, Vcc- = 0V, Tamb = 25°C (unless otherwise specified)
Symbol
Parameter
Min.
Typ.
Vio
Input Offset Voltage 1)
V ic = 1.5V
T min. ≤ Tamb ≤ Tmax.
Iio
Input Offset Voltage 2)
V ic = 1.5V
T min. ≤ Tamb ≤ Tmax.
1
Input Bias Current (see note 2)
V ic = 1.5V
T min. ≤ Tamb ≤ Tmax.
1
Iib
Common-mode Rejection Ratio
V ic = Vicm min.
80
SVR
Supply Voltage Rejection Ratio
V CC+ = 3V to 5V
75
VOH
High Level Output Voltage
V id = 1V, IOH = -4mA
T min. ≤ Tamb ≤ Tmax.
V OL
Low Level Output Voltage
V id = -1V, IOL = 4mA
T min. ≤ Tamb ≤ Tmax.
ICC
Supply Current (each comparator)
No load - Outputs low
T min. ≤ Tamb ≤ Tmax.
Response Time High to Low
V ic = 0V, f = 10kHz, CL = 50pF,
mV
pA
pA
VCC+-1.2
CMR
tPHL
5
6.5
600
Input Common Mode Voltage Range
T min. ≤ Tamb ≤ Tmax
Response Time Low to High
V ic = 0V, f = 10kHz, CL = 50pF,
Unit
300
Vicm
tPLH
Max.
0
0
2
1.8
VCC+ -1.5
V
dB
dB
2.4
V
300
400
450
mV
7
20
25
µA
Overdrive = 5mV
TTL Input
1.5
0.7
µs
Overdrive = 5mV
TTL Input
2.2
0.15
µs
1. The specified offset voltage is the maximun value required to drive the output up to 4.5V or down to 0.3V.
2. Maximum values including unavoidable inaccuracies of the industrial test.
3/7
TS3V3702
ELECTRICAL CHARACTERISTICS
VCC+ = 5V, Vcc- = 0V, Tamb = 25°C (unless otherwise specified)
Symbol
Parameter
Min.
Typ.
Max.
Unit
5
6.5
mV
Vio
Input Offset Voltage 1)
V ic = 2.5V
T min. ≤ Tamb ≤ Tmax.
1.2
Iio
Input Offset Voltage 2)
V ic = 2.5V
T min. ≤ Tamb ≤ Tmax.
1
Input Bias Current (see note 2)
V ic = 2.5V
T min. ≤ Tamb ≤ Tmax.
1
Iib
VCC+-1.2
Input Common Mode Voltage Range
T min. ≤ Tamb ≤ Tmax
CMR
Common-mode Rejection Ratio
V ic = Vicm min.
82
SVR
Supply Voltage Rejection Ratio
V CC+ = +5V to +10V
90
VOH
High Level Output Voltage
V id = 1V, IOH = -4mA
T min. ≤ Tamb ≤ Tmax.
V OL
Low Level Output Voltage
V id = -1V, IOL = 4mA
T min. ≤ Tamb ≤ Tmax.
ICC
Supply Current (each comparator)
No load - Outputs low
T min. ≤ Tamb ≤ Tmax.
tPLH
Response Time High to Low
V ic = 0V, f = 10kHz, CL = 50pF,
tPHL
tf
0
0
VCC+ -1.5
4.5
4.3
V
dB
dB
4.7
V
200
300
375
mV
9
20
25
µA
Overdrive
Overdrive
Overdrive
Overdrive
TTL Input
= 5mV
= 10mV
= 20mV
= 40mV
1.5
1.1
0.9
0.7
0.6
Overdrive
Overdrive
Overdrive
Overdrive
TTL Input
= 5mV
= 10mV
= 20mV
= 40mV
2.2
1.6
1.1
0.75
0.17
Fall time
f = 10kHz, CL = 50pF, Overdrive 50mV
1. The specified offset voltage is the maximun value required to drive the output up to 4.5V or down to 0.3V.
2. Maximum values including unavoidable inaccuracies of the industrial test.
4/7
pA
600
Vicm
Response Time Low to High
V ic = 0V, f = 10kHz, CL = 50pF,
pA
300
30
µs
µs
ns
TS3V3702
PACKAGE MECHANICAL DATA
8 PINS - PLASTIC DIP
Millimeters
Inches
Dimensions
Min.
A
a1
B
b
b1
D
E
e
e3
e4
F
i
L
Z
Typ.
Max.
Min.
3.32
0.51
1.15
0.356
0.204
0.020
0.045
0.014
0.008
0.065
0.022
0.012
0.430
0.384
0.313
2.54
7.62
7.62
3.18
Max.
0.131
1.65
0.55
0.304
10.92
9.75
7.95
Typ.
0.100
0.300
0.300
6.6
5.08
3.81
1.52
0.125
0260
0.200
0.150
0.060
5/7
TS3V3702
PACKAGE MECHANICAL DATA
8 PINS - PLASTIC MICROPACKAGE (SO)
s
b1
b
a1
A
a2
C
c1
a3
L
E
e3
D
M
5
1
4
F
8
Millimeters
Inches
Dimensions
Min.
A
a1
a2
a3
b
b1
C
c1
D
E
e
e3
F
L
M
S
6/7
Typ.
Max.
0.65
0.35
0.19
0.25
1.75
0.25
1.65
0.85
0.48
0.25
0.5
4.8
5.8
5.0
6.2
0.1
Min.
Typ.
Max.
0.026
0.014
0.007
0.010
0.069
0.010
0.065
0.033
0.019
0.010
0.020
0.189
0.228
0.197
0.244
0.004
45° (typ.)
1.27
3.81
3.8
0.4
0.050
0.150
4.0
1.27
0.150
0.016
0.6
0.157
0.050
0.024
8° (max.)
TS3V3702
PACKAGE MECHANICAL DATA
8 PINS - THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP)
k
c
0.25mm
.010 inch
GAGE PLANE
L1
L
L
L1
C
SEATING
PLANE
E1
A
E
A2
A1
5
4
4
5
D
b
e
8
1
8
1
PIN 1 IDENTIFICATION
Millimeters
Inches
Dimensions
Min.
A
A1
A2
b
c
D
E
E1
e
k
l
L
L1
0.05
0.80
0.19
0.09
2.90
4.30
0°
0.50
0.45
Typ.
1.00
3.00
6.40
4.40
0.65
0.60
0.600
1.000
Max.
Min.
1.20
0.15
1.05
0.30
0.20
3.10
0.01
0.031
0.007
0.003
0.114
4.50
0.169
8°
0.75
0.75
0°
0.09
0.018
Typ.
0.039
0.118
0.252
0.173
0.025
0.0236
0.024
0.039
Max.
0.05
0.006
0.041
0.15
0.012
0.122
0.177
8°
0.030
0.030
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibil ity for the
consequences of use of such information nor for any infring ement of patents or other righ ts of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change witho ut notice. This publ ication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life suppo rt devices or
systems withou t express written approval of STMicroelectronics.
 The ST logo is a registered trademark of STMicroelectronics
 2002 STMicroelectronics - Printed in Italy - All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia
Malta - Morocco - Singapore - Spain - Sweden - Swit zerland - United Kingdom - United States
 http://www. st.com
7/7