Revised September 2000 29F52 • 29F53 8-Bit Registered Transceiver General Description Features The 29F52 and 29F53 are 8-bit registered transceivers. Two 8-bit back to back registers store data flowing in both directions between two bidirectional buses. Separate clock, clock enable and 3-STATE output enable signals are provided for each register. The A0–A7 output pins are guaranteed to sink 24 mA while the B0–B7 output pins are designed for 64 mA. ■ 8-bit registered transceivers ■ Separate clock, clock enable and 3-STATE output enable provided for each register ■ AMD Am2952/2953 functional equivalents ■ Both inverting and non-inverting options available ■ 24-Pin slimline package The 29F53 is an inverting option of the 29F52. Both transceivers are AMD Am2952/2953 functional equivalents. Ordering Code: Order Number Package Number Package Description 29F52SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 29F52SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide 29F53SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols 29F52 29F53 IEEE/IEC IEEE/IEC 29F52 29F53 © 2000 Fairchild Semiconductor Corporation DS009606 www.fairchildsemi.com 29F52 • 29F53 8-Bit Registered Transceiver April 1988 29F52 • 29F53 Connection Diagrams Pin Assignment for DIP and SOIC 29F52 Pin Assignment for DIP 29F53 Unit Loading/Fan Out Pin Names A0–A7 Description A-Register Inputs/ B-Register 3-STATE Outputs B0–B7 B Register Inputs/ A-Register 3-STATE Outputs H Input IIH/IIL HIGH/LOW Output IOH/IOL 3.5/1.083 70 µA/0.65 mA 150/40 (33.3) −3 mA/24 mA (20 mA) 3.5/1.083 70 µA/0.65 mA 600/106.6 (80) −12 mA/64 mA (48 mA) 20 µA/−0.6 mA OEA Output Enable A-Register 1.0/1.0 CPA A-Register Clock 1.0/1.0 20 µA/−0.6 mA CEA A-Register Clock Enable 1.0/1.0 20 µA/−0.6 mA OEB Output Enable B-Register 1.0/1.0 20 µA/−0.6 mA CPB B-Register Clock 1.0/1.0 20 µA/−0.6 mA CEB B-Register Clock Enable 1.0/1.0 20 µA/−0.6 mA Output Control OE U.L. Internal Y-Output Q 29F52 29F53 X Z Z L L L H L H H L Register Function Table (Applies to A or B Register) Function Inputs Disable Outputs D Enable Outputs H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = HIGH Impedance N = LOW-to-HIGH Transition NC = No Change www.fairchildsemi.com 2 Internal CP CE Q X X H NC L N L L H N L H Function Hold Data Load Data 29F52 • 29F53 Block Diagrams 29F52 3 www.fairchildsemi.com 29F52 • 29F53 Block Diagrams (Continued) Block Diagrams (continued) 29F53 www.fairchildsemi.com 4 Recommended Operating Conditions Storage Temperature −65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Free Air Ambient Temperature Junction Temperature under Bias −55°C to +150°C Supply Voltage 0°C to +70°C +4.5V to +5.5V −0.5V to +7.0V VCC Pin Potential to Ground Pin Input Voltage (Note 2) −0.5V to +7.0V Input Current (Note 2) −30 mA to +5.0 mA Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output −0.5V to VCC 3-STATE Output −0.5V to +5.5V Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. Current Applied to Output in LOW State (Max) twice the rated IOL (mA) DC Electrical Characteristics Symbol Parameter Min Typ Max Input HIGH Voltage VIL Input LOW Voltage 0.8 V VCD Input Clamp Diode Voltage −1.2 V VOH VOL 2.0 Units VIH Output HIGH 10% VCC 2.5 Voltage 10% VCC 2.4 10% VCC 2.0 5% VCC 2.7 5% VCC 2.7 10% VCC 0.55 Breakdown Test IBVIT Input HIGH Current Breakdown Test (I/O) IIL Input LOW Current IIH + IOZH Output Leakage Current IIL + IOZL Output Leakage Current IOS Output Short-Circuit Current ICEX Output HIGH Leakage Current IZZ Bus Drainage Test ICCH Power Supply Current ICCL ICCZ Min IOH = −15 mA (Bn) IOH = −3 mA (An, Bn) Voltage Input HIGH Current IIN = −18 mA (Non I/O Pins) IOH = −1 mA (An) 0.5 IBVI Recognized as a LOW Signal Min IOH = −3 mA (An, Bn) V 10% VCC Input HIGH Current Conditions Recognized as a HIGH Signal IOH = −1 mA (An) Output LOW IIH VCC V IOL = 24 mA (A n) V Min 20 µA Max VIN = 2.7V (Non-I/O Pins) 100 µA Max VIN = 7.0V (Non-I/O Pins) 1.0 mA Max VIN = 5.5V (An, Bn) −0.6 mA Max VIN = 0.5V (Non-I/O Pins) 70 µA Max VOUT = 2.7V (An, Bn) IOL = 64 mA (B n) −650 µA Max VOUT = 0.5V (An, Bn) −60 −150 mA Max VOUT = 0V (An) −100 −225 µA Max VOUT = VCC (An, Bn) 250 VOUT = 0V (Bn) 500 µA 0.0V VOUT = 5.25V (An, B n) 190 mA Max VO = HIGH Power Supply Current 190 mA Max VO = LOW Power Supply Current 190 mA Max VO = HIGH Z 130 5 www.fairchildsemi.com 29F52 • 29F53 Absolute Maximum Ratings(Note 1) 29F52 • 29F53 AC Electrical Characteristics Symbol Parameter TA = +25°C TA = −55°C to +125°C TA = 0°C to +70°C VCC = +5.0V VCC = +5.0V VCC = +5.0V CL = 50 pF CL = 50 pF CL = 50 pF Min Typ Max tPLH Propagation Delay 3.0 5.5 7.5 Min Max Min 2.5 8.5 tPHL CPA or CPB to An or Bn 4.0 7.0 9.0 3.5 10.0 Units Max tPZH Output Enable Time 2.5 5.5 7.5 2.0 8.5 tPZL OEA or OEB to An or Bn 3.5 7.0 9.5 3.0 10.5 tPHZ Output Disable Time 2.5 6.5 9.0 2.0 10.0 tPLZ OEA or OEB to An or Bn 2.5 5.5 7.5 2.0 8.5 ns ns ns AC Operating Requirements Symbol Parameter TA = +25°C TA = −55°C to +125°C VCC = +5.0V VCC = +5.0V Min Max Min Max TA = 0°C to +70°C VCC = +5.0V Min tS(H) Setup Time, HIGH or LOW 4.0 4.5 tS(L) An or Bn to CPA or CPB 4.0 4.5 tH(H) Hold Time, HIGH or LOW 2.0 2.5 tH(L) An or Bn to CPA or CPB 2.0 2.5 tS(H) Setup Time, HIGH or LOW 1.0 1.5 tS(L) CEA or CEB to CPA or CPB 4.0 4.5 tH(H) Hold Time, HIGH or LOW 2.0 2.5 tH(L) CEA or CEB to CPA or CPB 2.0 2.5 tW(H) Pulse Width, HIGH or LOW 3.0 3.5 tW(L) CPA or CPB 3.0 3.5 www.fairchildsemi.com 6 Units Max ns ns ns ns ns 29F52 • 29F53 Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M24B 7 www.fairchildsemi.com 29F52 • 29F53 8-Bit Registered Transceiver Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N24C Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 8