ADC001 Delta Sigma A/D Converter • 14 bits resolution at 70 ksps (OSR=64) • Third order, single bit quantizer architecture in C5 (0.5µ) process • Differential input and reference reduce common mode effects • 20mW input power at 5V • External voltage reference and decimation filter required 1.0 Description A third-order, one-bit, Delta-Sigma modulator realized as a 2-1 cascade in the C5 process. The input and reference signals are implemented differentially. Total input power is about 20mW at 5V. Integrators are correlated double sampled for low offset and flicker noise. Reset switches are included for incremental ADC operation, in which the integrating capacitors are reset after a number of samples equal to the Oversampling Ratio (OSR) have been accumulated. 2.0 Key Performance Features Key Performance Features Value Voltage supply 5Volts+/-10% Operating current 4 mA max Voltage reference span (Vref) +/- 1V Input range +/- 65% of Vref Max clock rate 5Mhz SINAD 80dB Maximum resolution (at OSR=64)* 14 bits *Requires external decimation filter 3.0 Block Diagram SC Integrator A ∫ 1 – 1 Reset Control SC Integrator ∫ 1/2 – Reset 1 bit A/D + D – +Vref Reset 1/2 1 bit D/A 1/4 SC Integrator – -Vref 1 bit A/D + ∫ – D – +Vref Reset 4 Digital Differentiators – D – D 1/2 1 bit D/A Implemented in decimation filter (not incremental mode) -Vref AMI Semiconductor www.amis.com ADC001 Delta Sigma A/D Converter 4.0 Application Notes For normal Delta Sigma operation, the required external digital decimation filter is typically a 4th order CIC followed by a low delay FIR to correct for the sinx/x behavior of the CIC filter and to provide additional noise shaping. The CIC filter requires approximately 2500 digital gates to implement. The size of the FIR filter varies depending on the OSR and amount of attenuation required, but typical gate counts are 2500 to 6000 gates. In incremental mode, the digital filtering is much simpler, and is basically a repeat of the modulator in the digital domain (three integrators). The estimated size of such a filter is approximately 1000 gates. There are two disadvantages of using the modulator in Incremental mode as opposed to Delta-Sigma mode: 1. The SNR that can be achieved for a given OSR with the Incremental is less than what can be achieved with the same OSR in Delta-Sigma mode 2. The Incremental converter is more sensitive to errors that occur shortly after the integrator reset than it is to errors that occur just before the integrator reset. In a Delta-Sigma, the sensitivity to errors is uniform because the integrators are not reset. AMI Semiconductor www.amis.com © 2002 AMI Semiconductor, Inc. AMI Semiconductor makes no warranty for the use of its products, other than those expressly contained in the company’s standard warranty contained in AMI Semiconductor’s Terms and Conditions. The company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of AMI Semiconductor are granted by the company in connection with the sale of AMI Semiconductor products, expressly or by implication.