N Comlinear CLC423 94MHz, Single Supply Voltage Feedback Op Amp General Description Features The Comlinear CLC423 is a wideband voltage-feedback operational amplifier that is uniquely designed to provide high performance from a single power supply. The CLC423 provides near rail-to-rail operation and the common-mode input range includes the negative rail. The CLC423 offers plenty of headroom for single-supply applications as evidenced by its 4.3Vpp output voltage from a single 5V supply. ■ Fabricated with a high-speed complementary bipolar process, the CLC423 delivers a wide 94MHz unity-gain bandwidth, 7.5ns rise/fall time and 150V/µs slew rate. For single supply applications such as video distribution or desktop multimedia, the CLC423 offers low 0.35%, 0.55° differential gain and phase errors. ■ ■ ■ ■ ■ ■ Single +5V supply Input includes VEE 94MHz unity-gain bandwidth -74/-94dBc HD2/HD3 60mA output current 7.5ns rise/fall time (1Vpp) 46ns settling time to 0.1% Applications ■ ■ ■ ■ ■ ■ With its traditional voltage-feedback architecture and high-speed performance, the CLC423 is the perfect choice for composite signal conditioning circuit functions such as active filters, integrators, differentiators, simple gain blocks and buffering. Magnitude (1dB/div) ■ The CLC423 provides high signal fidelity with -74/-94dBc 2nd/3rd harmonics (1Vpp, 1MHz, RL=150Ω). Combining this high fidelity performance with CLC423’s quick 46ns settling time to 0.1% makes it an excellent choice for ADC buffering. Video ADC driver Desktop multimedia Single supply cable driver Instrumentation Video cards Wireless IF amplifiers Telecommunications Frequency Response vs. Vout Av = +2V/V 1Vpp Comlinear CLC423 94MHz, Single Supply Voltage Feedback Op Amp August 1996 2Vpp 4Vpp 1 10 100 Frequency (MHz) Single Supply Response Typical Application VCC Single +5V Supply operation 0.1µF 6.8µF + + Vo CLC423 - Output Voltage (V) 4 +5V Vin 5 VEE 3 2 1 0 Time (100ns/div) 150Ω 50Ω Pinout 250Ω DIP & SOIC 250Ω NOTE: Vin = 0.15V to 2.3V © 1996 National Semiconductor Corporation Printed in the U.S.A. VEE http://www.national.com Electrical Characteristics PARAMETERS (Vs = +5V1, Vcm = +2.5V, Av = +2, Rf = 250W, RL = 150W to GND; unless specified) CONDITIONS CLC423AJ TYP 25° 25° MIN/MAX RATINGS 0° to +70° -40° to +85° UNITS NOTES B FREQUENCY DOMAIN RESPONSE -3dB bandwidth Vo < 1.0Vpp -3dB bandwidth Vo < 3.0Vpp -3dB bandwidth AV = +1V/V Vo < 1.0Vpp rolloff <10MHz peaking DC to 200MHz linear phase deviation <15MHz differential gain NTSC, RL=150Ω differential phase NTSC, RL=150Ω 48 26 94 0.1 0 0.3 0.35 0.55 32 16 28 14 27 11 0.5 0.5 0.6 0.7 2 0.7 0.7 0.8 – – 0.8 0.8 0.9 – – MHz MHz MHz dB dB deg % deg TIME DOMAIN RESPONSE rise and fall time settling time to 0.1% overshoot slew rate AV = +2 7.5 46 5 150 13 70 13 90 14 – – 83 16 – – 65 ns ns % V/µs 74 62 94 75 – 55 – 65 – 52 – 63 – 52 – 62 -dBc -dBc -dBc -dBc 10 4 12.5 5 13.6 5.5 14 5.7 nV/√Hz pA/√Hz 2 4 17 80 0.2 10 82 82 7 7 – 30 – 5 – 65 55 8.5 8 22 36 145 6 22 64 53 8.5 10 35 45 175 7.5 27 60 50 8.5 mV µV/˚C µA nA/˚C µA nA/˚C dB dB mA 1 700 0.07 3.7 0 4.5 0.35 4.8 0.45 60 36 2 500 0.15 3.45 0 4.35 0.5 4.6 0.65 50 20 7 4 2 450 0.24 3.25 0 4.3 0.5 4.55 0.7 40 16 7 4 2 360 0.7 3.15 0 4.2 0.55 4.45 0.75 34 10 7 4 pF kΩ Ω V V V V V V mA mA V V 1V step 1V step 1V step 2V step DISTORTION AND NOISE RESPONSE 1Vpp, 1MHz 2nd harmonic distortion 1Vpp, 5MHz 3rd harmonic distortion 1Vpp, 1MHz 1Vpp, 5MHz equivalent input noise voltage >1MHz current >1MHz STATIC DC PERFORMANCE input offset voltage average drift input bias current average drift input offset current average drift power supply rejection ratio common-mode rejection ratio supply current DC DC no load MISCELLANEOUS PERFORMANCE input capacitance input resistance output impedance @DC input voltage range, high input voltage range, low output voltage range, high RL = 150Ω output voltage range, low RL = 150Ω output voltage range, high no load output voltage range, low no load output current source output current sink supply voltage, maximum supply voltage, minimum B B 2 2 B B A A B A 1 1 Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. Absolute Maximum Ratings supply voltage (Vs) Iout is short circuit protected to ground common-mode input voltage maximum junction temperature storage temperature range lead temperature (soldering 10 sec) differential input voltage EDS tolerance (Note 3) http://www.national.com Notes A) J-level: spec is 100% tested at 25°C, sample tested at 85°C. B) J-level: spec is sample tested at 25°C. 1) Vs = VCC – VEE. 2) Tested with RL tied to +2.5V. 3) Human body model, 1.5kΩ in series with 100pF. +7V VEE to VCC +175˚C -65˚C to +150˚C +260˚C ±2V 4000V Reliability Information transistor count MTBF 2 62 823Mhr Typical Performance Characteristics (Vs = +5V1, Vcm = +2.5V, Av = +2, Rf = 250 W, Inverting Frequency Response Non-Inverting Frequency Response RL = 150W to GND; unless specified) Frequency Response vs. RL 225 0 Av = 10 -45 Av = 2 -90 Av = 4 -135 10 Av = -1 Av = -10 Av = -1 Av = -5 90 45 0 -225 -45 1 100 10 1 100 1k -40 60 40 20 -80 0 -100 -20 0.001 100 -120 0.01 0.1 -80 3rd RL = 1kΩ 3rd RL = 150Ω 1 10 100 Frequency (MHz) 3rd Harmonic Distortion vs. Vout -30 RL = 150Ω -40 10MHz -50 5MHz -40 2MHz -60 -70 1MHz -80 0.1MHz -50 Distortion (dBc) Distortion (dBc) 2nd RL = 1kΩ -60 Phase RL = 150Ω -60 10MHz 5MHz -60 2MHz -70 -80 1MHz -90 0.1MHz -90 -100 0.1 -20 Gain -30 -90 0 Frequency (MHz) 2nd RL = 150Ω 100 80 2nd Harmonic Distortion vs. Vout -50 -70 10 Open Loop Gain & Phase 10 Frequency (MHz) Harmonic Distortion vs. Frequency -135 100 CL = 10pF Rs = 249Ω 250Ω 250Ω 10 -90 Frequency (MHz) Rs Vo = 1Vpp Vo = 1Vpp -45 RL = 150Ω -225 CL = 1000pF Rs = 22Ω CL 0 RL = 75Ω 0 100 CL = 100pF Rs = 54.9Ω Magnitude (1dB/div) Vo = 2Vpp 45 -180 Frequency Response vs. CL Vo = 4Vpp 135 90 RL = 75Ω RL = 1kΩ Frequency (MHz) Vo = 0.25Vpp 180 Phase (deg) Magnitude (1dB/div) 135 -180 Frequency Response vs. Vout Distortion (dBc) 180 Av = -2 Av = -10 Frequency (MHz) 1 Av = -2 Open Loop Gain (dB) 1 Magnitude (1dB/div) Av = 10 Av = -5 RL = 1kΩ RL = 150Ω Phase (deg) Av = 1 Vo = 0.25Vpp Phase (deg) Phase (deg) Magnitude (1dB/div) Av = 1 Rf = 0 Av = 2 Av = 4 Vo = 0.25Vpp Magnitude (1dB/div) Vo = 0.25Vpp 1 -100 0 10 1 2 3 4 0 Output Amplitude (Vpp) Frequency (MHz) Small Signal Pulse Response 1 2 3 4 Output Amplitude (Vpp) Large Signal Pulse Response Equivalent Input Noise 100 Voltage Noise (nV/Hz) Output Voltage (0.5V/div) Time (20ns/div) Voltage = 9.5nV/√Hz 10 Current = 3.2pA/√Hz 1 0.001 Time (20ns/div) 10 Current Noise (pA/Hz) Output Voltage (0.05V/div) 100 1 0.01 1 0.1 10 Frequency (MHz) Differential Gain and Phase (3.58MHz) IB, VIO, vs. Temperature -10 1.7 PSRR, CMRR & Linear Rout vs. Frequency 2.5 2.5 25 100 -12 VIO -16 0.9 -18 0.7 -20 Gain (%) 1.1 IB (µA) IB Phase Neg Sync 1.5 1.5 1 1 Gain Neg Sync 0.5 0.5 Phase (deg) -14 1.3 VIO (mV) 2 2 80 20 CMRR 15 60 PSRR 40 10 5 20 Output Resistance (Ω) 1.5 PSRR, CMRR (dB) RL tied to +2.5V Rout -22 0.5 -40 -20 0 20 40 Temperature (°C) 60 80 0 0 1 2 3 Number of 150Ω Loads 3 4 0 0.001 0 0.01 0.1 1 10 Frequency (MHz) http://www.national.com CLC423 OPERATIONS Description The CLC423 is a voltage feedback amplifier designed for single supply operation. The CLC423 is a single version of the CLC427 with the following features: ■ ■ ■ ■ ■ +5V 6.8µF + 3 Operates from a single +5V supply Maintains near rail-to-rail performance Includes the negative rail (0V) in the Common Mode Input Range (CMIR) Offers low -74/-94dBc 2nd and 3rd harmonic distortion Provides BW > 20MHz and 1MHz distortion < -50dBc at Vo = 4Vpp Rb 2 + 0.1µF - 4 Vo 6 CLC423 Rg Vin 7 Rf Rt R Vo =− f Vin Rg Select R t to yield desired Rin = R t || R g Figure 2: Inverting Configuration Single Supply Operation (VCC = +5V, VEE = GND) The CLC423 is designed to operate from 0 and 5V supplies. The specifications given in the Electrical Characteristics table are measured with a common mode voltage (Vcm) of 2.5V. Vcm is the voltage around which the inputs are applied and the output voltages are specified. AC Coupled Single Supply Operation Figures 3 and 4 show possible non-inverting and inverting configurations for input signals that go below ground. The input is AC coupled to prevent the need for level shifting the input signal at the source. The resistive voltage divider biases the non-inverting input to VCC ÷ 2 = 2.5V. Operating from a single +5V supply, the CMIR of the CLC423 is typically 0V to +3.7V. The typical output range with RL = 150Ω is +0.35V to +4.5V. +5V 6.8µF + For DC coupled single supply operation, it is recommended that input signal levels remain above ground. For input signals that drop below ground, AC coupling and level shifting the signal are possible remedies. For input signals that remain above ground, no adjustments need to be made. The non-inverting and inverting configurations for both input conditions are illustrated in the following 2 sections. Vin R Cc 3 2.5V R 2 + 7 0.1µF - 4 Rf Rg C R Vo = Vin 1+ f + 2.5 Rg R gC >> RC c 1 R low frequency cutoff = , where: Rin = 2πRinC c 2 DC Coupled Single Supply Operation Figures 1 and 2 show the recommended non-inverting and inverting configurations for purely positive input signals. R >> R source Figure 3: AC Coupled Non-inverting Configuration +5V +5V 6.8µF 6.8µF + + 2.5V Vin 3 Rt 2 + 7 4 6 Vo Vin 3 Cc Rg 2 + 7 0.1µF CLC423 - 4 6 Vo Rf R Rf R Vo = Vin − f + 2.5 Rg Rg R Vo = 1+ f Vin Rg low frequency cutoff = Figure 1: Non-inverting Configuration http://www.national.com R 0.1µF CLC423 - Vo 6 CLC423 1 2πR gC c Figure 4: AC Coupled Inverting Configuration 4 Load Termination Since the CLC423 design has been optimized for Single Supply Operation, it is more capable of sourcing rather than sinking current. For optimum performance, the load should be tied to VEE. When the load is tied to VEE, the output always sources current. Non-inverting gain applications: ■ ■ ■ Output Overdrive Recovery When the output range of an amplifier is exceeded, time is required for the amplifier to recover from this over driven condition. Figure 5 illustrates the overload recovery of the CLC423 when the output is overdriven. An input was applied in an attempt to drive the output to twice the supply rails (2 • (VCC -VEE) = 10V), but the output limits. An inverting gain topolgy was used, see Figure 2. As indicated, the CLC423 recovers within 25ns on the rising edge and within 10ns on the falling edge. Inverting gain applications: ■ ■ ■ Power Dissipation Follow these steps to determine the power consumption of the CLC423: Output Voltage (2V/div) Input Voltage (4V/div) Input 1. Calculate the quiescent (no-load) power: Pamp = ICC (VCC - VEE) 2. Calculate the RMS power at the output stage: Po = (VCC - Vload) (Iload), where Vload and Iload are the RMS voltage and current across the external load. Time (50ns/div) 3. Calculate the total RMS power: Pt = Pamp + Po Figure 5: Overdrive Recovery The maximum power that the DIP and SOIC packages can dissipate at a given temperature is illustrated in Figure 7. The power derating curve for any package can be derived by utilizing the following equation: Driving Cables and Capacitive Loads When driving cables, double termination is used to prevent reflections. For capacitive load applications, a small series resistor at the output of the CLC423 will improve stability and settling performance. The Frequency Response vs. CL plot, in the typical performance section, gives the recommended series resistance value for optimum flatness at various capacitive loads. (175° − Tamb ) θ JA where: Tamb = Ambient temperature (°C) θja = Thermal resistance, from junction to ambient, for a given package (°C/W) Transmission Line Matching One method for matching the characteristic impedance (Zo) of a transmission line or cable is to place the appropriate resistor at the input or output of the amplifier. Figure 6 shows typical inverting and non-inverting circuit configurations for matching transmission lines. Z0 V1 +- R2 R4 V2 +- R3 Z0 Rg 1.0 C6 + Z0 CLC423 - R6 AJP 0.8 Power (W) R1 Connect R3 directly to ground. Make the resistors R4, R6, and R7 equal to Zo. Make R5 II Rg = Zo. The input and output matching resistors attenuate the signal by a factor of 2, therefore additional gain is needed. Use C6 to match the output transmission line over a greater frequency range. C6 compensates for the increase of the amplifier’s output impedance with frequency. p Output Connect Rg directly to ground. Make R1, R2, R6, and R7 equal to Zo. Use R3 to isolate the amplifier from reactive loading caused by the transmission line, or by parasitics. AJE 0.6 0.4 Vo 0.2 R7 Rf 0 R5 0 20 40 60 80 100 120 140 160 180 Ambient Temperature (°C) Figure 6: Transmission Line Matching Fi Figure 7: Power Derating Curves 5 http://www.national.com Layout Considerations A proper printed circuit layout is essential for achieving high frequency performance. Comlinear provides evaluation boards for the CLC423 (730013 - DIP, 730027SOIC) and suggests their use as a guide for high frequency layout and as an aid for device testing and characterization. The evaluation boards are designed to accommodate dual supplies. The boards can be modified to provide single supply operation. For best performance; 1) do not connect the unused supply, 2) provide a wide jumper across C2. Use a jumper that is equal in width to the trace connecting pin 4 to C2. This will minimize any additional inductance caused by the jumper. General layout and supply bypassing play major roles in high frequency performance. Follow the steps below as a basis for high frequency layout: SPICE Models SPICE models provide a means to evaluate amplifier designs. Free SPICE models are available for Comlinear’s monolithic amplifiers that: ■ ■ ■ ■ ■ ■ Include 6.8µF tantalum and 0.1µF ceramic capacitors on both supplies. Place the 6.8µF capacitors within 0.75 inches of the power pins. Place the 0.1µF capacitors less than 0.1 inches from the power pins. Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance. Minimize all trace lengths to reduce series inductances. Use flush-mount printed circuit board pins for prototyping, never use high profile DIP sockets. ■ ■ ■ The readme file that accompanies the diskette lists released models, and provides a list of modeled parameters. The application note OA-18, Simulation SPICE Models for Comlinear’s Op Amps, contains schematics and a reproduction of the readme file. Applications Circuits Evaluation Board Information A data sheet is available for the CLC730013 and CLC730027 evaluation boards. This 8-pin op amp evaluation board data sheet provides: ■ ■ ■ Typical Application Circuit The typical application shown on the front page illustrates the near rail-to-rail performance of the CLC423. Evaluation board schematics Evaluation board layouts for both DIP and SOIC boards General information about the boards Single Supply Cable Driver Figure 8 illustrates the CLC423 in a typical single supply cable driving application. The CLC423 is set for a gain of +2V/V to compensate for the divide-by-two voltage drop at Vo. The data sheet also contains tables of recommended components to evaluate several of Comlinear’s high speed amplifiers. This table for the CLC423 is illustrated below. Refer to the evaluation board data sheet for schematics and further information. +5V 6.8µF + Vin Components Needed to Evaluate the CLC423 on the Evaluation Board: ■ ■ ■ ■ ■ ■ Rf, Rg - Use this product data sheet to select values Rin, Rout - Typically 50Ω (Refer to the Basic Operation section of the evaluation board data sheet for details) Rt - Optional resistor for inverting gain configurations (Select Rt to yield desired input impedance = Rg || Rt) C1, C2 - 0.1µF ceramic capacitors C3, C4 - 6.8µF tantalum capacitors 5kΩ 3 + 7 0.1µF CLC423 2 - 250Ω 75Ω 6 75Ω Coaxial Cable 0.1µF 4 Vo 75Ω 250Ω 0.1µF Figure 8: Single Supply Cable Driver Multiple Feedback Bandpass Filter Figure 9 illustrates a bandpass filter and design equations. The circuit operates from a single supply of +5V. The voltage divider biases the non-inverting input to 2.5V. The input is AC coupled to prevent the need for level shifting the input signal at the source. Use the design equations to determine R1 and R2 based on the desired Q and center frequency. C5, C6, C7, C8 R1 thru R8 http://www.national.com 0.1µF 5kΩ Components not used: ■ Support Berkeley SPICE 2G and its many derivatives Reproduce typical DC, AC, Transient, and Noise performance Support room temperature simulations 6 This example illustrates a bandpass filter with Q = 4 and center frequency fc = 1MHz. Figure 10 indicates the filter response. 40 30.6dB 940kHz 30 Magnitude (dB) +5V 6.8µF + 5.1kΩ 3 5.1kΩ Vin R2 = R1 = R1 C 50Ω 390pF Q π fr c fr = resonant frequency R2 A = 2Q 2 4Q 2 2 + 7 0.1µF CLC423 C 4 6 Vo 20 10 0 R2 -10 1 3.16kΩ 10 Frequency (MHz) 390pF Figure 10: Bandpass Response A = mid− band gain Ordering Information Model CLC423AJP CLC423AJE Figure 9: Bandpass Filter Topology Temperature Range -40°C to +85°C -40°C to +85°C Description 8-pin PDIP 8-pin SOIC Package Thermal Resistance Package Plastic (AJP) Surface Mount (AJE) 7 qJC qJA 100°C/W 145°C/W 15°C/W 165°C/W http://www.national.com Comlinear CLC423 94MHz, Single Supply Voltage Feedback Op Amp Customer Design Applications Support National Semiconductor is committed to design excellence. For sales, literature and technical support, call the National Semiconductor Customer Response Group at 1-800-272-9959 or fax 1-800-737-7018. Life Support Policy National’s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of National Semiconductor Corporation. As used herein: 1. Life support devices or systems are devices or systems which, a) are intended for surgical implant into the body, or b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. N National Semiconductor Corporation National Semiconductor Europe National Semiconductor Hong Kong Ltd. National Semiconductor Japan Ltd. 1111 West Bardin Road Arlington, TX 76017 Tel: 1(800) 272-9959 Fax: 1(800) 737-7018 Fax: (+49) 0-180-530 85 86 E-mail: europe.support.nsc.com Deutsch Tel: (+49) 0-180-530 85 85 English Tel: (+49) 0-180-532 78 32 Francais Tel: (+49) 0-180-532 93 58 Italiano Tel: (+49) 0-180-534 16 80 13th Floor, Straight Block Ocean Centre, 5 Canton Road Tsimshatsui, Kowloon Hong Kong Tel: (852) 2737-1600 Fax: (852) 2736-9960 Tel: 81-043-299-2309 Fax: 81-043-299-2408 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. http://www.national.com 8 Lit #150423-004