TS914 RAIL TO RAIL CMOS QUAD OPERATIONAL AMPLIFIER ■ RAIL TO RAIL INPUT AND OUTPUT VOLT■ ■ ■ ■ ■ ■ AGE RANGES SINGLE (OR DUAL) SUPPLY OPERATION FROM 2.7V TO 16V EXTREMELY LOW INPUT BIAS CURRENT : 1pA typ LOW INPUT OFFSET VOLTAGE : 2mV max. SPECIFIED FOR 600Ω AND 100Ω LOADS LOW SUPPLY CURRENT : 200µA/Ampli (VCC = 3V) LATCH-UP IMMUNITY N DIP-14 (Plastic Package) ■ SPICE MACROMODEL INCLUDED IN THISSPECIFICATION DESCRIPTION D SO-14 (Plastic Micropackage) The TS914 is a RAIL TO RAIL CMOS quad operational amplifier designed to operate with a single or dual supply voltage. The input voltage range Vicm includes the two supply rails VCC+ and VCC-. PIN CONNECTIONS (top view) The output reaches : ❑ VCC- +50mV VCC+ -50mV with RL = 10kΩ ❑ VCC- +350mV VCC+ -350mV with RL = 600Ω This product offers a broad supply voltage operating range from 2.7V to 16V and a supply current of only 200µA/amp. (VCC = 3V). Source and sink output current capability is typically 40mA (at VCC = 3V), fixed by an internal limitation circuit. ORDER CODE Package Part Number TS914I/AI Output 1 1 Inve rting Input 1 2 - - 13 Inverting Input 4 Non-inverting Input 1 3 + + 12 Non-inve rting Input 4 + 4 Non-inverting Input 2 5 + + Inverting Input 2 6 - - Output 2 7 V CC 14 Output 4 11 VCC 10 Non-inve rting Input 3 9 Inverting Input 3 8 Output 3 Temperature Range -40, +125°C N D • • N = Dual in Line Package (DIP) D = Small Outline Package (SO) - also available in Tape & Reel (DT) December 2001 1/12 TS914 SCHEMATIC DIAGRAM (1/2 TS914) VCC Inte rna l Vref Non-inve rting Input Inve rting Input Output VCC ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Value 1) Unit 18 V ±18 V -0.3 to 18 V Current on Inputs ±50 mA Current on Outputs ±130 mA Supply voltage Vid Differential Input Voltage Vi Input Voltage 3) Iin Io 2) Toper Operating Free Air Temperature Range TS914I/AI -40 to + 125 Tstg Storage Temperature -65 to +150 °C Value Unit °C 1. All voltages values, except differential voltage are with respect to network ground terminal. 2. Differential voltagesare non-inverting input terminal with respect to the inverting input terminal. 3. The magnitude of input and output voltages must never exceed VCC+ +0.3V. OPERATING CONDITIONS Symbol VCC Vicm 2/12 Parameter Supply voltage Common Mode Input Voltage Range 2.7 to 16 - V + VCC -0.2 to VCC +0.2 V TS914 ELECTRICAL CHARACTERISTICS VCC+ = 3V, Vcc- = 0V, RL, CL connected to VCC/2, Tamb = 25°C (unless otherwise specified) Symbol Parameter Input Offset Voltage (Vic = Vo = VCC/2) Vio Tmin. ≤ Tamb ≤ Tmax. Min. Typ. TS914 TS914A TS914 TS914A ∆Vio Input Offset Voltage Drift 5 Iio Input Offset Current 1) Tmin. ≤ Tamb ≤ Tmax. 1 Iib Input Bias Current 1) Tmin. ≤ Tamb ≤ Tmax. ICC Supply Current (per amplifier, A VCL = 1, no load) T min. ≤ Tamb ≤ Tmax. Max. Unit 10 5 12 7 mV µV/°C 100 200 pA 1 150 300 pA 200 300 400 µA CMR Common Mode Rejection Ratio Vic = 0 to 3V, V o = 1.5V 70 dB SVR Supply Voltage Rejection Ratio (VCC+ = 2.7 to 3.3V, Vo = VCC/2) 80 dB Avd Large Signal Voltage Gain (RL = 10kΩ, Vo = 1.2V to 1.8V) T min. ≤ Tamb ≤ Tmax. High Level Output Voltage (Vid = 1V) VOH T min. ≤ Tamb ≤ Tmax. Low Level Output Voltage (Vid = -1V) R L = 10kΩ R L = 600Ω R L = 100Ω R L = 10kΩ R L = 600Ω 3 2 10 2.9 2.2 2.97 2.7 2 V/mV V 2.8 2.1 R L = 10kΩ R L = 600Ω R L = 100Ω R L = 10kΩ R L = 600Ω 50 300 900 Source (Vo = VCC) 40 40 mA Gain Bandwith Product (AVCL = 100, RL = 10kΩ, C L = 100pF, f = 100kHz) 0.8 MHz SR Slew Rate (AVCL = 1, RL = 10kΩ, CL = 100pF, V i = 1.3V to 1.7V) 0.5 V/µs φm Phase Margin 30 Degrees en Equivalent Input Noise Voltage (R s = 100Ω, f = 1kHz) 30 nV/√Hz 120 dB VOL Io GBP T min. ≤ Tamb ≤ Tmax. Output Short Circuit Current (Vid = ±1V) Sink (Vo = VCC+) VO1 /VO2 Channel Separation (f = 1kHz) 100 600 mV 150 900 1. Maximum values including unavoidable inaccuracies of the industrial test 3/12 TS914 ELECTRICAL CHARACTERISTICS VCC+ = 5V, Vcc- = 0V, RL, CL connected to VCC/2, Tamb = 25°C (unless otherwise specified) Symbol Parameter Input Offset Voltage (Vic = Vo = VCC/2) Vio Tmin. ≤ Tamb ≤ Tmax. Min. Typ. TS914 TS914A TS914 TS914A ∆Vio Input Offset Voltage Drift 5 Iio Input Offset Current 1) Tmin. ≤ Tamb ≤ Tmax. 1 Iib Input Bias Current 1) Tmin. ≤ Tamb ≤ Tmax. ICC Supply Current (per amplifier, A VCL = 1, no load) T min. ≤ Tamb ≤ Tmax. Max. Unit 10 5 12 7 mV µV/°C 100 200 pA 1 150 300 pA 230 350 450 µA CMR Common Mode Rejection Ratio Vic = 1.5 to 3.5V, Vo = 2.5V 85 dB SVR Supply Voltage Rejection Ratio (VCC+ = 3 to 5V, V o = VCC/2) 80 dB Avd Large Signal Voltage Gain (RL = 10kΩ, Vo = 1.5V to 3.5V) T min. ≤ Tamb ≤ Tmax. High Level Output Voltage (Vid = 1V) VOH T min. ≤ Tamb ≤ Tmax. Low Level Output Voltage (Vid = -1V) VOL Io T min. ≤ Tamb ≤ Tmax. Output Short Circuit Current (Vid = ±1V) R L = 10kΩ R L = 600Ω R L = 100Ω R L = 10kΩ R L = 600Ω R L = 10kΩ R L = 600Ω R L = 100Ω R L = 10kΩ R L = 600Ω Source (Vo = VCC) Sink (Vo = VCC+) 10 7 40 4.85 4.20 4.95 4.65 3.7 V/mV V 4.8 4.1 50 350 1400 100 680 mV 150 900 60 60 mA GBP Gain Bandwith Product (AVCL = 100, RL = 10kΩ, C L = 100pF, f = 100kHz) 1 MHz SR Slew Rate (AVCL = 1, RL = 10kΩ, CL = 100pF, V i = 1V to 4V) 0.8 V/µs φm Phase Margin 30 Degrees en Equivalent Input Noise Voltage (R s = 100Ω, f = 1kHz) 30 nV/√Hz 120 dB VO1 /VO2 Channel Separation (f = 1kHz) 1. Maximum values including unavoidable inaccuracies of the industrial test 4/12 TS914 ELECTRICAL CHARACTERISTICS VCC+ = 10V, VDD = 0V, RL, CL connected to VCC/2, Tamb = 25°C (unless otherwise specified) Symbol Parameter Input Offset Voltage (Vic = Vo = VCC/2) Vio Tmin. ≤ Tamb ≤ Tmax. Min. Typ. TS914 TS914A TS914 TS914A ∆Vio Input Offset Voltage Drift 5 Iio Input Offset Current 1) Tmin. ≤ Tamb ≤ Tmax. 1 Iib Input Bias Current 1) Tmin. ≤ Tamb ≤ Tmax. µV/°C 100 200 pA 150 300 pA 90 75 dB Supply Voltage Rejection Ratio (VCC+ = 5 to 10V, V o = VCC/2) 90 dB SVR Large Signal Voltage Gain (RL = 10kΩ, Vo = 2.5V to 7.5V) T min. ≤ Tamb ≤ Tmax. High Level Output Voltage (Vid = 1V) T min. ≤ Tamb ≤ Tmax. Low Level Output Voltage (Vid = -1V) T min. ≤ Tamb ≤ Tmax. R L = 10kΩ R L = 600Ω R L = 100Ω R L = 10kΩ R L = 600Ω R L = 10kΩ R L = 600Ω R L = 100Ω R L = 10kΩ R L = 600Ω 15 10 60 9.85 9 9.95 9.35 7.8 50 650 2300 60 ICC Supply Current (per amplifier, A VCL = 1, no load) T min. ≤ Tamb ≤ Tmax. 400 (AVCL = 100, RL = 10kΩ, C L = 100pF, f = 100kHz) V 180 800 mV 150 900 Output Short Circuit Current (Vid = ±1V) Gain Bandwith Product V/mV 9.8 9 Io GBP mV Common Mode Rejection Ratio Vic = 3 to 7V, V o = 5V Vic = 0 to 10V, V o = 5V CMR VOL 10 5 12 7 V Common Mode Input Voltage Range VOH Unit VDD - 0.2 to VCC+ 0.2 Vicm Avd 1 Max. mA 600 700 µA 1.4 MHz SR Slew Rate (AVCL = 1, RL = 10kΩ, CL = 100pF, V i = 2.5V to 7.5V) 1 V/µs φm Phase Margin 40 Degrees Equivalent Input Noise Voltage (R s = 100Ω, f = 1kHz) en 30 nV/√Hz Total Harmonic Distortion (AVCL = 1, RL = 10kΩ, CL = 100pF, V o = 4.75V to 5.25V, f = 1kHz) 0.02 % Cin Input Capacitance 1.5 pF Rin Input Resistance >10 Tera Ω 120 dB THD VO1 /VO2 Channel Separation (f = 1kHz) 1. Maximum values including unavoidable inaccuracies of the industrial test 5/12 TS914 TYPICAL CHARACTERISTICS Supply Current (each amplifier) vs Supply Voltage Figure 2 : Ta m b = 25 C A VCL = 1 VO = VCC / 2 500 400 300 200 VCC = 10V V i = 5V No load 10 1 100 0 4 8 12 16 25 Figure 3a : High Level Output Voltage vs High Level Output Current OUTPUT VOLTAGE, VOH (V) OUTPUT VOLTAGE, VOH (V) VCC = +5V 3 2 VCC = +3V 12 VCC = +10V 8 4 0 -70 -40 -20 0 -70 OUTP UT CURRENT, IO H (mA) Figure 4a : Low Level Output Voltage vs Low Level Output Current 3 T a m b = 25 C V id = -100mV VCC = +5V VCC = +3V 2 1 0 -20 0 OUTP UT CURRENT, IOH (mA) Figure 4b : Low Level Output Voltage vs Low Level Output Current 30 50 70 90 OUTP UT CURRENT, I OL (mA) OUTPUT VOLTAGE, VOL (V) 4 -40 10 5 OUTPUT VOLTAGE, V OL (V) 125 VCC = +1 6V 16 0 6/12 100 T a m b = 25 C Vid = 100mV 20 1 75 Figure 3b : High Level Output Voltage vs High Level Output Current 5 T a mb = 25 C V id = 100mV 50 TEMPERATURE, Ta mb ( C) S UP P LY VOLTAGE, V CC (V) 4 Input Bias Current vs Temperature 100 600 INPUT BIAS CURRENT, I ib (pA) SUPPLY CURRENT, I CC ( µ A) Figure 1 : 8 T a mb = 25 C V id = -100mV 6 4 VCC = 16V VCC = 10V 2 0 30 50 70 90 OUTP UT C URR ENT, I OL (mA) TS914 Figure 5a : Gain and Phase vs Frequency Figure 5b : Gain and Phase vs Frequency 50 GAIN 40 45 Pha s e Margin 90 Tamb = 25 C VCC = 10V R L = 10k Ω C L = 100pF AVCL = 100 10 0 135 Gain Bandwidth P roduct 180 GAIN (dB) P HASE 20 PHASE (Degrees) GAIN (dB) 30 10 3 4 5 6 10 10 10 FRE QUENCY, f (Hz) 10 7 GAIN BANDW. PROD., GBP (kHz) Figure 6a : Gain Bandwidth Product vs Supply Voltage 1800 Tamb = 25 C R L = 10kΩ C L = 1 00pF 1400 1000 600 200 0 4 8 12 16 2 Ta mb = 25 C R L = 10kΩ C L = 100pF 40 30 20 8 12 S UPP LY VOLTAGE, VCC (V) 4 18 0 5 10 10 10 FREQUENCY, f (Hz) 6 10 7 1800 Ta mb = 25 C R L = 6 00Ω C L = 100pF 1400 1000 600 200 0 4 8 12 16 Figure 7b : Phase Margin vs Supply Voltage PHASE MARGIN, φm (Degrees) PHASE MARGIN, φ m (Degrees) 60 4 3 13 5 Gain Bandwidth P rod uct SUP PLY VOLTAGE, VCC (V) Figure 7a : Phase Margin vs Supply Voltage 0 10 90 Figure 6b : Gain Bandwidth Product vs Supply Voltage S UPP LY VOLTAGE, VCC (V) 50 P ha s e Margin Tamb = 25 C VCC = 10V R L = 600Ω C L = 100pF A VCL = 100 20 10 45 P HASE 0 10 GAIN BANDW. PROD., GBP (kHz) 2 0 30 10 -10 10 GAIN 40 0 PHASE (Degrees) 50 16 60 Ta mb = 25 C R L = 600Ω C L = 100pF 50 40 30 20 0 4 8 12 16 SUP PLY VOLTAGE , VCC (V) 7/12 TS914 EQUIVALENT INPUT VOLTAGE NOISE (nV/VHz) Figure 8 : 8/12 Input Voltage Noise vs Frequency 150 100 VCC = 10V Tamb = 25 C R S = 100 Ω 50 0 10 1 000 100 FREQUENCY (Hz) 10000 TS914 MACROMODEL Applies to : TS914i,AI,BI (VCC = 3V) ** Standard Linear Ics Macromodels, 1993. ** CONNECTIONS : * 1 INVERTING INPUT * 2 NON-INVERTING INPUT * 3 OUTPUT * 4 POSITIVE POWER SUPPLY * 5 NEGATIVE POWER SUPPLY .SUBCKT TS914_3 1 3 2 4 5 (analog) ********************************************************** .MODEL MDTH D IS=1E-8 KF=6.564344E-14 CJO=10F * INPUT STAGE CIP 2 5 1.000000E-12 CIN 1 5 1.000000E-12 EIP 10 5 2 5 1 EIN 16 5 1 5 1 RIP 10 11 6.500000E+00 RIN 15 16 6.500000E+00 RIS 11 15 1.271505E+01 DIP 11 12 MDTH 400E-12 DIN 15 14 MDTH 400E-12 VOFP 12 13 DC 0.000000E+00 VOFN 13 14 DC 0 IPOL 13 5 4.000000E-05 CPS 11 15 2.125860E-08 DINN 17 13 MDTH 400E-12 VIN 17 5 0.000000e+00 DINR 15 18 MDTH 400E-12 VIP 4 18 0.000000E+00 FCP 4 5 VOFP 5.000000E+00 FCN 5 4 VOFN 5.000000E+00 * AMPLIFYING STAGE FIP 5 19 VOFP 2.750000E+02 FIN 5 19 VOFN 2.750000E+02 RG1 19 5 1.916825E+05 RG2 19 4 1.916825E+05 CC 19 29 2.200000E-08 HZTP 30 29 VOFP 1.3E+03 HZTN 5 30 VOFN 1.3E+03 DOPM 19 22 MDTH 400E-12 DONM 21 19 MDTH 400E-12 HOPM 22 28 VOUT 3800 VIPM 28 4 150 HONM 21 27 VOUT 3800 VINM 5 27 150 EOUT 26 23 19 5 1 VOUT 23 5 0 ROUT 26 3 75 COUT 3 5 1.000000E-12 DOP 19 68 MDTH 400E-12 VOP 4 25 1.724 HSCP 68 25 VSCP1 0.8E8 DON 69 19 MDTH 400E-12 VON 24 5 1.7419107 HSCN 24 69 VSCN1 0.8E+08 VSCTHP 60 61 0.0875 ** VSCTHP = le seuil au dessus de vio * 500 ** c.a.d 275U-000U dus a l’offset DSCP1 61 63 MDTH 400E-12 VSCP1 63 64 0 ISCP 64 0 1.000000E-8 DSCP2 0 64 MDTH 400E-12 DSCN2 0 74 MDTH 400E-12 ISCN 74 0 1.000000E-8 VSCN1 73 74 0 DSCN1 71 73 MDTH 400E-12 VSCTHN 71 70 -0.55 ** VSCTHN = le seuil au dessous de vio * 2000 ** c.a.d -375U-000U dus a l’offset ESCP 60 0 2 1 500 ESCN 70 0 2 1 -2000 .ENDS ELECTRICAL CHARACTERISTICS VCC+ = 3V, VCC- = 0V, RL, CL connected to VCC/2, Tamb = 25°C (unless otherwise specified) Symbol Conditions Vio Value Unit 0 mV Avd R L = 10kΩ 10 V/mV ICC No load, per operator 100 µA -0.2 to 3.2 V V icm VOH R L = 600Ω 2.96 V VOL R L = 60Ω 300 mV Isink VO = 3V 40 mA Isource VO = 0V 40 mA GBP R L = 10kΩ, CL = 100pF 0.8 MHz SR R L = 10kΩ, CL = 100pF 0.3 V/µs φm Phase Margin 30 Degrees 9/12 TS914 MACROMODEL Applies to : TS914I,AI,BI (VCC = 5V) ** Standard Linear Ics Macromodels, 1993. ** CONNECTIONS : * 1 INVERTING INPUT * 2 NON-INVERTING INPUT * 3 OUTPUT * 4 POSITIVE POWER SUPPLY * 5 NEGATIVE POWER SUPPLY * 6 STANDBY .SUBCKT TS914_5 1 3 2 4 5 (analog) ********************************************************** .MODEL MDTH D IS=1E-8 KF=6.564344E-14 CJO=10F * INPUT STAGE CIP 2 5 1.000000E-12 CIN 1 5 1.000000E-12 EIP 10 5 2 5 1 EIN 16 5 1 5 1 RIP 10 11 6.500000E+00 RIN 15 16 6.500000E+00 RIS 11 15 7.322092E+00 DIP 11 12 MDTH 400E-12 DIN 15 14 MDTH 400E-12 VOFP 12 13 DC 0.000000E+00 VOFN 13 14 DC 0 IPOL 13 5 4.000000E-05 CPS 11 15 2.498970E-08 DINN 17 13 MDTH 400E-12 VIN 17 5 0.000000e+00 DINR 15 18 MDTH 400E-12 VIP 4 18 0.000000E+00 FCP 4 5 VOFP 5.750000E+00 FCN 5 4 VOFN 5.750000E+00 ISTB0 5 4 500N * AMPLIFYING STAGE FIP 5 19 VOFP 4.400000E+02 FIN 5 19 VOFN 4.400000E+02 RG1 19 5 4.904961E+05 RG2 19 4 4.904961E+05 CC 19 29 2.200000E-08 10/12 HZTP 30 29 VOFP 1.8E+03 HZTN 5 30 VOFN 1.8E+03 DOPM 19 22 MDTH 400E-12 DONM 21 19 MDTH 400E-12 HOPM 22 28 VOUT 3800 VIPM 28 4 230 HONM 21 27 VOUT 3800 VINM 5 27 230 EOUT 26 23 19 5 1 VOUT 23 5 0 ROUT 26 3 82 COUT 3 5 1.000000E-12 DOP 19 68 MDTH 400E-12 VOP 4 25 1.724 HSCP 68 25 VSCP1 0.8E+08 DON 69 19 MDTH 400E-12 VON 24 5 1.7419107 HSCN 24 69 VSCN1 0.8E+08 VSCTHP 60 61 0.0875 ** VSCTHP = le seuil au dessus de vio * 500 ** c.a.d 275U-000U dus a l’offset DSCP1 61 63 MDTH 400E-12 VSCP1 63 64 0 ISCP 64 0 1.000000E-8 DSCP2 0 64 MDTH 400E-12 DSCN2 0 74 MDTH 400E-12 ISCN 74 0 1.000000E-8 VSCN1 73 74 0 DSCN1 71 73 MDTH 400E-12 VSCTHN 71 70 -0.55 ** VSCTHN = le seuil au dessous de vio * 2000 ** c.a.d -375U-000U dus a l’offset ESCP 60 0 2 1 500 ESCN 70 0 2 1 -2000 .ENDS TS914 PACKAGE MECHANICAL DATA 14 PINS - PLASTIC DIP Millimeters Inches Dim. Min. a1 B b b1 D E e e3 F i L 0.51 1.39 Z 1.27 Typ. Max. Min. 1.65 0.020 0.055 0.5 0.25 Typ. Max. 0.065 0.020 0.010 20 0.787 8.5 2.54 15.24 0.335 0.100 0.600 7.1 5.1 0.280 0.201 3.3 0.130 2.54 0.050 0.100 11/12 TS914 PACKAGE MECHANICAL DATA 14 PINS - PLASTIC MICROPACKAGE (SO) Millimeters Inches Dim. Min. A a1 a2 b b1 C c1 D (1) E e e3 F (1) G L M S Typ. Max. Min. 1.75 0.2 1.6 0.46 0.25 0.1 0.35 0.19 Typ. 0.004 0.014 0.007 0.5 Max. 0.069 0.008 0.063 0.018 0.010 0.020 45° (typ.) 8.55 5.8 8.75 6.2 0.336 0.228 1.27 7.62 3.8 4.6 0.5 0.344 0.244 0.050 0.300 4.0 5.3 1.27 0.68 0.150 0.181 0.020 0.157 0.208 0.050 0.027 8° (max.) Note : (1) D and F do not include mold flash or protrusions - Mold flash or protrusions shall not exceed 0.15mm (.066 inc) ONLY FOR DATA BOOK. Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibil ity for the consequences of use of such information nor for any infring ement of patents or other righ ts of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change witho ut notice. This publ ication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life suppo rt devices or systems withou t express written approval of STMicroelectronics. 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