LF to 4 GHz High Linearity Y-Mixer ADL5350 Preliminary Technical Data Broadband RF, IF, and LO ports Conversion loss: 6 dB Noise figure: 6 dB High input IP3: 26 dBm High input P1dB: 17 dBm Low LO drive level Single-ended design: no need for baluns Single-supply operation: 3 V @ 10 mA Miniature 8-lead 3 mm x 2 mm LFCSP package RoHS compliant APPLICATIONS Cellular base station Point-to-point radio links RF instrumentation FUNCTIONAL BLOCK DIAGRAM GND RF INPUT OR OUTPUT IF OUTPUT OR INPUT ADL5350 RF IF GC 3V GND VPOS LO LO INPUT 05615-001 FEATURES Figure 1. GENERAL DESCRIPTION The ADL5350 is a high linearity, up-and-down converting mixer capable of operating over a broad input frequency range. It is well suited for demanding cellular base-station mixer designs that require high sensitivity and efficient blocker immunity. Based on a GaAs pHEMT single-ended mixer architecture, the ADL5350 provides excellent input linearity and low noise figure without the need for a high power level, local oscillator (LO) drive. In 850 MHz/900 MHz receive applications, the ADL5350 provides a typical conversion loss of only 6 dB. The integrated LO amplifier allows a low LO drive level, typically only 4 dBm for most applications. The input IP3 is typically greater than 25 dBm, with an input compression point of 17 dBm. The high input linearity of the ADL5350 makes the device an excellent mixer for communications systems that require high blocker immunity, such as GSM 850/900 and 800 MHz CDMA2000. At 2 GHz, a slightly greater supply current is required to obtain similar performance. For low frequency applications, the ADL5350 provides access to the gate contact of the output-mixing device. This allows an external LO coupling capacitor to be applied between the VPOS pin and GC pin, helping to improve the LO drive to the switching device. Using a single 100 pF capacitor allows high performance at the lower LO frequencies. The single-ended broadband RF/IF port allows the device to be customized for a desired band of operation using simple external filter networks. The LO to RF isolation is based on the LO rejection of the RF port filter network. Greater isolation may be achieved using higher order filter networks as described in the Applications section of this data sheet. The ADL5350 is fabricated on a GaAs pHEMT high performance IC process. The ADL5350 is available in a 3 mm × 2 mm 8-lead LFCSP package. It operates over a −40°C to +85°C temperature range. An evaluation board is also available. Rev. PrC Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved. ADL5350 Preliminary Technical Data TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ..............................................8 Applications....................................................................................... 1 820 MHz Characteristics..............................................................8 Functional Block Diagram .............................................................. 1 1950 MHz Characteristics......................................................... 13 General Description ......................................................................... 1 Functional Description.................................................................. 18 Specifications..................................................................................... 3 Circuit Description .................................................................... 18 820 MHz Receive Performance .................................................. 3 Implementation Procedure ....................................................... 18 1950 MHz Receive Performance ................................................ 3 Applications..................................................................................... 20 Spur Tables......................................................................................... 4 Low Frequency Applications .................................................... 20 450 MHz Spur Table..................................................................... 4 70 MHz Receive Performance .................................................. 21 820 MHz Spur Table..................................................................... 4 High Frequency Applications ................................................... 22 1950 MHz Spur Table................................................................... 5 Evaluation Board ............................................................................ 23 Absolute Maximum Ratings............................................................ 6 Outline Dimensions ....................................................................... 24 ESD Caution.................................................................................. 6 Ordering Guide .......................................................................... 24 Pin Configuration and Function Descriptions............................. 7 Rev. PrC | Page 2 of 24 Preliminary Technical Data ADL5350 SPECIFICATIONS 820 MHz RECEIVE PERFORMANCE VS = 3 V, TA = 25°C, LO power = 4 dBm, re: 50 Ω, unless otherwise noted. Table 1. Parameter RF Frequency Range LO Frequency Range IF Frequency Range Conversion Loss SSB Noise Figure Input Third-Order Intercept Input 1 dB Compression Point LO to IF Leakage LO to RF Leakage RF to IF Leakage IF/2 Spurious Supply Voltage Supply Current Min 750 500 30 2.7 Typ 850 780 70 6.3 5.6 27.6 17.8 −28 −16 −17 −50 3 10 Max 975 945 250 Unit MHz MHz MHz dB dB dBm dBm dBc dBc dBc dBc V mA 5.5 Conditions Low Side LO fRF = 820 MHz, fLO = 750 MHz, fIF = 70 MHz fRF = 820 MHz, fLO = 750 MHz, fIF = 70 MHz fRF1 = 819 MHz, fRF2 = 821 MHz, fLO = 750 MHz fIF = 70 MHz, each RF tone 0 dBm fRF = 820 MHz, fLO = 750 MHz, fIF = 70 MHz LO Power = 4 dBm, fRF = 820 MHz, fLO = 750 MHz LO Power = 4 dBm, fRF = 820 MHz, fLO = 750 MHz RF Power = 0 dBm, fRF = 820 MHz, fLO = 750 MHz RF Power = 0 dBm, fRF = 820 MHz, fLO = 750 MHz LO Power = 4 dBm 1950 MHz RECEIVE PERFORMANCE VS = 3 V, TA = 25°C, LO power = 6 dBm, re: 50 Ω, unless otherwise noted. Table 2. Parameter RF Frequency Range LO Frequency Range IF Frequency Range Conversion Loss SSB Noise Figure Input Third-Order Intercept Input 1 dB Compression Point LO to IF Leakage LO to RF Leakage RF to IF Leakage IF/2 Spurious Supply Voltage Supply Current Min 1800 1420 50 2.7 Typ 1950 1760 190 7.2 6.8 26.6 16 −12.5 −10.5 −10 −54 3 24 Max 2050 2000 380 5.5 Unit MHz MHz MHz dB dB dBm dBm dBc dBc dBc dBc V mA PrC | Page 3 of 24 Conditions Low Side LO fRF = 1950 MHz, fLO = 1760 MHz, fIF =190 MHz fRF = 1950 MHz, fLO = 1760 MHz, fIF =190 MHz fRF1 = 1949 MHz, fRF2 = 1951 MHz, fLO = 1760 MHz fIF = 190 MHz, each RF tone 0 dBm fRF = 1950 MHz, fLO = 1760 MHz, fIF =190 MHz LO Power = 6 dBm, fRF = 1950 MHz, fLO = 1760 MHz LO Power = 6 dBm, fRF = 1950 MHz, fLO = 1760 MHz RF Power = 0 dBm, fRF = 1950 MHz, fLO = 1760 MHz RF Power = 0 dBm, fRF = 1950 MHz, fLO = 1760 MHz LO Power = 6 dBm ADL5350 Preliminary Technical Data SPUR TABLES All spur tables are N × fRF − M × fLO-mixer spurious products for 0 dBm input power, unless otherwise noted. 450 MHz SPUR TABLE Table 3. M N 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 −5.7 −16.2 −25.5 −16.2 −23.9 −22.3 −27.1 −24.7 −27.1 −26.8 −38.6 −30.2 −29.9 −27.2 −29.2 −34.8 1 −24.9 −5.7 −30.1 −18.8 −25.2 −24.0 −24.3 −37.1 −26.5 −53.1 −32.0 −44.0 −59.3 −46.0 −52.3 −43.3 2 −47.4 −57.5 −51.1 −60.2 −53.8 −55.2 −52.5 −50.8 −57.7 −51.4 −65.0 −53.1 −63.9 −77.5 −68.7 −75.5 3 −70.5 −75.3 −70.2 −79.7 −69.5 −76.6 −66.9 −74.5 −73.0 −74.7 −75.5 −71.4 −74.6 −75.3 −75.6 −76.1 4 −78.4 −73.1 −82.4 −79.3 −79.5 −77.5 −84.5 −77.8 −82.2 −77.6 −88.4 −82.7 −77.9 −72.8 −77.1 −83.6 5 −82.7 −76.6 −77.1 −89.8 −77.6 −76.1 −79.3 −79.3 −83.1 −81.1 −78.4 −79.6 −80.2 −77.9 −85.6 −79.1 6 −90.6 −79.2 −82.2 −84.3 −81.2 −96.3 −75.8 −80.1 −80.7 −76.9 −82.5 −74.4 −84.0 −88.9 −89.6 −77.9 7 −78.9 −74.4 −77.0 −83.2 −80.1 −86.3 −78.9 −87.2 −76.5 −81.5 −82.8 −83.6 −88.7 −73.5 −78.3 −78.4 8 −77.3 −73.6 −79.0 −80.4 −78.6 −79.6 −83.3 −81.0 −77.4 −70.4 −77.0 −79.7 −90.7 −78.0 −76.2 −77.0 9 −80.8 −78.5 −76.7 −78.7 −84.8 −80.4 −81.1 −76.9 −80.7 −79.6 −76.0 −91.3 −90.5 −91.4 −96.8 −75.7 10 −78.9 −77.1 −77.0 −84.0 −87.0 −81.2 −84.4 −90.2 −75.8 −77.5 −90.4 −82.8 −83.0 −87.9 −81.9 −83.1 11 −77.5 −80.4 −78.7 −86.7 −79.1 −76.4 −85.9 −78.7 −83.4 −85.2 −78.6 −92.3 −80.3 −75.7 −78.3 −75.4 12 −81.3 −81.6 −81.3 −76.8 −81.5 −78.5 −78.5 −89.7 −74.4 −73.3 −77.0 −78.5 −75.2 −75.4 −91.3 −90.7 13 −79.9 −81.3 −77.4 −78.7 −79.7 −76.7 −77.7 −85.8 −77.0 −78.9 −84.5 −75.0 −81.0 −78.6 −75.8 −82.0 14 −82.7 −77.6 −79.6 −76.3 −82.3 −79.8 −79.2 −83.5 −83.5 −91.4 −78.9 −102.8 −75.6 −80.2 −79.5 −87.4 15 −79.7 −82.9 −79.6 −75.7 −78.8 −78.6 −78.7 −79.8 −77.7 −78.4 −78.7 −80.6 −79.0 −80.4 −87.0 −80.3 820 MHz SPUR TABLE Table 4. M N 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 −6.22 −14.7 −12.8 −13.3 −14.2 −30.1 −27.1 −20.4 −20.2 −22.1 N.M.1 N.M.1 N.M.1 N.M.1 N.M.1 N.M.1 1 −18.8 −6.22 −33 −20.3 −21.4 −44.5 −38.5 −43.1 −39 −31.3 −33.1 N.M.1 N.M.1 N.M.1 −44.6 −71.6 −50 −64.8 −51.7 −53.7 −60.1 −64.3 −74.8 −61.5 −56.8 N.M.1 −55.1 N.M.1 2 N.M.1 N.M.1 N.M.1 N.M.1 3 −73.4 −76.8 −69.8 −72.8 −75.5 −79.6 −97.5 −72.3 −79.5 −84.4 −77.8 −74.9 −74.5 1 N.M.1 N.M. 1 N.M.1 4 −78.2 −77.8 −85.8 −91.3 −80.8 −78.2 −80.9 −76.1 −80.3 −79.4 −81.1 −79.3 −78.1 N.M. −77.6 5 −82.1 −80.8 −85.2 −81.4 −87.1 −79.5 −84.7 −108 −90.2 −84.5 −76.4 −75.1 −80.9 −78.8 −83.3 6 −77.6 −78.6 −80.6 −78.3 −83.2 −70.8 −77.5 −86.8 −84.9 −81.7 −76.7 −81 −79.4 −78.6 −77.1 N.M.1 −79.5 7 −80.2 −76.6 −83.1 −75.8 −82.4 −78.2 −78.7 −80.7 −83 −76.5 −88.9 −77.7 −77.3 −80.2 −78.9 −78.1 8 −83.5 −80.6 −81.7 −79 −84.1 −78.4 −79.5 −86.3 −79 −76.1 −86.7 −79.5 −88.8 −73.9 −79.7 −77.4 9 1 N.M. −78.7 −76.3 −78.1 −82.6 −78.2 −78.5 −87.7 −82.1 −76.7 −94.1 −81.2 −87.5 −80.3 −81.9 −74.9 10 N.M.1 N.M.1 −78.7 −78.4 −80.8 −75.4 −76.6 −86 −84 −81.2 −75.5 −72.5 −78.1 −77.1 −81.8 −78.5 11 N.M.1 N.M.1 N.M.1 −79 −76.7 −81.5 −79.1 −78.2 −76.1 −83 −75 −77.8 −84.1 −79.1 −79.1 −84.2 12 N.M.1 N.M.1 N.M.1 N.M.1 −76.4 −78.8 −77 −79.4 −81.8 −78.6 −82.8 −79.3 −76.8 −75.8 −82.2 −81.2 13 N.M.1 N.M.1 N.M.1 N.M.1 N.M.1 −82 14 N.M. 1 N.M. 1 N.M. 1 N.M. 1 N.M. 1 N.M. 1 N.M. 1 N.M. 1 N.M. 1 N.M. 1 15 1 N.M. 1 −77.7 −80.8 −79.8 −76.6 −79.3 −82.1 −94.9 −74.6 −83.3 −75.9 N.M. 1 −84.2 −78 −81.7 −80.3 −79.3 −77.7 −75.8 −86.9 −77.3 −77 N.M. 1 1 −77 −79.5 −82.2 −80.7 −75.3 −76.1 −79.7 −78.6 N.M. N.M. 1 N.M. indicates that a frequency was not measured. N.M. spurs are either less than −100 dBm or correspond to a frequency greater than 5995 MHz. PrC | Page 4 of 24 Preliminary Technical Data ADL5350 1950 MHz SPUR TABLE Table 5. M 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 −7.8 −2.08 −16.6 −31.7 N.M.1 N.M.1 N.M.1 N.M.1 N.M.1 N.M.1 N.M.1 N.M.1 N.M.1 N.M.1 N.M.1 N.M.1 1 1 1 1 1 1 1 1 1 N.M.1 1 −9.6 −7.81 −36.2 −27.2 −41.1 −28 N.M. 2 −54.7 −74.9 −54 −62 −58.5 −78.6 −57.2 3 −81.1 4 1 N.M. −78.6 −78 −78.7 −83.8 −85.4 −86.4 −82.1 −84.1 −75.6 −79.2 N.M. N.M. N.M.1 N.M.1 N.M.1 N.M.1 N.M.1 N.M.1 N.M.1 −79.4 N.M. 1 N.M. 1 N.M. 1 N.M. 1 N.M. 1 N.M. 1 N.M.1 N.M. 1 N.M. 1 N.M. 1 N.M. 1 N.M. 1 N.M. 1 N.M.1 N.M. 1 N.M. 1 N.M. 1 N.M. 1 N.M. 1 N.M.1 1 N.M. 1 N.M. 1 N.M. 1 N.M.1 −77.2 N.M. −81.9 N.M. −80.1 −82.1 −86.7 −83.4 −80.7 −88.2 −79.5 −86.3 N.M. −79 −80.6 −80 −76.5 −81.4 −81.8 −75.2 −77.4 6 N.M. 7 N.M.1 N.M.1 N.M.1 N.M.1 8 N.M. 1 N.M. 1 N.M. 1 N.M. 1 N.M. 1 N.M. 1 N.M. 1 N.M. 1 10 N.M. 1 N.M. 1 N.M. 1 N.M. 1 11 N.M.1 N.M.1 N.M.1 N.M.1 N.M.1 N.M.1 12 N.M.1 N.M.1 N.M.1 N.M.1 N.M.1 13 N.M.1 N.M.1 N.M.1 N.M.1 14 N.M. 1 1 1 1 15 N.M.1 N.M. N.M.1 N.M. N.M. N.M.1 N.M. N.M.1 −87.8 −80.1 N.M. 1 −79.6 N.M. 1 N.M. 1 −83.7 N.M. 1 N.M. 1 1 −83.2 N.M. 1 1 −82.3 N.M. N.M.1 −73.9 −82.8 N.M. N.M.1 1 1 1 N.M. N.M. N.M. 9 −77.5 N.M. 1 1 5 −79.6 N.M. 15 −74.7 −81.5 −81.5 −82.1 −85.5 −80.9 −79.3 N.M.1 N.M.1 N.M.1 N.M.1 −79.5 1 N.M. 1 N.M.1 1 N.M.1 N.M. −83.1 −79.7 −80.6 −81 −82.9 −78.7 N.M. 1 −80.9 −76.4 −82.7 −79.2 −78.8 −77.9 −80.7 −79.6 N.M.1 N.M.1 N.M.1 −77.8 −81.8 −79.7 −88.3 −73.9 −80.9 −79.5 N.M.1 N.M.1 N.M.1 N.M.1 N.M.1 −79.6 −78.7 −77.6 −87.1 −86.6 −76.7 N.M.1 N.M.1 N.M.1 N.M.1 N.M.1 N.M.1 N.M.1 −74.4 −81.6 −83 −82.9 −80.7 1 1 1 1 1 1 1 1 −78.9 −82 −74.6 −80.4 N.M.1 N.M.1 −78.7 −73.1 −78.1 N.M. N.M.1 N.M. N.M.1 N.M. N.M. N.M.1 −89 −79.3 N.M. N.M. N.M.1 N.M. N.M.1 N.M. N.M.1 N.M. N.M.1 N.M. N.M. indicates that a frequency was not measured. N.M. spurs are either less than −100 dBm or correspond to a frequency greater than 5995 MHz. PrC | Page 5 of 24 ADL5350 Preliminary Technical Data ABSOLUTE MAXIMUM RATINGS Table 6. Parameter Supply Voltage, VS RF Input Level LO Input Level Internal Power Dissipation θJA Maximum Junction Temperature Operating Temperature Range Storage Temperature Range Rating 6.0 V 20 dBm 20 dBm 324 mW 154.3 °C/W 135°C −40°C to +85°C −65°C to +150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. PrC | Page 6 of 24 Preliminary Technical Data ADL5350 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 8 RF/IF ADL5350 LOIN 3 TOP VIEW (Not to Scale) GND1 4 7 GC 6 VPOS 5 GND1 05615-002 RF/IF 1 GND2 2 Figure 2. Pin Configuration Table 7. Pin Function Descriptions Pin No. 1, 8 Mnemonic RF/IF 2 3 4, 5 6 GND2 LOIN GND1 VPOS 7 GC Function RF and IF Input/Output Ports. These nodes are internally tied together. RF and IF port separation is achieved using external tuning networks. Device Common (DC Ground) for RFIF Switching Circuitry. LO Input, AC-Coupled. Device Common (DC Ground) for LO Buffer Circuitry. Positive Supply Voltage for the Drain of the LO Buffer. A series RF choke is needed on the supply line to provide proper ac-loading of the LO buffer amplifier. Gate Contact of Mixing Device. Typically not connected for high frequency mixing. Connecting capacitor between GC and VPOS permits low frequency applications. PrC | Page 7 of 24 ADL5350 Preliminary Technical Data TYPICAL PERFORMANCE CHARACTERISTICS 820 MHz CHARACTERISTICS 15 22 14 21 13 20 12 19 INPUT P1dB (dBm) 11 10 9 8 17 16 15 14 05615-003 7 6 5 –40 18 –20 0 20 40 60 05615-006 SUPPLY CURRENT (mA) VPOS = 3 V, RF Frequency = 820 MHz, IF Frequency = 70 MHz, RF Level = −10 dBm, LO Level = 4 dBm, Temperature = 25°C, unless otherwise noted. 13 12 –40 80 –20 TEMPERATURE (°C) 0 20 40 60 80 TEMPERATURE (°C) Figure 3. Current vs. Temperature Figure 6. Input Compression vs. Temperature 10 14 9 12 7 6 5 4 2 –40 –20 0 20 40 60 +85°C 8 6 4 2 05615-004 3 10 0 2.7 80 05615-007 8 SUPPLY CURRENT (mA) CONVERSION LOSS (dB) –40°C +25°C 3.2 TEMPERATURE (°C) 3.7 4.2 4.7 5.2 4.7 5.2 SUPPLY VOLTAGE (V) Figure 4. Conversion Loss vs. Temperature Figure 7. Current vs. VPOS 30 7.4 29 7.2 CONVERSION LOSS (dB) 28 26 25 24 23 7.0 6.8 +85°C 6.6 6.4 22 +25°C 21 20 –40 –20 0 20 40 60 80 TEMPERATURE (°C) 6.2 05615-008 05615-005 INPUT IP3 (dBm) 27 –40°C 6.0 2.7 3.2 3.7 4.2 SUPPLY VOLTAGE (V) Figure 5. IIP3 vs. Temperature Figure 8. Conversion Loss vs. VPOS Rev. PrC | Page 8 of 24 Preliminary Technical Data ADL5350 820 MHz CHARACTERISTICS 29.0 16 –40°C 14 28.5 SUPPLY CURRENT (mA) +25°C 27.5 27.0 +85°C 26.5 25.5 2.7 3.2 3.7 4.2 4.7 –40°C 10 8 +85°C +25°C 6 4 2 05615-009 26.0 12 05615-012 INPUT IP3 (dBm) 28.0 0 750 5.2 800 SUPPLY VOLTAGE (V) 850 900 950 RF FREQUENCY (MHz) Figure 9. IIP3 vs. VPOS Figure 12. Current vs. RF Frequency 20 10 –40°C 19 9 18 8 +85°C CONVERSION LOSS (dB) 16 +85°C 15 14 13 7 +25°C 6 –40°C 5 4 3 2 05615-010 12 11 10 2.7 3.2 3.7 4.2 4.7 05615-013 INPUT P1dB (dBm) +25°C 17 1 0 750 5.2 800 SUPPLY VOLTAGE (V) 850 900 950 RF FREQUENCY (MHz) Figure 10. Input Compression vs. VPOS Figure 13. Conversion Loss vs. RF Frequency 12 34 –40°C 32 30 INPUT IP3 (dBm) 8 6 4 +25°C 28 +85°C 26 24 0 2.7 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V) 22 20 750 05615-014 2 05615-011 NOISE FIGURE (dB) 10 800 850 900 RF FREQUENCY (MHz) Figure 11. Noise Figure vs. VPOS Figure 14. IIP3 vs. RF Frequency PrC | Page 9 of 24 950 ADL5350 Preliminary Technical Data 820 MHz CHARACTERISTICS 22 9 8 21 +85°C CONVERSION LOSS (dB) 7 INPUT P1dB (dBm) 20 +25°C –40°C 19 18 +85°C 17 6 5 +25°C –40°C 4 3 05615-015 15 750 800 850 900 05615-018 2 16 1 0 30 950 80 RF FREQUENCY (MHz) 130 180 230 IF FREQUENCY (MHz) Figure 15. Input Compression vs. RF Frequency Figure 18. Conversion Loss vs. IF Frequency 9 32 8 31 6 INPUT IP3 (dBm) NOISE FIGURE (dB) 7 5 4 3 30 29 +25°C –40°C 28 2 0 700 750 800 850 900 950 05615-019 05615-016 27 1 +85°C 26 30 1000 80 RF FREQUENCY (MHz) 130 180 230 IF FREQUENCY (MHz) Figure 16. Noise Figure vs. RF Frequency Figure 19. IIP3 vs. IF Frequency 16 22 14 21 12 20 INPUT P1dB (dBm) +25°C 10 8 +85°C 6 18 +85°C 80 130 180 230 IF FREQUENCY (MHz) 16 15 30 05615-020 2 0 30 –40°C +25°C 19 17 4 05615-017 SUPPLY CURRENT (mA) –40°C 50 100 150 200 IF FREQUENCY (MHz) Figure 17. Current vs. IF Frequency Figure 20. Input Compression vs. IF Frequency Rev. PrC | Page 10 of 24 250 Preliminary Technical Data ADL5350 820 MHz CHARACTERISTICS 8 30 29 7 28 27 INPUT IP3 (dBm) NOISE FIGURE (dB) 6 5 4 3 26 25 24 23 2 05615-021 0 50 100 150 200 250 300 350 05615-024 22 1 21 20 –5 380 –3 –1 1 IF FREQUENCY (MHz) 22 60 21 50 20 40 30 10 16 5 7 9 11 13 15 –5 15 –3 –1 1 LO LEVEL (dBm) 15 3 5 7 9 11 13 15 Figure 25. Input Compression vs. LO Level 7.4 12 7.2 10 VPOS = 5V +85°C NOISE FIGURE (dB) 7.0 6.8 +25°C 6.6 6.4 –40°C –3 –1 3 5 7 9 11 8 6 VPOS = 3V 4 13 15 LO LEVEL (dBm) 0 –6 05615-026 2 6.2 05615-023 CONVERSION LOSS (dB) 13 LO LEVEL (dBm) Figure 22. Current vs. LO Level 6.0 –5 11 18 17 3 9 19 20 –1 7 05615-025 INPUT P1dB (dBm) 70 –3 5 Figure 24. IIP3 vs. LO Level 05615-022 SUPPLY CURRENT (mA) Figure 21. Noise Figure vs. IF Frequency 0 –5 3 LO LEVEL (dBm) –4 –2 0 2 4 6 LO LEVEL (dBm) Figure 23. Conversion Loss vs. LO Level Figure 26. Noise Figure vs. LO Level PrC | Page 11 of 24 8 10 ADL5350 Preliminary Technical Data 820 MHz CHARACTERISTICS 0 0 –2 –4 LO LEAKAGE (dBc) –10 –15 –20 –8 –10 –12 –14 –16 –30 700 05615-027 –25 750 800 850 900 950 1000 RF FREQUENCY (MHz) –5 –10 –15 –20 –25 –30 05615-028 –35 680 730 780 830 –20 630 680 730 780 830 880 Figure 29. LO to RF Leakage vs. LO Frequency 0 –40 630 –18 LO FREQUENCY (MHz) Figure 27. RF to IF Feedthrough vs. RF Frequency LO FEEDTHROUGH (dBc) –6 05615-029 RF FEEDTHROUGH (dBc) –5 880 930 LO FREQUENCY (MHz) Figure 28. LO to IF Feedthrough vs. LO Frequency Rev. PrC | Page 12 of 24 930 Preliminary Technical Data ADL5350 1950 MHz CHARACTERISTICS VPOS = 3 V, RF Frequency = 1950 MHz, IF Frequency = 190 MHz, RF Level = −10 dBm, LO Level = 6 dBm, Temperature = 25°C, unless otherwise noted. 25 20 18 16 INPUT P1dB (dBm) 15 10 0 –40 12 10 8 6 4 05615-030 5 14 –20 0 20 40 60 05615-033 SUPPLY CURRENT (mA) 20 2 0 –40 80 –20 0 TEMPERATURE (°C) Figure 30. Current vs. Temperature 45 9 40 60 80 +85°C 8 35 SUPPLY CURRENT (mA) 7 6 5 4 3 30 25 +25°C 20 –40°C 15 10 05615-031 2 1 –20 0 20 40 60 05615-034 CONVERSION LOSS (dB) 40 Figure 33. Input Compression vs. Temperature 10 0 –40 20 TEMPERATURE (°C) 5 0 2.7 80 3.2 TEMPERATURE (°C) 3.7 4.2 4.7 5.2 SUPPLY VOLTAGE (V) Figure 31. Conversion Loss vs. Temperature Figure 34. Current vs. VPOS 30 0 29 –2 CONVERSION LOSS (dB) 28 26 25 24 23 –4 –40°C –6 +25°C –8 +85°C 22 21 20 –40 –20 0 20 40 60 80 TEMPERATURE (°C) –12 2.7 05615-035 –10 05615-032 INPUT IP3 (dBm) 27 3.2 3.7 4.2 4.7 SUPPLY VOLTAGE (V) Figure 32. IIP3 vs. Temperature Figure 35. Conversion Loss vs. VPOS PrC | Page 13 of 24 5.2 ADL5350 Preliminary Technical Data 1950 MHz CHARACTERISTICS 35 34 –40°C 30 +85°C SUPPLY CURRENT (mA) 30 28 +25°C +85°C 26 24 20 2.7 3.2 3.7 4.2 4.7 20 +25°C 15 –40°C 10 5 05615-036 22 25 0 1800 5.2 05615-039 INPUT IP3 (dBm) 32 1850 SUPPLY VOLTAGE (V) 1900 1950 2000 2050 RF FREQUENCY (MHz) Figure 36. IIP3 vs. VPOS Figure 39. Current vs. RF Frequency 20 12 –40°C +25°C 18 10 CONVERSION LOSS (dB) 14 +85°C 12 10 8 6 4 +85°C +25°C 8 6 –40°C 4 05615-037 2 2 0 2.7 3.2 3.7 4.2 4.7 0 1800 5.2 05615-040 INPUT P1dB (dBm) 16 1850 SUPPLY VOLTAGE (V) 1900 1950 2000 2050 RF FREQUENCY (MHz) Figure 37. Input Compression vs. VPOS Figure 40. Conversion Loss vs. RF Frequency 14 34 12 INPUT IP3 (dBm) 8 6 30 28 +25°C –40°C 26 4 24 2 22 0 2.7 3.0 3.5 4.0 4.5 5.0 5.5 20 1800 05615-041 +85°C 05615-038 NOISE FIGURE (dB) 32 10 1850 1900 1950 RF FREQUENCY (MHz) SUPPLY VOLTAGE (V) Figure 41. IIP3 vs. RF Frequency Figure 38. Noise Figure vs. VPOS Rev. PrC | Page 14 of 24 2000 2050 Preliminary Technical Data ADL5350 1950 MHz CHARACTERISTICS 20 12 18 +85°C 10 CONVERSION LOSS (dB) 14 –40°C +25°C 12 10 8 6 4 +85°C 8 6 –40°C +25°C 4 05615-042 2 2 0 1800 1850 1900 1950 2000 0 50 2050 05615-045 INPUT P1dB (dBm) 16 100 RF FREQUENCY (MHz) 150 200 250 300 350 IF FREQUENCY (MHz) Figure 42. Input Compression vs. RF Frequency Figure 45. Conversion Loss vs. IF Frequency 14 34 12 8 6 30 28 +85°C 4 24 2 22 0 2.7 3.0 3.5 4.0 4.5 5.0 –40°C 20 50 5.5 100 150 200 250 300 350 IF FREQUENCY (MHz) RF FREQUENCY (MHz) Figure 46. IIP3 vs. IF Frequency Figure 43. Noise Figure vs. RF Frequency 35 20 18 30 +25°C +85°C 16 20 INPUT P1dB (dBm) 25 +25°C –40°C 15 10 14 –40°C +85°C 12 10 8 6 0 50 100 150 200 250 300 350 IF FREQUENCY (MHz) 05615-047 4 5 05615-044 SUPPLY CURRENT (mA) +25°C 26 05615-046 INPUT IP3 (dBm) 10 05615-043 NOISE FIGURE (dB) 32 2 0 50 100 150 200 250 300 IF FREQUENCY (MHz) Figure 44. Current vs. IF Frequency Figure 47. Input Compression vs. IF Frequency PrC | Page 15 of 24 350 ADL5350 Preliminary Technical Data 1950 MHz CHARACTERISTICS 20 28 18 26 24 14 INPUT IP3 (dBm) 12 10 8 6 22 20 18 16 14 05615-048 4 2 0 50 100 150 200 250 300 350 05615-051 NOISE FIGURE (dB) 16 12 10 –5 380 –3 –1 1 IF FREQUENCY (MHz) 3 5 7 9 11 13 15 9 11 13 15 LO LEVEL (dBm) Figure 48. Noise Figure vs. IF Frequency Figure 51. IIP3 vs. LO Level 70 20 18 60 INPUT P1dB (dBm) SUPPLY CURRENT (mA) 16 50 40 30 20 14 12 10 8 6 05615-049 0 –5 –3 –1 1 3 5 7 9 11 13 05615-052 4 10 2 0 –5 15 –3 –1 1 LO LEVEL (dBm) Figure 49. Current vs. LO Level 18 9 16 8 7 14 NOISE FIGURE (dB) 7 6 5 4 3 VPOS = 5V 12 10 8 VPOS = 3V 6 1 0 5 10 15 LO LEVEL (dBm) 05615-053 4 2 05615-050 CONVERSION LOSS (dB) 5 Figure 52. Input Compression vs. LO Level 10 0 –5 3 LO LEVEL (dBm) 2 0 –6 –4 –2 0 2 4 6 LO LEVEL (dBm) Figure 50. Conversion Loss vs. LO Level Figure 53. Noise Figure vs. LO Level Rev. PrC | Page 16 of 24 8 10 Preliminary Technical Data ADL5350 1950 MHz CHARACTERISTICS 0 0 –2 LO LEAKAGE (dBc) RF FEEDTHROUGH (dBc) –5 –10 –15 –4 –6 –8 –10 1800 1850 1900 1950 2000 2050 2100 2150 RF FREQUENCY (MHz) –2 –6 –8 –10 –12 –14 05615-055 LO FEEDTHROUGH (dBc) –4 –16 1660 1710 1760 1810 1610 1660 1710 1760 1810 1860 1910 Figure 56. LO to RF Leakage vs. LO Frequency 0 1610 –14 1560 LO FREQUENCY (MHz) Figure 54. RF to IF Feedthrough vs. RF Frequency –18 1560 –12 05615-056 –25 1750 05615-054 –20 1860 1910 1960 LO FREQUENCY (MHz) Figure 55. LO to IF Feedthrough vs. LO Frequency PrC | Page 17 of 24 1960 ADL5350 Preliminary Technical Data FUNCTIONAL DESCRIPTION CIRCUIT DESCRIPTION IMPLEMENTATION PROCEDURE The ADL5350 is a GaAs MESFET, single-ended passive mixer with an integrated LO buffer amplifier. The device relies on the varying drain to source channel conductance of a FET junction to modulate an RF signal. A simplified schematic is shown in Figure 57. The ADL5350 is a simple single-ended mixer that relies on offchip circuitry to achieve effective RF dynamic performance. The following steps should be followed to achieve optimum performance (see Figure 58 for component designations): VS RF INPUT OR OUTPUT L2 GC IF LO INPUT LO GND C2 GND IF OUTPUT OR INPUT L4 8 7 6 5 RF/IF GC VPOS GND1 RF/IF 1 GND2 2 RF ADL5350 05615-057 VPOS C4 C6 LOIN 3 RF L3 L1 C1 C3 Figure 57. Simplified Schematic The LO signal is applied to the gate contact of a FET-based buffer amplifier. The buffer amplifier provides sufficient gain of the LO signal to drive the resistive switch. Additionally, feedback circuitry provides the necessary bias to the FET buffer amplifier and RF/IF ports to achieve optimum modulation efficiency for common cellular frequencies. The GC node is the “gate-contact” of the RF/IF port resistive switch. The GC node enables external control of the bias level of the switching FET, allowing the user to override the internal bias generation circuitry, and allow further optimization of the mixer’s dynamic performance at frequencies outside of the 800 MHz to 2000 MHz band. The mixing of RF and LO signals is achieved by switching the channel conductance from the RF/IF port to ground at the rate of the LO. The RF signal is passed through an external bandpass network to help reject image bands and reduce the broadband noise presented to the mixer. The band-limited RF signal is presented to the time-varying load of the RF/IF port, which causes the envelope of the RF signal to be amplitude modulated at the rate of the LO. A filter network applied to the IF port is necessary to reject the RF signal and pass the wanted mixing product. In a down-conversion application, the IF filter network is designed to pass the difference frequency and present an open circuit to the incident RF frequency. Similarly, for an up-conversion application, the filter is designed to pass the sum frequency and reject the incident RF. As a result, the frequency response of the mixer is determined by the response characteristics of the external RF/IF filter networks. GND1 4 LO 05615-058 VS IF Figure 58. Reference Schematic 1. Tune LO buffer supply inductor for lowest supply current. To start this procedure, it is necessary to provide an initial guess. Table 8 can be used as a starting point. It is not necessary to terminate or populate the RF and IF port networks to complete this first step. The RFIF pins can be left open while tuning the LO buffer networks. Table 8. Recommended LO Bias Inductor Desired LO Frequency 380 MHz 750 MHz 1000 MHz 1750 MHz 2000 MHz Recommended LO Bias Inductor (L4)1 68 nH 24 nH 18 nH 3.8 nH 2.1 nH 1 The bias inductor should have a self-resonant frequency greater than the intended frequency of operation. To test the supply current consumption, power up the device and apply the desired LO signal. Next, attempt to increase and decrease the LO frequency. If the current consumption increases as the LO frequency is decreased, then increase the value of L4. If the current consumption decreases as the LO frequency also decreases, then decrease the value of L4. After determining the optimum inductor value, the current consumption should be minimized at the desired LO frequency. Rev. PrC | Page 18 of 24 Preliminary Technical Data 2. ADL5350 Tune the LO port input network for optimum return loss. Typically, a bandpass network is used to pass the LO signal to the LOIN pin. It is desirable to block high frequency harmonics of the LO from the mixer core. LO harmonics cause higher RF frequency images to be down converted to the desired IF frequency, and result in a sensitivity degradation. If the intended LO source has poor harmonic distortion and spectral purity, it may be necessary to employ a higher order bandpass filter network. Figure 58 illustrates a simple L-C bandpass filter used to pass the fundamental frequency of the LO source. Capacitor C3 is a simple DC block, while the series-inductor (L3), along with the gate-to-source capacitance of the buffer amplifier, form a low-pass network. The native gate input of the LO buffer (FET) presents a rather high input impedance alone. The gate bias is generated internally using feedback that can result in a positive return loss at the intended LO frequency. If a better than −10 dB return loss is desired, it may be necessary to add shunt resistor to ground before the coupling capacitor (C3) to present a lower loading impedance to the LO source . 3. Design the RF and IF filter networks. Figure 58 depicts simple LC tank filter networks for the IF and RF port interfaces. The RF port LC network is designed to pass the RF input signal. The series LC tank has a resonant frequency at 1/(2π√LC). At resonance, the series reactances cancel, which presents a series short to the RF signal. A parallel LC tank is used on the IF port to reject the RF and LO signals. At resonance, the parallel LC tank presents an open circuit. It is necessary to accommodate for the board parasitics, finite Q, and self-resonant frequencies of the LC components when designing the RF, IF, and LO filter networks. Table 9 provides suggested values for initial prototyping. Table 9. Suggested RF, IF, and LO Filter Networks for Low-Side LO Injection RF Frequency 450 MHz 850 MHz 1950 MHz 2400 MHz 1 L11 8.3 nH 6.8 nH 1.7 nH 0.67 nH C1 10 pF 4.7 pF 1.5 pF 1 pF L2 10 nH 4.7 nH 1.7 nH 1.5 nH C2 10 pF 5.6 pF 1.2 pF 0.7pF L3 10 nH 8.2 nH 3.5 nH 3.0 nH C3 100 pF 100 pF 100 pF 100 pF The inductor should have a self-resonant frequency greater than the intended frequency of operation. L1 should be a high Q inductor for optimum NF performance. PrC | Page 19 of 24 ADL5350 Preliminary Technical Data APPLICATIONS LOW FREQUENCY APPLICATIONS The circuit in Figure 60 is designed for a RF of 70 MHz and an IF of 10.7 MHz. The LO is at 59.3 MHz (Low Side LO). The series resonant circuit is designed for 70 MHz and the parallel resonant circuit is designed for 65 MHz. 3V 4.7µF + Using an external capacitor from the GC pin to VPOS makes it possible to operate the ADL5350 at frequencies below 100 MHz. This capacitor is required because the internal capacitor between the LO buffer and the gate of the device is only 4 pF. This capacitance combined with the gate resistance causes a high-pass filter corner of 80 MHz. 10nF IF 10nF 100nH GC RF IF LO INPUT LO GND GND IF OUTPUT OR INPUT 05615-060 VPOS ALL INDUCTORS ARE 0603CS SERIES FROM COILCRAFT RF 56pF 8 7 6 5 RF/IF GC VPOS GND1 RF/IF 1 GND2 2 ADL5350 LOIN 3 This high-pass filter corner decreases the LO energy that is reaching the mixer core. Using a 47 pF capacitor between VPOS and GC reduces this corner frequency to 7 MHz. Rev. PrC | Page 20 of 24 GND1 4 100nH 10nF 47pF LO Figure 59. Block Diagram 270nH 47pF 05615-061 RF INPUT OR OUTPUT VS Figure 60. 70 MHz to 10.7 MHz Down-Conversion Schematic Preliminary Technical Data ADL5350 Table 11 shows the spur performance for RF = 70 MHz and LO = 59.3 MHz; RFin = −5 dBm, Loin=4 dBm; all values in dBc referenced to RFin. 70 MHz RECEIVE PERFORMANCE VS = 3 V, TA = 25°C, LO power = 4 dBm, re: 50 Ω, unless otherwise noted. Note that higher order spurious components falling in-band do become an issue as the bandwidth of the desired signal increases. Therefore, while operation at IF frequencies as low as 10 MHz is possible, the bandwidth of this signal needs to be taken into consideration. Table 10. Parameter RF Frequency LO Frequency IF Frequency Conversion Loss SSB Noise Figure Input Third-Order Intercept Supply Voltage Supply Current Unit MHz MHz MHz dB dB dBm V mA 60 59.3 10.7 6.7 6.7 27.3 3 18 . Table 11. N × fRF − M × fLO-Mixer Spurious Products M N 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0 12.0 13.0 14.0 15.0 0.0 −6.8 −30.5 −23.3 −30.5 −28.9 −34.9 −41.1 −45.7 −37.8 −39.7 −42.3 −37.5 −48.8 −40.1 −39.1 −37.4 1.0 −15.3 −6.8 −18.1 −37.3 −19.8 −22.6 −41.5 −24.2 −26.9 −42.4 −27.7 −30.1 −43.4 −30.2 −32.9 −44.3 2.0 −51.5 −66.0 −57.8 −57.4 −63.1 −57.8 −55.6 −59.2 −56.3 −55.7 −61.3 −57.1 −55.7 −58.3 −56.8 −57.6 3.0 −71.4 −78.8 −73.1 −75.1 −80.6 −81.8 −78.3 −78.2 −72.3 −82.3 −77.7 −82.4 −76.3 −73.3 −74.3 −79.2 4.0 −82.9 −78.6 −81.0 −84.2 −79.7 −77.5 −76.6 −79.0 −74.9 −75.0 −75.8 −76.3 −89.2 −76.7 −87.9 −76.1 5.0 −76.2 −82.9 −78.6 −75.4 −78.7 −84.9 −77.6 −79.2 −84.5 −85.0 −75.9 −81.3 −74.9 −98.6 −73.6 −90.4 6.0 −88.6 −74.6 −79.1 −80.2 −77.1 −76.1 −85.8 −76.2 −81.2 −82.9 −89.7 −75.4 −82.9 −85.4 −78.1 −75.9 7.0 −90.6 −76.7 −79.9 −80.6 −81.0 −83.4 −73.1 −76.8 −77.9 −84.6 −80.0 −78.4 −73.2 −75.2 −79.3 −90.9 8.0 −81.8 −80.4 −84.6 −84.9 −79.5 −83.1 −80.1 −78.6 −89.9 −78.7 −75.3 −77.0 −81.6 −86.3 −85.0 −77.1 9.0 −90.2 −78.3 −80.2 −71.9 −73.9 −85.8 −82.2 −86.6 −80.2 −78.7 −79.1 −71.2 −78.8 −76.0 −84.5 −81.8 10.0 −78.2 −82.1 −80.3 −73.5 −86.6 −86.1 −81.0 −86.0 −78.2 −86.2 −87.1 −83.7 −79.8 −75.0 −83.8 −82.4 11.0 −77.6 −85.8 −78.4 −85.1 −86.6 −80.1 −79.4 −78.8 −69.3 −82.8 −81.6 −94.2 −81.7 −80.5 −84.1 −77.2 12.0 −89.4 −90.8 −80.8 −71.7 −73.4 −75.5 −82.2 −76.8 −72.1 −78.0 −76.3 −84.9 −85.6 −78.7 −71.8 −85.1 13.0 −80.0 −82.5 −79.6 −82.0 −78.9 −78.5 −73.4 −80.4 −84.9 −81.5 −79.4 −79.1 −76.1 −82.8 −77.8 −71.7 14.0 −86.3 −85.6 −89.2 −85.6 −82.7 −74.4 −88.1 −77.6 −74.4 −79.0 −85.4 −89.1 −88.4 −77.2 −81.1 −80.0 15.0 −84.4 −81.9 −81.1 −87.9 −77.7 −83.3 −78.4 −81.9 −90.0 −73.3 −84.6 −77.8 −81.7 −81.2 −93.2 −71.4 PrC | Page 21 of 24 ADL5350 Preliminary Technical Data HIGH FREQUENCY APPLICATIONS The ADL5350 can be used at extended frequencies with some careful attention to board and component parasitics. Figure 61 is an example of a 2.3 GHz to 2.5 GHz down-conversion using a low-side LO. The performance of this circuit is depicted in Figure 62. Note that the inductor and capacitor values are very small, especially for the RF and IF ports. Above 2.5 GHz, it is necessary to consider alternate solutions to avoid unreasonably small inductor and capacitor values. Figure 63 depicts a cross-over filter network approach to provide isolation between the RF and IF ports for a downconverting application. The cross-over network essentially provides a high-pass filter to allow the RF signal to pass to the RF/IF node (Pin 1 and Pin 8), while presenting a low-pass filter, (which is actually band-pass when considering the DC blocking capacitor, CAC). This allows the difference component (fRF – fLO) to be passed to the desired IF load. 3V 3V 4.7µF IF + + 100pF 1nF ALL INDUCTORS ARE 0302CS SERIES FROM COILCRAFT 0.7pF L2 1.5nH 2.1nH 8 7 6 5 RF/IF GC VPOS GND1 ALL INDUCTORS ARE 0302CS SERIES FROM COILCRAFT ADL5350 RF/IF 1 GND2 2 LOIN 3 GND1 4 3.8nH 8 7 6 5 RF/IF GC VPOS GND1 RF/IF 1 GND2 2 ADL5350 LOIN 3 RF 0.67nH 3.5nH 3.0nH 1pF L1 3.5nH 100pF C1 1.2pF 100pF LO 05615-062 LO GND1 4 05615-064 1.5nH RF CAC 100pF C2 1.8pF 100pF IF 4.7µF Figure 63. 3.3 GHz to 3.8 GHz Down-Conversion Schematic Figure 61. 2.3 GHz to 2.5 GHz Down-Conversion Schematic 9 IIP3 6 CONVERSION GAIN (dB) IIP3, IP1dB (dBm) 20 IP1dB 15 3 10 0 5 –3 GAIN 0 –6 –5 –9 –10 2200 2250 2300 2350 2400 2450 –12 2500 05615-063 25 When designing the RF and IF port networks, it is important to remember that the networks share a common node (the RF/IF pins). In addition, the opposing network presents some loading impedance to the target network being designed. Classic audio crossover filter design techniques can be applied to help derive component values. However, some caution must be applied when selecting component values. At high RF frequencies, the board parasitics may significantly influence the final optimum inductor and capacitor component selections. Some empirical testing may be necessary to optimize the RF and IF port filter networks. The performance of the circuit depicted in Figure 63 is provided in Figure 64. 30 –2 28 Figure 62. Measured Performance for Circuit in Figure 61 Using Low-Side LO Injection and 374 MHz IF The typical networks used for cellular applications below 2.5 GHz utilize band-select and band-reject networks on the RF and IF ports. At higher RF frequencies, these networks are not easily realized using lumped element components (discrete Ls and Cs). As a result, it is necessary to consider alternate filter network topologies to allow more reasonable values of inductors and capacitors. IP1dB, IIP3 (dBm) RF FREQUENCY (MHz) IIP3 –3 26 –4 24 –5 –6 22 GAIN –7 20 –8 18 IP1dB –9 16 –10 14 3300 3350 3400 3450 3500 3550 3600 3650 3700 3750 3800 RF FREQUENCY (MHz) Figure 64. Measured Performance for Circuit in Figure 63 Rev. PrC | Page 22 of 24 CONVERSION GAIN (dB) 12 05615-065 30 Preliminary Technical Data ADL5350 EVALUATION BOARD An evaluation board is available for the ADL5350. The evaluation board has two halves: a low band designated as Board A, and a high band board designated as Board B. The schematic for the evaluation board is presented in Figure 65. VPOS-A VPOS-B IF-A IF-B C4-A C6-A L2-A + C5-B + C5-A C2-A L2-B L4-A C4-B C6-B C2-B L4-B 8 7 6 5 8 7 6 5 RF/IF GC VPOS GND1 RF/IF GC VPOS GND1 U1-B ADL5350 GND2 2 RF-A LOIN 3 GND1 4 L3-A RF/IF 1 GND2 2 RF-B L1-A C1-A LOIN 3 GND1 4 L3-B L1-B C1-B C3-A LO-A C3-B LO-B 05615-059 RF/IF 1 U1-A ADL5350 Figure 65. Evaluation Board Table 12. Evaluation Board Configuration Options Component C4-A, C4-B, C5-A, C5-B L1-A, L1-B, C1-A, C1-B Function Supply Decoupling. C4-A and C4-B provide local bypassing of the supply. C5-A and C5-B are used to filter the ripple of a noisy supply line. These are not always necessary. RF Input Network. Designed to provide series resonance at the intended RF frequency. L2-A, L2-B, C2-A, C2-B, C6-A, C6-B IF Output Network. Designed to provide parallel resonance at the geometric mean of the RF and LO frequencies. L3-A, L3-B, C3-A, C3-B LO Input Network. Designed to block DC and optimize LO voltage swing at LOIN. L4-A, L4-B LO Buffer Amp Choke. Provides bias and ac loading impedance to LO buffer amp. Rev. PrC | Page 23 of 24 Default Conditions C4-A = C4-B = 100 pF C5-A = C5-B = 4.7 μF L1-A = 6.8 nH (0603CS from Coilcraft) L1-B = 1.7 nH (0302CS from Coilcraft) C1-A = 4.7 pF, C1-B = 1.5 pF L2-A = 4.7 nH (0603CS from Coilcraft) L2-B = 1.7 nH (0302CS from Coilcraft) C2-A = 5.6 pF, C2-B = 1.2 pF C6-A = C6-B = 1 nF L3-A = 8.2 nH (0603CS from Coilcraft) L3-B = 3.5 nH (0302CS from Coilcraft) C3-A = C3-B = 100 pF L4-A = 24 nH (0603CS from Coilcraft) L4-B = 3.8 nH (0302CS from Coilcraft) ADL5350 Preliminary Technical Data OUTLINE DIMENSIONS 1.89 1.74 1.59 3.25 3.00 2.75 1.95 1.75 1.55 TOP VIEW 12° MAX 5 BOTTOM VIEW * 8 EXPOSED PAD 4 2.95 2.75 2.55 PIN 1 INDICATOR 1.00 0.85 0.80 0.60 0.45 0.30 2.25 2.00 1.75 0.55 0.40 0.30 0.15 0.10 0.05 1 0.50 BSC 0.25 0.20 0.15 0.80 MAX 0.65 TYP 0.05 MAX 0.02 NOM SEATING PLANE 0.30 0.23 0.18 0.20 REF Figure 66. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] 2 mm × 3 mm Body, Very Thin, Dual Lead (CP-8-1) Dimensions shown in millimeters ORDERING GUIDE Models ADL5350ACPZ-R21 ADL5350ACPZ-R71 ADL5350ACPZ-WP1 ADL5350-EVAL 1 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C Package Description 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] Evaluation Board Z = Pb-free part. © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PR05615-0-12/05(PrC) Rev. PrC | Page 24 of 24 Package Option CP-8-1 CP-8-1 CP-8-1 Branding Q7 Q7 Q7 Ordering Quantity 250, Reel 3000, Reel 50, Waffle Pack 1